JP2940299B2 - Transmit / receive equalization circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention transmits a four-wire metallic cable. PCM signal transmission / reception equalization circuit
In particular, it relates to an equalization circuit that automatically adjusts a transmission equalization circuit.

[0002]

2. Description of the Related Art A conventional waveform equalizing circuit is installed on the receiving side or on the transmitting side of an opposing transmitting / receiving circuit.
When installed on the transmitting side, the cable attenuation characteristics that affect the received signal waveform at the opposing receiving circuit are mostly unknown, so construction workers and maintenance personnel can measure the cable attenuation, The transmission equalization circuit was adjusted manually by estimating. In addition, regardless of whether the cable is installed on the transmission side or the reception side, the cable is installed at both ends of the cable.

[0003]

The conventional transmission equalization circuit has a problem that a manual operation is required.

[0004] In addition, if the attenuation characteristics of the cable fluctuate due to temperature fluctuations or the like during operation after being set once, there is another problem that transmission equalization cannot be properly performed.

SUMMARY OF THE INVENTION It is an object of the present invention to extend a dynamic range of a control signal of a transmission equalization circuit and automatically adjust the dynamic range.

[0006]

In order to achieve the above object, the present invention provides an equalizing circuit connected to a transmission line and a reception line of a four-wire communication line, respectively. The higher the value, the more the loss-frequency characteristics of the cable, the more the attenuation frequency characteristics of the cable are approximated by the reception equalization circuit,
A comparator for driving a low-pass filter when its output exceeds a threshold, a collector connected to a power supply, and an emitter connected to an output terminal of the low-pass filter connected to a base of a transistor connected to a ground diode. After the emitter of the transistor is connected to the control terminal of the reception equalization circuit and the output of the low-pass filter is amplified by an amplifier, each collector serves as a power supply, and each emitter serves as a 2N-1 stage (N
Is a natural number) and supplied to the bases of N transistors that are respectively in contact with the diode series circuit, one end of which is grounded, and the Nth stage from the ground of the diode series circuit is commonly connected,
It is connected to a control terminal of a transmission equalization circuit having the same configuration as the reception equalization circuit.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of one embodiment of the present invention.
In FIG. 1, an AMI (Alternate Mark In) attenuated by transmitting a cable from a reception input terminal 1 is shown.
version) signal, and the reception equalization circuit 2 performs reception equalization for compensating the attenuation characteristics of the cable. The control terminal 3 of the reception equalization circuit 2 is connected to a connection point of a series circuit of an NPN transistor 5 and a diode 6 connected between the positive power supply _Vcc and the ground. The seen equivalent resistance is the parallel resistance of the diode 6 and the NPN transistor 5. This is because the base of the NPN transistor 5 is AC grounded by Kyapanta C _L of the low-pass filter 7.

[0009] The output of the receiver equalizer circuit 2 is compared with a positive potential threshold V _P and a negative potential threshold V _N of two fixed comparators 8, when crossing any of the threshold, the comparator 8 is a low-pass When the filter 7 is charged and does not exceed, the discharging of the low-pass filter 7 is stopped. The higher the input level, the higher the output level of the reception equalization circuit 2. Therefore, the time width exceeding the threshold in the comparator 8 is widened, the charging current to the low-pass filter 7 increases, and the low-pass filter 7 output voltage V _c is increased. The voltage V _c, so applied to the base of the NPN transistor 5, the number of the next 1 are obtained.

[0010]

(Equation 1)

Here, V _BE is a base-emitter voltage of the NPN transistor 5, and V _D is a forward voltage of the diode 6. Furthermore, instead of the diode 6, an NPN transistor having the same characteristics as the NPN transistor 5 is prepared, and the base and the collector are short-circuited to form an anode, and an equivalent diode is formed using the emitter as a cathode. Therefore, the description is continued assuming that all diodes are equivalently constituted by transistors having the same characteristics.

Then, since V _BE and V _D are equal, N
Both PN transistor 5 and diode 6 have V
_Since a voltage of _C / 2 is applied and the flowing current is the same, the resistance value is the same. Assuming that the resistance value of each element at this time is r, the value of the resistance connected to the control terminal 3 is r / 2 because it is parallel.

As the output voltage V _C of the low-pass filter 7 increases, the bias voltage of the NPN transistor 5 and the diode 6 increases, and the current flowing through both elements increases, so that the resistance of both elements decreases as is well known. I do. Therefore, the gain of the reception equalization circuit 2 decreases, and the output level decreases. As a result, the output voltage V _C of the low-pass filter 7 decreases, and the absolute values of the two threshold values _VP and V _N are reduced by this negative feedback. Are equal, the output level of the reception equalization circuit 2 is stabilized in a state slightly exceeding these two threshold values, and an output is obtained from the reception output terminal 4. At this time, the frequency characteristics of the reception equalization circuit 2 are set in advance so as to compensate for the attenuation characteristics of the cable.

The output voltage V _C of the low-pass filter 7 is amplified N times (N is a natural number) by an amplifier 9, converted to NV _C ,
And NPN transistors and (2N-1) stages × N columns of diodes. As described above, since all of these elements have the same characteristics as the NPN transistor 5, the voltage applied to each element is NV _C / (2N).
That is, V _C / 2, which is the same as the case of the NPN transistor 5 and the diode 6. Therefore, the resistance values of all the elements are all r.

Since the anodes of the N-th diode from the ground are all multi-connected in N columns, the resistance seen from this connection point is as follows. Since the output impedance of the amplifier 9 is substantially zero ohms, focusing on one column, N elements are connected in parallel with one end grounded, and the combined resistance value is Nr / 2.
Further, since these resistors are connected in N columns in parallel, the overall resistance value is r / 2.

The resistance r / 2 is connected to the control terminal 12 of the transmission equalization circuit 11. Therefore, the reception equalization circuit 2 and the transmission equalization circuit 11 have the same resistance connected to the control terminals 3 and 12, and exhibit the same frequency characteristics. Moreover, the dynamic range is determined by the transmission equalization circuit 11.
Is N times wider than the reception equalization circuit 2.
That is, in the reception equalization circuit 2, the signal level generated at the control terminal 3 is equal to the forward voltage (about 0.7 V) of the diode 6.
However, in the transmission equalization circuit 11, the voltage spreads to the forward voltage (approximately 0.7V × N) for N stages of diodes.

The transmission equalization circuit 11 has a transmission input terminal 13
The transmission signal inputted from the transmission line is compensated (pre-emphasis) so as to cancel the attenuation characteristic of the cable of the transmission line (pre-emphasis) and transmitted from the transmission output terminal 14 to the transmission line via an amplifier (not shown). Is done.

The reception input signal input to the reception input terminal 1 is attenuated by the reception cable, and this is operated by the reception equalization circuit 2 to remove intersymbol interference. Since the signal on the opposite side of the reception line, that is, the transmission signal on the opposite side and the transmission input signal on this circuit are generally the same pulse waveform, there is no intersymbol interference in the signal waveform on the opposite side of the transmission line. Become. To explain this with a mathematical formula, the transfer function of the cable is H (S), and the Laplace transform of the opposite transmission waveform is X
(S) Assuming that the transfer function of the reception equalization circuit 2 and the transmission equalization circuit 11 is commonly E (S), the Laplace transform Y (S) of the reception output appearing at the reception output terminal 4 becomes Become.

[0019]

(Equation 2)

Since the Laplace transform of the transmission waveform applied to the transmission input terminal 13 of the present embodiment is also X (S) (because of the same pulse waveform), the Laplace transform Y '(S) of the transmission output signal at the opposite end is represented by Equation 3 is obtained.

[0021]

(Equation 3)

Therefore, the signal waveform obtained by performing the inverse Laplace transform on this signal has the intersymbol interference removed.

FIG. 2 is a circuit diagram showing a specific example of the reception equalization circuit 2 and the transmission equalization circuit 11 in FIG. This is a composite circuit of the former-stage band-pass filter and the latter-stage pseudo line, and has a configuration in which the frequency characteristic changes depending on the value of a resistor connected between the control terminal and the ground.

The transfer function H ₁ (S) of the band-pass filter
Is calculated from the inverse circuit condition of each element as shown in Equation 4.

[0025]

(Equation 4)

The transfer function H ₂ (S) of the pseudo line is calculated by omitting the DC cut capacitor C _DC, as shown in Equation 5.

[0027]

(Equation 5)

Where K ₁ , K ₂ , a, a ', ω ₀ , Q
Is a constant determined by the circuit element. Overall transfer function E
(S) is as shown in Equation 6 when a 'is calculated to be substantially equal to a.

[0029]

(Equation 6)

In the above equation, b and K ₂ include the resistance value r / 2 as viewed from the control terminal. Incidentally, b and K ₂ are as shown in Expression 7.

[0031]

(Equation 7)

Therefore, when the resistance value r / 2 is increased, b becomes smaller and K ₂ becomes larger, so that the zero point moves to a lower frequency and the gain becomes higher in the whole frequency characteristic.

FIG. 4 shows this relationship. FIG. 4 is a diagram illustrating frequency characteristics of the overall gain. The longer the cable,
The amount of attenuation by the cable increases, and therefore, the output level of the reception equalization circuit 2 decreases, and as described above, the resistance value r /
2 increases.

FIG. 3 is a circuit diagram showing a specific example of the comparator 8 of FIG. The voltage applied to the input terminal 15 of the comparator 8 is
Either threshold V _P, exceeds V _N, the switching transistor 16 is turned on, the voltage V _CC is supplied to the output terminal 17. This relationship is shown in the time chart of FIG. The transistor 16 is charged while the transistor 16 is on, and maintains the output voltage while the transistor 16 is off. The comparator 8 is composed of OR outputs of two comparators having an open collector output.

Next, the level diagram will be described with reference to FIG.

The output level of the opposite transmitter 18 is set to 3 V as an example. The attenuation amount of the receiving cable 19 is 2 as an example.
If it is set to 0 dB, the signal is attenuated to 1/10, and is input to the reception equalization circuit 2 shown in FIG. 1 at 3 V / 10 = 0.3 V. Here, as one design example, assuming that the attenuation of the reception equalization circuit 2 is 1/3, the output of the reception equalization circuit 2 is 0.3 V
/3=0.1V. Assuming that the input sensitivity level of the receiver 21 permits, for example, a cable attenuation of 6 dB, the detection threshold value is 3V / 2 = 1.5V. 5V / 0.1V =
It is only necessary to amplify by 15 times.

To explain the transmitting side, the output level of the transmitter 22 is also 3 V, which is
Enter 1 This level is 3 V / 0.3 V = 10 times the input level of the reception equalization circuit 2. Therefore, the dynamic range of the transmission equalization circuit 11 is
By setting the parameter N of the diode array 10 to N = 10, which is ten times that of the reception equalization circuit 2,
The transmission equalization circuit 11 operates normally. This can be understood from the fact that the DC voltage at the control terminal 12 is about 0.7 V × 10 steps = 7 V, which is the sum of the ON voltages of the N-stage diodes, and is larger than the signal level of 3 V.

The output of the transmission equalization circuit 11 receives the same attenuation as that of the reception equalization circuit 2, and becomes 3V / 3 = 1V. Based on the attenuation of the transmission cable 24 of 20 dB and the threshold value of the opposing receiver 25 of 1.5 V, 1.5 V × 10/1 V = 1 in the amplifier 23.
What is necessary is just to give a gain of 5 times. That is, the amplifier 20 and the amplifier 23 may have the same gain.

[0039]

As described above, the dynamic range of the control signal of the transmission equalization circuit is expanded by the transistor / diode array, so that the transmission level input from the transmitter can be equalized without attenuating and the line can be driven. The effect of this is that the gain of the amplifier can be reduced to the same level as the receiving side.

Further, since the transmission side and the reception side are equalizing circuits having the same circuit configuration, fluctuations in cable characteristics during operation can be compensated by following the reception side, and the transmission side naturally follows the compensation. The effect of always being optimally compensated is obtained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention.

FIG. 2 is a diagram showing a reception equalization circuit and a transmission equalization circuit used in one embodiment of the present invention.

FIG. 3 is a diagram showing a comparator used in one embodiment of the present invention.

FIG. 4 is a diagram showing a frequency characteristic of an overall gain when one embodiment of the present invention is used.

FIG. 5 is a time chart illustrating a circuit operation according to an embodiment of the present invention.

FIG. 6 is a block diagram of an entire transmission system showing an application example of the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 reception input terminal 2 reception equalization circuit 3, 12 control terminal 4 reception output terminal 5 NPN transistor 6 diode 7 low-pass filter 8 comparator 9 amplifier 10 transistor / diode array 11 transmission equalization circuit 13 transmission input terminal 14 transmission output Terminal

Claims (1)

(57) [Claims] In an equalizer circuit connected to a transmission line and a reception line of a four-wire communication line, the higher the value of a resistor connected to a control terminal, the higher the attenuation frequency characteristic of a cable having a higher loss. A reception equalization circuit whose frequency characteristics are approximated, and a comparator that drives a low-pass filter when the output exceeds a threshold, the collector being a power supply, the emitter being connected to the base of a transistor connected to a ground diode, respectively. After connecting the output terminal of the low-pass filter, connecting the emitter of the transistor to the control terminal of the reception equalization circuit, and further amplifying the output of the low-pass filter with an amplifier, each collector is connected to a power supply. Each emitter has 2N-1 stages (N
Is a natural number) and supplied to the bases of N transistors that are respectively in contact with the diode series circuit, one end of which is grounded, and the Nth stage from the ground of the diode series circuit is commonly connected,
A transmission / reception equalization circuit connected to a control terminal of a transmission equalization circuit having the same configuration as the reception equalization circuit.