JP2936102B2 - Charged particle beam exposure apparatus and charged particle beam exposure method - Google Patents

Description

Detailed Description of the Invention [Table of Contents] Overview Industrial application field Conventional technology (FIG. 13) Problems to be solved by the invention (FIG. 14) Means for solving the problems (FIG. 1, FIG. (FIG. 2) Action Embodiment (i) Description of First Embodiment (FIGS. 3 to 7) (ii) Description of Second Embodiment (FIGS. 8 to 10) (iii) Third Description of Embodiment (FIGS. 11 and 12) Effects of the Invention [Overview] A charged particle beam exposure apparatus, in particular, a rectangular electron beam on a semiconductor wafer through a plurality of block patterns provided on a beam passing mask (stencil mask). The present invention relates to an apparatus for irradiating a beam or the like to synthesize and expose a semiconductor integrated circuit (hereinafter referred to as an LSI) pattern, and is not limited to an exposure processing that depends only on a block pattern shape provided on the stencil mask. Provided, combining upper and lower block patterns A charged particle generating means for emitting a shaped charged particle beam to an object to be exposed; and a deflection unit for deflecting the shaped charged particle beam. Means, a first beam shaping means having a plurality of first block patterns for shaping the cross section of the shaped charged particle beam, and a plurality of shaping the cross section of the shaped charged particle beam having passed through the first beam shaping means. A second beam shaping unit having a second block pattern, and the plurality of first beam shaping units in the first beam shaping unit based on exposure data.
The alignment control of the shaped charged particle beam is performed on any one of the block patterns, and the shaped charged particle beam that has passed through the one block pattern is subjected to the second beam shaping by the second beam shaping unit. And control means for performing positioning control on any one of the block patterns. In one embodiment, at least one of the plurality of first block patterns has a substantially parallelogram shape. And the shape of one side of the parallelogram has a step shape, and at least one block pattern of the plurality of second block patterns has a plurality of linear shapes.

[Industrial applications]

The present invention relates to a charged particle beam exposure apparatus and a charged particle beam exposure method. More specifically, the present invention relates to a rectangular electron beam or the like on a semiconductor wafer via a plurality of block patterns provided on a beam passing mask (stencil mask). And an apparatus and method for performing synthetic exposure processing on a semiconductor integrated circuit (hereinafter referred to as LSI) pattern.

In recent years, fine pattern exposure has been shifting to a method using a charged particle beam, for example, a pattern exposure using an electron beam or X-ray, instead of photolithography with the increase in integration and density of LSI.

By the way, according to the electron beam exposure apparatus, in order to improve the processing efficiency, a block exposure method of irradiating a semiconductor wafer with a rectangular electron beam through a plurality of block patterns and performing exposure processing of various circuit patterns of an LSI. Has been adopted.

However, the wiring pattern of the address decoder and the exclusive logic gate circuit of the memory cell is a repetitive pattern in which the contact hole installation position changes regularly. For this reason, it is necessary to provide a plurality of block patterns, such as a linear pattern or a linear pattern in which the formation positions of the rectangular portions change regularly, on the stencil mask (beam passing mask).

For this reason, many block patterns occupy the stencil mask (beam passing mask) in the dedicated function circuit pattern such as the address decoder, which hinders the installation of the block pattern necessary for other exposure processing. There is a problem that the exposure processing is limited to the provided block pattern and that a long time is required to select the block pattern, which hinders high-speed exposure.

Therefore, without being limited to the exposure processing that depends only on the block pattern shape provided on the stencil mask, a plurality of masks are provided, the upper and lower block patterns are combined, and efficient and high-speed multi-type processing is performed. An apparatus and a method capable of performing a block exposure process are desired.

[Conventional technology]

 FIGS. 13 and 14 are explanatory views according to a conventional example.

FIG. 13 is a configuration diagram of an electron beam exposure apparatus according to a conventional example.

In the figure, an apparatus for performing exposure processing of an LSI block pattern on a semiconductor wafer 7 by a rectangular electron beam 1a includes:
Electron source 1, deflection drive circuit 2a, rectangular shaping aperture 2b,
1, a second deflector 2c, 2d, a stencil mask 3, a mask moving circuit 4, an exposure control computer 5, and a stage driving circuit 6.

The stencil mask 3 is composed of a plurality of block patterns 3a to 3d... As shown in the dashed circle in the figure. For example, a basic exposure pattern such as an LSI wiring pattern and a contact hole pattern is provided.

The function of the exposure apparatus is that an electron beam emitted from the electron source 1 is shaped into a rectangular electron beam 1a by a rectangular shaping aperture 2b, and the rectangular electron beam 1a is deflected via a deflection driving circuit 2a. Is deflected by By this deflection processing, one block pattern of the stencil mask 3, for example, a rectangular block pattern 3a is selected via the mask moving circuit 4. In addition, the block pattern 3a
Is deflected and scanned on the semiconductor wafer 7 by the second deflector 2d. As a result, the wafer 7 can be subjected to exposure processing such as an LSI contact hole pattern.

Thereafter, the stage is moved by the stage drive circuit 6 to change the exposure area of the semiconductor wafer 7.

[Problems to be solved by the invention]

By the way, according to the conventional example, an LS in which a repetitive pattern as shown in FIG.
When the exposure processing of the circuit pattern of I is performed, FIG.
1 is selected from a plurality of block patterns Ba to Bf provided on the stencil mask 3 and irradiated with the rectangular electron beam 1b.

 Therefore, the following problem may occur.

Many block patterns for exposing the stencil mask 3 to the dedicated functional circuit pattern are occupied.

That is, in the example of the pattern formation of the address recorder in FIG. 14 (a), the first and second contact hole groups 7a, 7
When b is exposed, a block pattern Ba of the stencil mask 3 is selected and irradiated with the rectangular electron beam 1b. Next, the rectangular electron beam 1b is deflected, and the region to be exposed is moved, so that the rectangular electron beam 1b is irradiated through the block pattern Ba.

In the case where the third contact hole group 7c is subjected to exposure processing, first, the block pattern Bb of the stencil mask 3 is exposed.
Is selected, and this is irradiated with the rectangular electron beam 1b. Next, the rectangular electron beam 1b is deflected, and the exposure area is moved, whereby the rectangular electron beam 1b is irradiated through the block pattern Bb. Next, block patterns Bd to Bf are sequentially selected, and the block patterns Bd to Bf are irradiated with the rectangular electron beam 1b.

When the linear pattern 7d is exposed, the block pattern Bc of the stencil mask 3 is selected, and the block pattern Bc is irradiated with the rectangular electron beam 1b.

This allows a plurality of block patterns Ba to be exposed when a dedicated function circuit pattern such as an address recorder is exposed.
~ Bf is required. This hinders installation of a block pattern required for other exposure processing.

Also, it takes a lot of time to select a block pattern,
This hinders high-speed exposure.

This is because the first and second contact hole groups 7a and 7b in the pattern formation example of the address recorder in FIG.
It takes a lot of time to select the block pattern Ba when performing the exposure process on the substrate and to sequentially select the block patterns Bd to Bf when performing the exposure process on the third contact hole group 7c. For example, a lot of time is required for the comparison and collation processing and the alignment processing between the exposure data D and the block pattern data of the stencil mask 3.

Note that the desired exposure pattern is limited to the exposure processing based on the shape and number of block patterns provided on the stencil mask. This depends on the mask function of the block pattern of the block exposure method, and may hinder the prompt response of various types of exposure processing due to process requirements such as LSI design change.

The present invention has been made in view of the problems of the conventional example, and is not limited to the exposure processing that depends only on the block pattern shape provided on the stencil mask. It is an object of the present invention to provide a charged particle beam exposure apparatus and a charged particle beam exposure method capable of performing various kinds of block exposure processing efficiently and at high speed by performing the combination processing of the above.

[Means for solving the problem]

FIG. 1 is a principle diagram of a charged particle beam exposure apparatus according to the present invention, and FIG. 2 is a principle diagram of a charged particle beam exposure method according to the present invention.

The exposure apparatus, as shown in FIG.
Charged particle generating means 11 for emitting a shaped charged particle beam 11a to an exposure target 16, deflecting means 12 for deflecting the shaped charged particle beam 11a, and a plurality of block patterns B11 and B12 for shaping the shaped charged particle beam 11a ... the first consisting of B1n
., B2n for shaping the shaped charged particle beam 11a that has passed through the first beam shaping means 13, and the charged particle generation means. Means 11, a deflection means 12, and control means 15 for controlling the input and output of the first and second beam shaping means 13 and 14, wherein the control means 15 controls the first beam based on exposure data D1. For one block pattern B1i of the shaping means 13, the positioning control processing of the shaped charged particle beam 11a, and, the one block pattern B1
B2n of the second beam shaping means 14 is subjected to alignment control processing of the shaped charged particle beam 11a having passed i, and the first beam shaping means 13 is provided in the exposure apparatus.
, B1n, and the plurality of block patterns B21, B22,... B of the second beam shaping means 14.
2n have the same shape, and in the exposure apparatus, the first beam shaping means 13
, B1n, and the plurality of block patterns B21, B22,... B of the second beam shaping means 14.
2n has a shape different from that of the first block pattern B11,
One block pattern B1i in B12... B1n has a shape substantially similar to a parallelogram, and the shape of one side of the parallelogram has a step shape, and the second block pattern B2
One block pattern B2i in 1, B22... B2n has a plurality of linear shapes, and in the apparatus, the first block pattern B11,
One block pattern B1i in B12 ... B1n has a rectangular shape, and one block pattern B2i in the second block patterns B21, B22 ... B2n has a plurality of linear shapes, and An uneven portion is provided in a part, and in the device, the uneven portion provided in a part of the linear shape is arranged at a position shifted by a predetermined interval between adjacent linear shapes. In the device, the first block pattern B11,
One block pattern B1i in B12... B1n has a plurality of rectangles, and the rectangles are arranged in a matrix at predetermined intervals, and one block pattern in the second block patterns B21, B22. B2i has various kinds of polygonal shapes, and the interior angle of the polygonal shape is 90 degrees or 270.
(Degrees), wherein the polygonal shape is arranged in the matrix and is arranged in proportion to a predetermined interval of a plurality of rectangles, the exposure method using the charged particle beam exposure apparatus , A plurality of first block patterns B11, B12... B1n and a plurality of second blocks provided above and below in a passage area of the shaped charged particle beam 11a. Any of the first and second block patterns B1i, B2i is selected from the patterns B21, B22,..., B2n, and the shaped charged particle beam 11a passing through the first block pattern B1i is converted into the second block pattern B2i. To the shaped charged particle beam 1 having passed through the overlapping area of the first and second block patterns B1i and B2i.
The above object is achieved by performing exposure processing of the object to be exposed 16 based on 1a.

(Operation)

According to the apparatus of the present invention, as shown in FIG. 1, a plurality of block patterns B1 for shaping the shaped charged particle beam 11a are formed.
A first beam shaping means 13 comprising 1, B12... B1n;
Charged particle beam 11a having passed through the beam shaping means 13 of FIG.
, And a second beam shaping means 14 including a plurality of block patterns B21, B12,..., B2n.

Therefore, when the charged particle generating means 11 irradiates the first and second beam shaping means 13 and 14 with the shaped charged particle beam 11a, the shaped charged particle beam 11a is inputted by the control means 15 to which the exposure data D1 is inputted. The shaped charged particle beam 11a aligned with one block pattern B1i of the first beam shaping unit 13 and passing through the one block pattern B1i is converted into a block pattern B2 of the second beam shaping unit 14.
1, B22... B2n are aligned with one block pattern B2i. A shaped charged particle beam 11a shaped from the two block patterns B1i and B2i is deflected and irradiated onto the exposure target 16. Thus, the subject 16 can be exposed to an LSI pattern or the like by the shaped charged particle beam 11a based on the combined block patterns B1i and B2i.

.. B1n of the first beam shaping means 13 and a plurality of block patterns B21, B22. Exposure processing can be performed.

.. B2n of the first beam shaping means 13 and the plurality of block patterns B21, B22... B2n of the second beam shaping means 14 have the same shape. Selection control of B1i and B2i can be facilitated. .. B2n of the first beam shaping means 13 and the plurality of block patterns B21, B22... B2n of the second beam shaping means 14 have different shapes. Exposure processing can be performed.

As a result, the present invention is not limited to the exposure processing that depends only on the block pattern shape provided on the stencil mask as in the conventional example, and can immediately respond to a wide variety of exposure processing due to process requests such as LSI design change. It becomes possible.

Further, according to the exposure method of the present invention, as shown in FIG. 2, the shaped charged particle beam 11a is formed in the overlapping area of the upper and lower block patterns B1i and B2i subjected to the alignment processing in step P3.
And a second irradiation process of irradiating the shaped particle beam 11a to the overlapping area of the upper and lower block patterns B1i and B2i variably adjusted in step P5.

For this reason, the first irradiation processing can use a small number of block patterns B1i, B2i, and B2j, and perform exposure processing of a dedicated function circuit pattern such as an address recorder with a smaller number of shots than in the conventional example. As a result, the data comparison and collation processing and the alignment processing for selecting one block pattern of the beam shaping means 13 can be shortened, and high-speed exposure can be achieved by shortening the block pattern selection processing and the like. Becomes

In addition, by irradiating the specific position of the exposure area with the shaped charged particle beam 11a by the second irradiation processing, the ROM
When writing information into (read-only memory) or the like, it becomes possible to efficiently perform exposure processing on a specific window pattern whose position is limited. This eliminates the need to provide a large number of dedicated block patterns for exposing the dedicated function circuit pattern to the beam shaping means 13 as in the conventional example, and makes it possible to increase the number of block patterns required for other exposure processing. Become.

This makes it possible to improve the throughput and the block exposure function of the charged particle beam exposure apparatus.

〔Example〕

Next, an embodiment of the present invention will be described with reference to the drawings.

3 to 12 are diagrams illustrating a charged particle beam apparatus and a charged particle beam method according to an embodiment of the present invention.

(I) Description of First Embodiment FIG. 3 shows a configuration diagram of an electron beam exposure apparatus according to each embodiment of the present invention.

In the figure, an electron beam exposure apparatus using an electron beam as an embodiment of a charged particle beam includes a rectangular electron beam generation system 21, first to third deflection systems 22A to 22C, a first stencil mask 23, 2 stencil mask 24 and exposure control system 25
Etc.

That is, reference numeral 21 denotes a rectangular electron beam generation system which is an embodiment of the charged particle generation means 11, and includes an electron gun 21A, a grid electrode
21B, an anode electrode 21C, a rectangular shaping aperture 21D, a first electron lens 21E, an alignment coil 21F and the like. The function of the rectangular electron beam generation system 21 is to convert the electron beam 21a generated by the electron gun 21A into a grid electrode 21B and an anode electrode 21B.
The electron beam 21a is accelerated via C, the electron beam 21a is shaped into a rectangular shape by a rectangular shaping aperture 21D, and the rectangular electron beam 21a having an appropriate irradiation area is emitted by the first electron lens 21E.

Reference numeral 22A denotes a first deflection system which constitutes a part of the deflection means 12, and includes a slit deflector 221, a second electron lens 222,
And second alignment deflectors 230 and 231. The function of the first deflection system 22A is the
Rectangular electron beam 21 based on the pattern data PD from
a is aligned with one block pattern B1i.

23 is a first beam shaping means 13 which is an embodiment of the first beam shaping means 13.
And a plurality of block patterns B11 to B1n that allow the rectangular electron beam 21a to pass therethrough. The stencil mask will be described in detail with reference to FIG.

Reference numeral 22B denotes a second deflection system which constitutes another part of the deflection means 12, and comprises third and fourth alignment deflectors 232 and 233. The function of the second deflection system 22B is to convert the rectangular electron beam 21a that has passed through one block pattern B1i of the first stencil mask into one of the second stencil masks based on the pattern data PD from the pattern controller 52. The position is aligned with the block pattern B2i.

Reference numeral 24 denotes a second stencil mask which is an embodiment of the second beam shaping means 14, and is composed of a plurality of block patterns B21 to B2n for passing the rectangular electron beam 21a from the first stencil mask. In the embodiment of the present invention, the plurality of block patterns B11,
B1n and the plurality of block patterns B21, B22... B2n of the second stencil mask 24 have the same shape. Thereby, selection control of both block patterns B1i and B2i can be facilitated.

Reference numeral 22C denotes a third deflection system which constitutes another part of the deflection means 12, and includes fifth and sixth alignment deflectors 234 and 235, electronic lenses 223 to 225, blanking deflector 226, aperture 227, and main differential coil. 228 and a sub-deflector 229.
The function of the third deflection system 22C is that of the second stencil mask 24C.
This is to deflect the rectangular electron beam 21a that has passed through the arbitrary block pattern B2i selected in the above. This allows
An exposure process can be performed on a semiconductor wafer 27 as an example of the exposure target 16 based on the rectangular electron beam 21a that has passed through the upper and lower block patterns B1i and B2i. For example, a process of exposing a wiring pattern to the semiconductor wafer 27 or a process of writing information to a specific window pattern can be performed.

Reference numeral 25 denotes an exposure control system as an embodiment of the control unit 15,
Data memory 51, pattern controller 52, first to fourth digital / analog conversion / amplification circuits (hereinafter referred to as DAC / AMP) 53, 57, 510, 511, first mask moving circuit 54, second mask moving circuit 55, blanking Control circuit 56, sequence controller 58, deflection control circuit 59, interface circuit
512, an exposure data storage device 513, a central processing unit (hereinafter referred to as CPU) 514, and the like.

In the operation of the exposure control system 25, first, the first and second stencil masks 23 and 24 are drive-controlled to move an area having a pattern necessary for the IC to be exposed to a deflectable area of the electron beam 21a. Here, it is assumed that the stencil masks 23 and 24 have a pattern necessary to form a certain type of IC in one area in advance. Thereby, after the semiconductor wafer is placed on the sample stage, the first and second stencil masks 2 are formed.
3, 24 are driven and controlled, and the required area is
It is moved to the deflectable area of a. Then, at the same time as the start of the exposure, each of the necessary blocks in the area is selected to execute the exposure processing.

Here, in the exposure processing of one wafer, the stencil masks 23, 24 do not move when exposing the same type of IC, and the stencil masks 23, 24 do not move when exposing another type of IC.
Move to select each required area.

Therefore, when exposure is performed by selecting blocks in the area, that is, basically, within one batch of wafer exposure, the stencil masks 23 and 24 do not move.

At this time, the exposure data D1 from the exposure data storage device 513 is input to the data memory 51 and the sequence controller 58 via the CPU 514 and the interface circuit 512. Further, the pattern data PD from the data memory 51 is input to the DAC / AMP 53 and the first and second mask moving circuits 54 and 55 via the pattern controller 52, whereby the slit of the first deflection system 22A is The driving of the deflector 221 and the first and second stencil masks 23 and 24 is controlled. Further, based on the pattern data PD, the blanking control circuit 56 and the DAC / AMP 57 drive control the first to sixth alignment deflectors 230 to 235, the blanking deflector 226, and the like.

On the other hand, the deflection data DD from the sequence controller 58
Is input to the deflection control circuit 59 and the stage drive system 26. Further, the X / Y deflection data DX and DY from the deflection control
The signals are input to P510 and 511, whereby the drive of the main differential coil 228 and the sub deflector 229 of the third deflection system is controlled.

Reference numeral 26 denotes a stage drive system, which is a stage moving mechanism.
26A, a stage 26B, a laser interferometer, and the like. The function of the stage drive system 26 is to perform drive control of the stage 26B on which the semiconductor wafer 27 is mounted and measurement control of its movement position based on the stage drive data SD from the sequence controller 58.

FIG. 4 is a view for explaining first and second stencil masks according to each embodiment of the present invention. FIG. 4 is an overall plan view of one stencil mask and an enlarged area of one area therein. FIG.

In the figure, E1 to E9 are beam irradiation areas, which are arranged in a matrix at a predetermined pitch interval EL. According to the embodiment of the present invention, nine 3 × 3 areas are provided, and the size of one area is about 1 to 5 mm □ corresponding to the maximum deflection range of the electron beam 11a. Exy is a position coordinate serving as a reference point of each area, and the reference point of the area E7 is indicated as Exy (1, 2).

Further, B1 to B36 are block patterns, which are arranged in a matrix at a predetermined pitch interval BL. According to the embodiment of the present invention, 36 × 6 × 6 block patterns are provided, and the size of one block pattern is 100 to 500 μm square which is almost equal to the cross-sectional shape of the rectangular electron beam 21a.
It is about. Bxy is a position coordinate serving as a reference point of each block area.
xy (1,2).

FIG. 5 is a diagram for explaining the first and second block pattern groups according to each embodiment of the present invention. FIG. 5 is an enlarged view of the entire plane position of one area and the block pattern therein. Is shown.

In the figure, B10, B11, B16, and B17 are block patterns that form a plurality of block patterns B11, B12,... B1n, B21, B22, and B2n of the first and second stencil masks 23, 24. For example, the block pattern B10 is a pattern in which four linear patterns are arranged in parallel, and forms an LSI wiring pattern. The block pattern B11 is a step-like pattern and is used as an area selection pattern of the group of parallel linear patterns.

Further, the block pattern B16 is a quadrilateral pattern, and is used for an area selection pattern such as the parallel straight line pattern group like the block pattern B11. The block pattern B17 is a specific block pattern in which a wiring pattern and a linear pattern for an address decoder are combined. In the embodiment of the present invention, the plurality of block patterns B11, B12... B1n of the first stencil mask 23 and the second
Block patterns B21 and B2 of the stencil mask 24
2 ... B2n have the same shape. Thereby, selection control of both block patterns B1i and B2i can be facilitated. B1n of the second stencil mask 24 is provided with a different shape from the plurality of block patterns B11, B12... B1n of the first stencil mask 23. It is also possible to perform more various types of exposure processing.

Thus, according to the exposure apparatus according to the embodiment of the present invention, as shown in FIG. 5, the first stencil mask 23 composed of a plurality of block patterns B1, B2... B36 for shaping the rectangular electron beam 21a. , A plurality of block patterns B1, B2,..., B36 for shaping the rectangular electron beam 21a passing through the first stencil mask 23.
Are provided.

Therefore, when the rectangular electron beam 21a is irradiated from the rectangular electron generation system 21 to the first and second stencil masks 23 and 24, the rectangular electron beam 21a is, for example, , First stencil mask 23
The rectangular electron beam 21a is aligned with one block pattern B16 of the second stencil mask 24, and is aligned with one block pattern B10 of the block patterns B1, B2... B36 of the second stencil mask 24. Is done. The semiconductor wafer 27 is deflected and irradiated with the rectangular electron beam 21a shaped by the two block patterns B16 and B10. As a result, the semiconductor wafer 27 is mounted on the semiconductor wafer 27 by the rectangular electron beam 21a based on the combined block patterns B16 and B10.
A pattern or the like can be exposed.

Thus, the plurality of block patterns B1, B2,... B36 of the first stencil mask 23 and the second stencil mask 24
.., B36, it is possible to perform various types of exposure processing.

As a result, the present invention is not limited to the exposure processing that depends only on the block pattern shape provided on the stencil mask as in the conventional example, and can immediately respond to a wide variety of exposure processing due to process requests such as LSI design change. It becomes possible.

Next, the electron beam exposure method according to each embodiment of the present invention will be described while supplementing the operation of the apparatus.

FIGS. 6 (a) to 6 (c) show an exposure process drawing of a step-like wiring pattern according to the first embodiment of the present invention.

In the drawing, for example, when performing exposure processing on a step-like parallel wiring pattern in which the feeding points are regularly shifted in a step-like manner, first, the block patterns B1 to B1 of the first stencil mask 23 are processed.
One block pattern Bi is selected from among B36. The selection process at this time is performed by the pattern controller 52
The pattern data PD is input to the DAC / AMP 53, and the driving of the slit deflector 221 and the first and second alignment deflectors 230 and 231 of the first deflection system 22A is controlled. Thereby, for example, the block pattern B11 of the first stencil mask 23 is selected below the deflectable area of the rectangular electron beam 21a (see FIGS. 7A and 7B).

Also, the block pattern of the second stencil mask 24
B1 to B36 are selected. The selection process at this time is performed by inputting pattern data PD from the pattern controller 52 to the third and fourth alignment deflectors 232 and 233, and irradiating the second stencil mask 24 with the electron beam 21a. Will be

In the irradiation process at this time, the blanking deflector 226 is driven and controlled by the blanking control circuit 56 and the DAC / AMP 57 based on the pattern data PD, and the rectangular electron beam 21a reaches the semiconductor wafer 27. On the other hand, the deflection data DD from the sequence controller 58 is subjected to signal processing by the deflection control circuit 59 to become X, Y deflection data DX, DY, and the DAC / AMP 510, 511
Is input to As a result, the main differential coil 228, the sub deflector 229, and the like of the second deflection system
By deflecting and scanning a, the stepwise parallel wiring pattern PL1 can be exposed on the semiconductor wafer 27 (FIG. 3C).

FIGS. 7 (a) to 7 (d) are explanatory diagrams of an exposure pattern by another alignment according to the first embodiment of the present invention.

FIG. 3A shows an exposure state of a step-like wiring pattern in which the feeding points are regularly shifted in a stepwise manner, and one end thereof is aligned. In this case, the reference point Bxy (1,1) of the block pattern B11 of the first stencil mask 23 is set to, for example, the second
Reference point B of block pattern B10 of stencil mask 24
Align to xy (2,1). In this case, not only is the reference point Bxy (1,1) and the reference point Bxy (2,1) aligned, but the shaped electron beam 21a passing through the two patterns has a required shape. Thus, it is assumed that the necessary offset amounts in the two axes (X, Y) directions of the electron optical system are added.

Specifically, the electron beam 21a that has passed through the block pattern B11 of the first stencil mask 23 is turned into a second deflection system 22B.
And irradiates the block pattern B10 of the second stencil mask 24. The same applies to the positioning between reference points described below.

Thus, the exposure processing can be performed on the stepped wiring pattern PL2 having one end aligned with the semiconductor wafer 27.

FIG. 7B shows an exposure state of a wiring pattern having a smaller number of wirings than the step-like parallel wiring pattern PL1. Also in this case, the reference point Bxy (1,1) of the block pattern B11 of the first stencil mask 23 is aligned with the reference point Bxy (2,3) of the block pattern B10 of the second stencil mask 24. As a result, the semiconductor wafer 27 can be subjected to the exposure processing of the step-like parallel wiring pattern PL3 having the smaller number of two wirings than the step-like parallel wiring pattern PL1.

FIG. 7C shows an exposure state of a wiring pattern having a smaller number of wirings than the step-like wiring pattern PL2 and having one end aligned. Also in this case, the reference point Bxy (1,1) of the block pattern B11 of the first stencil mask 23 is aligned with the reference point Bxy (3,2) of the block pattern B10 of the second stencil mask 24. As a result, the number of wirings on the semiconductor wafer 27 is smaller than that of the preceding stepped wiring pattern PL2, and the stepped wiring pattern PL having one end aligned is provided.
4 can be exposed.

FIG. 9D shows the exposure state of the mirror symmetric pattern of the stepped wiring pattern PL2. Also in this case, the reference point Bxy (1,1) of the block pattern B11 of the first stencil mask 23 is aligned with the reference point Bxy (4,1) of the block pattern B10 of the second stencil mask 24. As a result, the stepped wiring pattern PL2
Exposure processing can be performed on the step-like wiring pattern PL5, which is mirror-symmetric with the one end and whose one end is aligned.

Thus, according to the exposure method according to the first embodiment of the present invention, an exposure pattern is formed as shown in FIGS. 6 (b) and 7 (a) to (d). I have.

Therefore, by the first irradiation process, the two wiring patterns PL1 to PL5 can be exposed by using the two block patterns B11 and B10 with a smaller number of shots than in the conventional example. This eliminates the need for providing a large number of dedicated block patterns for exposing the dedicated function circuit pattern on the first and second stencil masks 23 and 24 as in the conventional example, and eliminates the need for block patterns required for other exposure processing. Can be added.

This makes it possible to improve the throughput and the block exposure function of the charged particle beam exposure apparatus.

(Ii) Description of the Second Embodiment FIG. 8 is an explanatory view of exposure of an address recorder according to a second embodiment of the present invention, and FIGS. 9 (a) to (c) are supplementary explanations thereof. FIG. 10 is a block pattern diagram showing a method of aligning the block patterns.

In FIG. 8, for example, when exposing a signal wiring pattern of an address recorder or the like as shown in FIG. 14, first, the block patterns B1 to B1 of the first stencil mask 23 are processed.
One block pattern B16 is selected from B36. The selection process at this time is performed by the pattern controller 52
The pattern data PD is input to the DAC / AMP 53, and the driving of the slit deflector 221 and the first and second alignment deflectors 230 and 231 of the first deflection system 22A is controlled. Thereby, for example, a rectangular block pattern B16 defining the area of the block patterns B32 and B33 of the second stencil mask 24 is selected below the deflectable area of the rectangular electron beam 21a. (See FIG. 9 (a)).

Also, the block pattern of the second stencil mask 24
B32 and B33 are selected. The block pattern B32 selected at this time is a pattern having seven linear patterns and four rectangular portions regularly arranged in the central linear pattern. Block pattern B33 is
These are four linear patterns, each of which has a rectangular portion that is regularly displaced one by one from each linear pattern (see FIGS. 9B and 9C).

Here, when performing the exposure processing including the first contact hole group 27a and the linear pattern 27d in FIG. 8, the block pattern B16 of the first stencil mask 23 and the second
Is selected with the block pattern B32 of the stencil mask 24.

At this time, the alignment process of the two patterns B16 and B32 is performed by the block pattern B16 using three linear patterns including a pattern having four rectangular portions regularly arranged in the central linear pattern of the block pattern B32. This is performed by defining an area (see FIG. 10 (a)).

Further, when performing the exposure processing including the second contact hole group 27b, the alignment between the block pattern B16 of the first stencil mask 23 and the block pattern B32 of the second stencil mask 24 is changed.

At this time, the process of changing the alignment of both patterns B16 and B32 is performed so that the upper and lower linear patterns sandwiching the pattern having four rectangular portions regularly arranged in the central linear pattern of the block pattern B32 are included. Block pattern B1
This is done by defining an area via 6 (see FIG. 10 (b)).

After that, an exposure process is executed in the same manner as the previous exposure process (FIG. 7A).

Next, when performing the exposure processing including the third contact hole group 27c, the block pattern B16 of the first stencil mask 23 is fixed in the previous state, and the block pattern B32 of the second stencil mask 24 is changed to the block pattern. Change to B33. In addition, the alignment processing is performed such that a pattern having a rectangular portion that is regularly shifted by one position from each straight line pattern to a block pattern B16.
This is done by defining the area via. This allows
Upper and lower block patterns B16, B33 that have undergone alignment processing
Are irradiated with a rectangular electron beam 21a (see FIG. 10 (c)).

After that, an exposure process is performed in the same manner as the previous exposure process (see FIG. 10 (c)).

As a result, the semiconductor wafer 27 can be exposed to the address decoder.

Thus, according to the exposure method according to the second embodiment of the present invention, as shown in FIGS. 10A to 10C, the upper and lower block patterns B16, B32 or An overlap region of B33 is formed.

Therefore, the irradiation process of the rectangular electron beam 21 a
Using two block patterns B16, B32 and B33, compared to the conventional example of 24 shots of a rectangular electron beam,
Exposure processing of the address decoder section can be performed by 1/4 of the 6 shots. As a result, one block pattern B16, B32 of the first and second stencil masks 23, 24 is obtained.
In addition, the data comparison and collation processing and the alignment processing for selecting B33 and B33 can be shortened, and high-speed exposure can be achieved by shortening the selection processing and the like.

This eliminates the need to provide many dedicated block patterns for exposing the dedicated function circuit pattern to the first and second stencil masks 23 and 24 as in the conventional example.
Block patterns necessary for other exposure processing can be added.

This makes it possible to improve the throughput and the block exposure function of the charged particle beam exposure apparatus.

(Iii) Description of Third Embodiment FIGS. 11 (a) to (c) are exposure process diagrams of a specific window pattern according to a third embodiment of the present invention, and FIGS. 12 (a) to 12 (c).
(C) shows a description of a variable processing method of the overlapping position, which complements this.

In FIG. 11 (a), first and second stencil masks
23, 24 block patterns B34, B35, the combination position ~ is defined, respectively, openings H11 to H19 and
H21 to H29 are formed. The defining process at this time is, for example, assuming that a corner of one opening H11 of the block pattern B34 is a combination position, and four combination positions ~ are provided inside one opening H21 of the block pattern B35. I do.

As a result, the defined block patterns B34, B3
Using the first and second stencil masks 23 and 24 including 5, a specific window pattern whose specific position is limited can be exposed.

For example, as shown in FIG.
And the combination position of the block pattern B35 are aligned.

First, the semiconductor wafer 27 can be exposed to nine specific window patterns WP1 based on the openings H11 to H19 of the block pattern B34. By this exposure process, 9
One specific window pattern WP1 can be formed (No. 11
FIG. (C)).

Next, in FIG. 12 (a), the block pattern B34
And the combination position of the block pattern B35 are aligned. In this case, the variable position adjustment processing of the overlapping position is performed, for example, by fixing the second stencil mask 24 and setting the block pattern B34 of the first stencil mask 23.
This is performed based on a comparison and comparison process between the position coordinate data relating to the combination position of and the position coordinate data relating to the combination position of the block pattern B35.

Thereby, the block pattern B34 is formed on the semiconductor wafer 27.
Specific window patterns WP based on the openings H13-H15, H19 of
2 can be formed (see FIG. 12 (a)).

Next, in FIG. 12 (b), the block pattern B34
And the combination position of the block pattern B35 are aligned. At this time, the variable adjustment process of the overlapping position is also performed based on the comparison and collation process of the position coordinate data on the combination position of the two block patterns B34 and B35 with the second stencil mask 24 fixed.

Thereby, three specific window patterns WP3 based on the openings H12, H14, H17 of the block pattern B34 can be formed on the wafer 27 (see FIG. 12 (b)).

Further, in FIG. 12 (c), the block pattern B3
The combination position 4 is aligned with the combination position of the block pattern B35.

Thereby, the five specific window patterns WP based on the openings H11 to H13, H17, and H19 of the block pattern B34 are formed on the wafer 27.
4 can be formed (see FIG. 12 (c)).

Thus, according to the exposure method according to the third embodiment of the present invention, the upper and lower blocks variably adjusted as shown in FIGS. 11 (b) and 12 (a) to (c). Pattern B3
The pattern of the overlap area of 4, B35 is formed.

For this reason, it is not necessary to provide many dedicated block patterns for exposing the dedicated function circuit pattern on the stencil mask as in the conventional example, and it is possible to increase the number of block patterns required for other exposure processing.

This makes it possible to improve the throughput and the block exposure function of the charged particle beam exposure apparatus.

In the embodiment of the present invention, the second beam shaping means 14
Has been described as a single stage, but by providing a plurality of the beam shaping means 14, it becomes possible to perform various types of exposure processing.

〔The invention's effect〕

As described above, according to the apparatus of the present invention, the first and second beam shaping means including a plurality of block patterns for shaping the shaped charged particle beam are provided.

For this reason, various types of exposure processing can be performed by combining and processing a plurality of block patterns of the first beam shaping unit and a plurality of block patterns of the second beam shaping unit. This eliminates the need to limit the exposure process to rely only on the shape of the block pattern provided on the stencil mask as in the conventional example, and to quickly respond to a wide variety of exposure processes due to process requirements such as LSI design changes. Becomes possible.

Further, according to the exposure method of the present invention, the pattern is formed by the overlapping area of the upper and lower block patterns subjected to the alignment processing.

For this reason, the data comparison and collation processing and the alignment processing for selecting one block pattern of the beam shaping unit can be shortened, and high-speed exposure can be achieved by shortening the block pattern selection processing and the like. .

This makes it possible to improve the throughput and the block exposure function of the charged particle beam exposure apparatus.

[Brief description of the drawings]

FIG. 1 is a principle diagram of a charged particle beam exposure apparatus according to the present invention, FIG. 2 is a principle diagram of a charged particle beam exposure method according to the present invention, and FIG. 3 is an electron device according to each embodiment of the present invention. FIG. 4 is a view for explaining the first and second stencil masks according to each embodiment of the present invention, and FIG. 5 is a block pattern group according to each embodiment of the present invention. Explanatory drawing, FIG. 6 is a view showing an exposure process of a step-like wiring pattern according to the first embodiment of the present invention, and FIG. 7 is a diagram showing another exposure process by alignment according to the first embodiment of the present invention. FIG. 8 is an explanatory view of exposure of an address decoder section according to a second embodiment of the present invention, FIG. 9 is a diagram illustrating a block pattern according to the second embodiment of the present invention, FIG. FIG. 11 is a view for explaining the alignment of block patterns according to the second embodiment of the present invention. FIG. 12 is a view showing an exposure process of a specific window pattern according to the third embodiment of the present invention. FIG. 12 is a view for explaining a variable adjustment process of an overlapping position according to the third embodiment of the present invention. FIG. 14 is a configuration diagram of an electron beam exposure apparatus according to a conventional example, and FIG. 14 is a wiring pattern diagram for explaining a problem according to the conventional example. (Explanation of Signs) 11 ... charged particle generating means, 12 ... deflection means, 13 ... first beam shaping means, 14 ... second beam shaping means, 15 ... control means, 11a ... charged particles Beams, B11 to B1n, B21 to B2n, B1i, B2i... A plurality of block patterns, first and second block patterns.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-53-57764 (JP, A) JP-A-59-169131 (JP, A) JP-A-63-299127 (JP, A) JP-A-63-299127 114125 (JP, A) JP-A-4-56210 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 21/027

Claims (5)

(57) [Claims] 1. A charged particle generating means for emitting a shaped charged particle beam to an object to be exposed, a deflecting means for deflecting the shaped charged particle beam, and a plurality of first blocks for shaping the cross section of the shaped charged particle beam A first beam shaping unit having a pattern, a second beam shaping unit having a plurality of second block patterns for shaping the cross section of the shaped charged particle beam having passed through the first beam shaping unit, The first beam shaping means performs positioning control of the shaped charged particle beam to any one of the plurality of first block patterns, and performs shaped charging passing through the one block pattern. Any one of the block patterns of the plurality of second block patterns in the second beam shaping unit is used to form a particle beam. Control means for performing alignment control on at least one of the plurality of first block patterns, wherein at least one block pattern has a substantially parallelogram shape,
And a shape of one side of the parallelogram has a stepped shape, and at least one block pattern of the plurality of second block patterns has a shape of a plurality of straight lines. Beam exposure equipment. 2. A charged particle generating means for emitting a shaped charged particle beam to an object to be exposed; a deflecting means for deflecting the shaped charged particle beam; and a plurality of first blocks for shaping the cross section of the shaped charged particle beam. A first beam shaping unit having a pattern, a second beam shaping unit having a plurality of second block patterns for shaping the cross section of the shaped charged particle beam having passed through the first beam shaping unit, The first beam shaping means performs positioning control of the shaped charged particle beam to any one of the plurality of first block patterns, and performs shaped charging passing through the one block pattern. Any one of the block patterns of the plurality of second block patterns in the second beam shaping unit is used to form a particle beam. Control means for performing positioning control on at least one of the plurality of first block patterns, wherein at least one block pattern of the plurality of first block patterns has a rectangular shape, and at least one of the plurality of second block patterns A charged particle beam exposure apparatus, wherein the block pattern has a shape of a plurality of straight lines, and an uneven portion is provided on a part of the straight lines. 3. The charged particle beam exposure apparatus according to claim 2, wherein the concave and convex portions provided in a part of the linear shape are arranged at positions shifted by a predetermined interval between adjacent linear shapes. Characterized particle beam exposure equipment. 4. A charged particle generating means for emitting a shaped charged particle beam to an object to be exposed; a deflecting means for deflecting the shaped charged particle beam; and a plurality of first blocks for shaping the cross section of the shaped charged particle beam. A first beam shaping unit having a pattern, a second beam shaping unit having a plurality of second block patterns for shaping the cross section of the shaped charged particle beam having passed through the first beam shaping unit, The first beam shaping means performs positioning control of the shaped charged particle beam to any one of the plurality of first block patterns, and performs shaped charging passing through the one block pattern. Any one of the block patterns of the plurality of second block patterns in the second beam shaping unit is used to form a particle beam. Control means for performing alignment control on at least one of the plurality of first block patterns, wherein at least one of the plurality of first block patterns has a plurality of rectangular shapes, and the plurality of rectangles are arranged at predetermined intervals. Arranged in a matrix, at least one block pattern of the plurality of second block patterns has a polygonal shape, and the interior angle of the polygonal shape is 90 degrees or 270 degrees, A charged particle beam exposure apparatus, wherein the polygonal shape is arranged in proportion to a predetermined interval of a plurality of rectangles arranged in the matrix. 5. A method of performing an LSI pattern exposure on the object to be exposed by using the charged particle beam exposure apparatus according to claim 1, wherein the charged particle beam exposure apparatus includes: Selective processing of arbitrary first and second block patterns from a plurality of first block patterns and a plurality of second block patterns provided above and below, and the shaped charging passing through the first block pattern Deflecting the particle beam onto the second block pattern, and performing exposure processing on the object to be exposed based on the shaped charged particle beam that has passed through the overlapping area of the first and second block patterns. Charged particle beam exposure method.