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JP2928822B2 - Semiconductor device and connection method thereof - Google Patents

Semiconductor device and connection method thereof

Info

Publication number
JP2928822B2
JP2928822B2 JP2022264A JP2226490A JP2928822B2 JP 2928822 B2 JP2928822 B2 JP 2928822B2 JP 2022264 A JP2022264 A JP 2022264A JP 2226490 A JP2226490 A JP 2226490A JP 2928822 B2 JP2928822 B2 JP 2928822B2
Authority
JP
Japan
Prior art keywords
bump electrode
fine particles
connection
semiconductor device
bump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2022264A
Other languages
Japanese (ja)
Other versions
JPH03228334A (en
Inventor
充彦 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KASHIO KEISANKI KK
Original Assignee
KASHIO KEISANKI KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KASHIO KEISANKI KK filed Critical KASHIO KEISANKI KK
Priority to JP2022264A priority Critical patent/JP2928822B2/en
Publication of JPH03228334A publication Critical patent/JPH03228334A/en
Application granted granted Critical
Publication of JP2928822B2 publication Critical patent/JP2928822B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
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    • H01L2224/1147—Manufacturing methods using a lift-off mask
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/118—Post-treatment of the bump connector
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    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/13019—Shape in side view comprising protrusions or indentations at the bonding interface of the bump connector, i.e. on the surface of the bump connector
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    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
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    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8134—Bonding interfaces of the bump connector
    • H01L2224/81345—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/819—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector with the bump connector not providing any mechanical bonding
    • H01L2224/81901—Pressing the bump connector against the bonding areas by means of another connector
    • H01L2224/81903—Pressing the bump connector against the bonding areas by means of another connector by means of a layer connector
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    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
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    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 ［産業上の利用分野］ この発明は半導体装置の実装技術における半導体装置
およびその接続方法に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in a semiconductor device mounting technique and a connection method thereof.

［従来の技術］ 一般に、ICチップと基板を接続する接続方法として
は、ICチップの一面に多数のバンプ電極を突出させて設
け、この多数のバンプ電極を基板に配列された接続端子
上に位置決めした上、熱圧着により各バンプ電極を溶融
させて各接続端子に一度に接合するフェイスダウン方式
が知られている。この接続方法では、バンプ電極を接続
端子に接合した後、ICチップと基板の間に封止樹脂を流
し込んで硬化させることにより、バンプ電極と接続端子
の接合部分を保護するとともに、接合強度を確保する必
要がある。しかし、上述した接続方法では、接合後にIC
チップと基板の間に封止樹脂を注入する際、気泡等の発
生により一定量の封止樹脂を注入することが難しく、封
止樹脂により封止が確実にできず、しかもその作業が非
能率的であるという問題がある。[Prior art] Generally, as a connection method for connecting an IC chip and a substrate, a large number of bump electrodes are provided so as to protrude from one surface of the IC chip, and the large number of bump electrodes are positioned on connection terminals arranged on the substrate. In addition, there is known a face-down method in which each bump electrode is melted by thermocompression and bonded to each connection terminal at a time. In this connection method, after joining the bump electrode to the connection terminal, the sealing resin is poured between the IC chip and the substrate and cured to protect the joint between the bump electrode and the connection terminal and secure the joint strength. There is a need to. However, in the connection method described above, the IC
When injecting the sealing resin between the chip and the substrate, it is difficult to inject a certain amount of the sealing resin due to the generation of air bubbles and the like, so that the sealing cannot be reliably performed by the sealing resin, and the work is inefficient. Is a problem.

そこで、最近では、第11図に示すように、ICチップ１
と基板２の間に異方導電性接着剤５を介在させて、ICチ
ップ１のバンプ電極３と基板２の接続端子４を接続する
方法が検討されている。異方導電性接着剤５とは、絶縁
性接着剤６中に導電性微粒子７を分散混合したものであ
る。この異方導電性接着剤５を用いてICチップ１を基板
２に接続する際には、異方導電性接着剤５を基板２の接
続端子４上のみでなく、接続端子４間の基板２上にも被
着し、この状態で基板２の接続端子４とICチップ１のバ
ンプ電極３を異方導電性接着剤５を介在して熱圧着等に
より接合する。このとき、バンプ電極３と接続端子４の
対向間に介在された絶縁性接着剤６は隣接する接続端子
４間およびバンプ電極３間に流動し、互いに対向する接
続端子４とバンプ電極３は導電性微粒子７を挟んで直接
導電性微粒子７に接続する。この場合、各導電性微粒子
が互いに導通しないように充分に離間して分散されてい
れば、隣接する接続端子４または隣接するバンプ電極３
は短絡することはない。すなわち、異方導電性接着剤５
とは、接合状態において厚み方向には導電性を有する
が、面方向には絶縁性を呈するものであり、導電性に方
向性を有する接着剤ということである。したがって、こ
の異方導電性接着剤５を用いた接続方法では、異方導電
性接着剤５を基板２の接続端子４上に被着する際に、位
置合わせが必要でないので、能率的に接続作業を行なう
ことができ、また接続端子４間にも絶縁性接着剤６が介
在されるため、接合後に封止樹脂を充填しなくても、接
合強度を確保することができる。Therefore, recently, as shown in FIG.
A method of connecting the bump electrodes 3 of the IC chip 1 and the connection terminals 4 of the substrate 2 by interposing an anisotropic conductive adhesive 5 between the substrate 2 and the substrate 2 is being studied. The anisotropic conductive adhesive 5 is obtained by dispersing and mixing conductive fine particles 7 in an insulating adhesive 6. When connecting the IC chip 1 to the substrate 2 using the anisotropic conductive adhesive 5, the anisotropic conductive adhesive 5 is applied not only on the connection terminals 4 of the substrate 2, but also between the connection terminals 4. The connection terminals 4 of the substrate 2 and the bump electrodes 3 of the IC chip 1 are joined by thermocompression bonding or the like with the anisotropic conductive adhesive 5 interposed therebetween in this state. At this time, the insulating adhesive 6 interposed between the opposing bump electrodes 3 and the connection terminals 4 flows between the adjacent connection terminals 4 and between the bump electrodes 3, and the opposing connection terminals 4 and the bump electrodes 3 are electrically conductive. The conductive fine particles 7 are connected to the conductive fine particles 7 directly. In this case, if the conductive fine particles are sufficiently separated and dispersed so as not to conduct with each other, the adjacent connection terminal 4 or the adjacent bump electrode 3
Never short-circuits. That is, the anisotropic conductive adhesive 5
The term “adhesive” refers to an adhesive that has conductivity in the thickness direction in the joined state, but exhibits insulation in the plane direction, and has directionality in conductivity. Therefore, in the connection method using the anisotropic conductive adhesive 5, when the anisotropic conductive adhesive 5 is applied onto the connection terminals 4 of the substrate 2, no alignment is required, so that the connection is efficiently performed. Since the work can be performed and the insulating adhesive 6 is interposed between the connection terminals 4, the joining strength can be secured without filling the sealing resin after the joining.

［発明が解決しようとする課題］ しかしながら、上述した異方導電性接着剤５を用いた
ICチップ１の接続方法では、異方導電性接着剤５を介在
させて基板２の接続端子４にICチップ１のバンプ電極３
を熱圧着等により接合する際に、異方導電性接着剤５の
絶縁性接着剤６が流動し、バンプ電極３と接続端子４の
対向間から隣接するバンプ電極３間および隣接する接続
端子４間に流れ出す。このとき、導電性微粒子７は絶縁
性接着剤６の流動に伴ってバンプ電極３と接続端子４の
対向間から流れ出してしまうことがある。そのため、バ
ンプ電極３と接続端子４は第12図に示すように、導電性
微粒子７に直接接触せずに接合されてしまうことがあ
り、バンプ電極３と接続端子４の接続が不安定となり、
確実な接続が得られないという問題がある。特に、上述
した接続方法では、バンプ電極３および接続端子４のピ
ッチが微細になればなるほど、導電性微粒子７がバンプ
電極３と接続端子４の対向間から流れ出し易いので、よ
り一層、接続が不安定となり、微細なピッチの接続が困
難になるという問題がある。[Problems to be solved by the invention] However, the above-described anisotropic conductive adhesive 5 is used.
In the method of connecting the IC chip 1, the bump electrodes 3 of the IC chip 1 are connected to the connection terminals 4 of the substrate 2 with an anisotropic conductive adhesive 5 interposed therebetween.
When bonding is performed by thermocompression bonding or the like, the insulating adhesive 6 of the anisotropic conductive adhesive 5 flows, and the space between the bump electrodes 3 and the adjacent connection terminals 4 and between the adjacent bump electrodes 3 and the adjacent connection terminals 4 Flow out in between. At this time, the conductive fine particles 7 may flow out from the space between the bump electrodes 3 and the connection terminals 4 with the flow of the insulating adhesive 6. Therefore, as shown in FIG. 12, the bump electrode 3 and the connection terminal 4 may be joined without directly contacting the conductive fine particles 7, and the connection between the bump electrode 3 and the connection terminal 4 becomes unstable.
There is a problem that a reliable connection cannot be obtained. In particular, in the connection method described above, the finer the pitch between the bump electrode 3 and the connection terminal 4, the more easily the conductive fine particles 7 flow out from the space between the bump electrode 3 and the connection terminal 4. There is a problem that it becomes stable and it is difficult to connect at a fine pitch.

この発明の目的は、安定した接続が図れ、接続信頼性
に優れ、かつバンプ電極のピッチが微細化しても確実な
接続が行なえる半導体装置およびその接続方法を提供す
ることである。SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device capable of achieving stable connection, having excellent connection reliability, and performing reliable connection even when the pitch of the bump electrodes is reduced, and a connection method thereof.

［課題を解決するための手段］ この発明の半導体装置は、バンプ電極の頂面に全周囲
が前記バンプ電極の側縁部により囲まれた微粒子の直径
とほぼ同じ深さの陥没部を形成したものである。[Means for Solving the Problems] In the semiconductor device of the present invention, a depressed portion having a depth substantially equal to the diameter of the fine particles whose entire periphery is surrounded by the side edge of the bump electrode is formed on the top surface of the bump electrode. Things.

また、この発明の接続方法は、上述した半導体装置と
接続端子の間に異方導電性接着剤を介在させて、前記半
導体装置のバンプ電極と前記接続端子を接続することで
ある。According to a connection method of the present invention, a bump electrode of the semiconductor device is connected to the connection terminal with an anisotropic conductive adhesive interposed between the semiconductor device and the connection terminal.

［作用］ この発明の半導体装置は、バンプ電極の頂面に全周囲
がバンプ電極の側縁部により囲まれた微粒子の直径とほ
ぼ同じ深さの陥没部を形成したので、例えば異方導電性
接着剤等を介在して接続端子にバンプ電極を接続する際
に、バンプ電極の陥没部内に導通用微粒子を抱き込むこ
とができ、したがって安定した接続が図れ、接続信頼性
を高めることができる。[Operation] In the semiconductor device of the present invention, since the depression is formed on the top surface of the bump electrode with a depth substantially equal to the diameter of the fine particles surrounded by the side edges of the bump electrode, the anisotropic conductive material is formed. When connecting the bump electrode to the connection terminal via an adhesive or the like, the conductive fine particles can be held in the recessed portion of the bump electrode, so that a stable connection can be achieved and the connection reliability can be improved.

また、この発明の接続方法によれば、半導体装置のバ
ンプ電極と接続端子を対向させて接近させる際に、バン
プ電極の頂面に形成された微粒子の直径とほぼ同じ深さ
の陥没部が導通用微粒子を抱き込むので、バンプ電極と
接続端子の対向間には、必ず導通用微粒子が介在するこ
ととなり、この異方導電性接着剤によりバンプ電極と接
続端子を接続することができ、したがって安定した接続
が図れ、接続信頼性が良く、かつバンプ電極が微細ピッ
チ化しても、確実に接続することができる。Further, according to the connection method of the present invention, when the bump electrode and the connection terminal of the semiconductor device face each other and approach each other, the recessed portion having a depth substantially equal to the diameter of the fine particles formed on the top surface of the bump electrode is formed. Since the common fine particles are embraced, the conductive fine particles must be interposed between the bump electrodes and the connection terminals, and the bump electrodes and the connection terminals can be connected by the anisotropic conductive adhesive, and therefore, stable. Connection can be achieved, the connection reliability is good, and even if the bump electrodes have a fine pitch, the connection can be made reliably.

［実施例］ 以下、第１図〜第10図を参照して、この発明の一実施
例を説明する。Embodiment An embodiment of the present invention will be described below with reference to FIGS. 1 to 10.

まず、第３図〜第10図を参照して、ICチップにバンプ
電極を形成する場合について説明する。第３図に示すよ
うに、予め、ICチップ10上の所定箇所にアルミニウム等
よりなるバッド電極11（図では２個のみを示すが、実際
には多数個ある）をパターン形成するとともに、このパ
ッド電極11の箇所を除くICチップ10の上面にパッシベー
ション膜12をパターン形成する。First, a case where bump electrodes are formed on an IC chip will be described with reference to FIGS. As shown in FIG. 3, a pad electrode 11 made of aluminum or the like (only two electrodes are shown in the figure, but there are actually many) is formed in a predetermined position on the IC chip 10 in advance and A passivation film 12 is pattern-formed on the upper surface of the IC chip 10 except for the location of the electrode 11.

この後、第４図に示すように、ICチップ10のパッシベ
ーション膜12および各パッド電極11上に下地金属層13を
真空蒸着またはスパッタリング等により被着する。しか
る後、第５図に示すように、下地金属層13上にメッキレ
ジスト14を所定の厚さで塗布し、このメッキレジスト14
をフォトリソグラフィ法により露光して現像することに
より、パッド電極11と対応する箇所のメッキレジスト14
を除去して開口部15を形成する。そして、第６図に示す
ように、電解メッキ等により開口部15内の下地金属層13
上にメッキ層を成長させて、銅、金、銀、半田等の金属
よりなるバンプ電極16を形成する。この場合、バンプ電
極16の高さはメッキレジスト14の厚さとほぼ同じである
ことが望ましいが、メッキレジスト14の厚さよりも薄く
ても、また厚くてもよい。Thereafter, as shown in FIG. 4, a base metal layer 13 is deposited on the passivation film 12 and the pad electrodes 11 of the IC chip 10 by vacuum evaporation or sputtering. Thereafter, as shown in FIG. 5, a plating resist 14 is applied on the underlying metal layer 13 to a predetermined thickness.
Is exposed and developed by a photolithography method, so that a plating resist 14 corresponding to the pad electrode 11 is formed.
Is removed to form an opening 15. Then, as shown in FIG. 6, the base metal layer 13 in the opening 15 is formed by electrolytic plating or the like.
A bump layer 16 made of a metal such as copper, gold, silver, or solder is formed by growing a plating layer thereon. In this case, the height of the bump electrode 16 is desirably substantially the same as the thickness of the plating resist 14, but may be smaller or larger than the thickness of the plating resist 14.

次に、第７図に示すように、メッキレジスト14および
バンプ電極16上にフォトレジスト17を塗布し、フォトリ
ソグラフィ法によりパターニングして、バンプ電極16の
上面にこれよりも小さい大きさの開口部18を形成する。
この後、第８図に示すように、フォトレジスト17をフォ
トマスクとして、等方性エッチングによりバンプ電極16
の上面をエッチングする。このエッチングは同図に点線
で示すように、フォトレジスト17の開口部18の開口面積
に応じて深さ方向および面方向にほぼ均等に進行して行
く。これにより、バンプ電極16の上面に所望の大きさの
陥没部19が形成される。この陥没部19の深さおよび大き
さはフォトレジスト17の開口部18の開口面積およびエッ
チング時間によって決定される。例えば、開口部18の開
口面積を狭くし形成してエッチング時間を長くすれば、
陥没部19は深くて狭い大きさに形成され、逆に開口部18
の開口面積を広くしてエッチング時間を短くすれば、陥
没部19は浅くて広い大きさに形成される。Next, as shown in FIG. 7, a photoresist 17 is applied on the plating resist 14 and the bump electrode 16 and patterned by a photolithography method, and an opening of a smaller size is formed on the upper surface of the bump electrode 16. Form 18.
Thereafter, as shown in FIG. 8, the bump electrode 16 is formed by isotropic etching using the photoresist 17 as a photomask.
Is etched on the upper surface of. This etching proceeds almost uniformly in the depth direction and the plane direction according to the opening area of the opening 18 of the photoresist 17, as shown by the dotted line in FIG. As a result, a depression 19 having a desired size is formed on the upper surface of the bump electrode 16. The depth and size of the depression 19 are determined by the opening area of the opening 18 of the photoresist 17 and the etching time. For example, if the opening area of the opening 18 is reduced and formed to increase the etching time,
The depression 19 is formed to be deep and narrow, and conversely, the opening 18
If the opening area is widened and the etching time is shortened, the depression 19 is formed shallow and wide.

最後に、第９図に示すように、フォトレジスト17およ
びメッキレジスト14を順に剥離し、かつバンプ電極16が
設けられた箇所以外の下地金属層13をエッチングして除
去すれば、陥没部19が形成されたバンプ電極16がICチッ
プ10上に突出して形成される。この陥没部19はバンプ電
極16の上面（頂面）16aに全周囲がバンプ電極16の側縁
部16bにより囲まれて形成されている。その形状は、フ
ォトレジスト17の開口部18が四角形状に形成されていれ
ば、第10図に示すように、ほぼ四角形状の凹部に形成さ
れ、また開口部18が円形状に形成されていれば、ほぼ半
球状の凹部に形成される。なお、陥没部19の大きさおよ
び深さについては後述する。Finally, as shown in FIG. 9, the photoresist 17 and the plating resist 14 are sequentially peeled off, and the underlying metal layer 13 other than the area where the bump electrode 16 is provided is removed by etching, whereby the depression 19 is formed. The formed bump electrode 16 is formed so as to protrude above the IC chip 10. The depressed portion 19 is formed on the upper surface (top surface) 16a of the bump electrode 16 so as to be entirely surrounded by the side edge portion 16b of the bump electrode 16. If the opening 18 of the photoresist 17 is formed in a square shape, as shown in FIG. 10, it is formed in a substantially square concave portion, and the opening 18 is formed in a circular shape. For example, it is formed in a substantially hemispherical concave portion. The size and depth of the depression 19 will be described later.

次に、第１図および第２図を参照して、上述したICチ
ップ10を基板20に接続する場合について説明する。Next, a case where the above-described IC chip 10 is connected to the substrate 20 will be described with reference to FIGS.

まず、第２図に示すように、予めICチップ10のバンプ
電極16と対応する接続端子21がパターン形成された基板
20上に導通用接着剤22を塗布する。この導通用接着剤22
は、絶縁性接着剤23中に導通用微粒子24を混合してな
り、接合状態において厚み方向には導電性を有するが、
面方向には絶縁性を呈する異方導電性接着剤である。絶
縁性接着剤23としては、熱可塑性樹脂よりなる熱溶融型
に属するホットメルト型のものが望ましいが、これに限
られず、後述する熱圧着時に一度溶融した後に硬化する
熱硬化性樹脂よりなるものでもよい。また、導通用微粒
子24としては、金、銀、銅、ニッケル、アルミニウム等
の金属粒子、またはカーボン粒子、あるいは無機、有機
等の絶縁性粒子の表面に導電膜を形成した導電性微粒子
等であるが、これ以外のもとして、上述した導電性微粒
子の外周面を電気的に隔絶する樹脂層で覆い、熱圧着時
に厚み方向の樹脂層が破壊されて導電面が露出し、かつ
面方向の樹脂層は破壊されずにそのまま残存するもので
もよい。いずれにおいても、導通用微粒子24はその直径
が10μｍ程度の大きさである。First, as shown in FIG. 2, a substrate on which connection terminals 21 corresponding to the bump electrodes 16 of the IC chip 10 are formed in advance is formed.
A conductive adhesive 22 is applied on 20. This conductive adhesive 22
Is formed by mixing conductive fine particles 24 in an insulating adhesive 23 and has conductivity in the thickness direction in a joined state,
This is an anisotropic conductive adhesive having an insulating property in the plane direction. The insulating adhesive 23 is preferably a hot-melt type belonging to a hot-melt type made of a thermoplastic resin, but is not limited to this, and is made of a thermosetting resin that is hardened after being melted once during thermocompression bonding described below. May be. The conductive fine particles 24 include metal particles such as gold, silver, copper, nickel, and aluminum, or carbon particles, or conductive fine particles formed by forming a conductive film on the surface of an insulating particle such as an inorganic or organic particle. However, as an alternative, the outer peripheral surface of the above-mentioned conductive fine particles is covered with a resin layer that electrically isolates the resin, the resin layer in the thickness direction is broken at the time of thermocompression bonding, the conductive surface is exposed, and the resin in the surface direction is exposed. The layer may remain without being destroyed. In any case, the diameter of the conducting fine particles 24 is about 10 μm.

次に、導通用接着剤22を介在させて基板20上にICチッ
プ10を上下反転させて配置し、第２図に示すように、IC
チップ10のバンプ電極16と基板20の接続端子21を対向さ
せて位置決めする。この場合、バンプ電極16に形成され
た陥没部19の大きさは、導通用接着剤22の導通用微粒子
24を複数個抱え込める大きさである。例えば、バンプ電
極16のピッチが微細（80〜100μｍ程度）であれば、バ
ンプ電極16が40〜50μｍ口程度となるので、陥没部19の
大きさは30〜40μｍ口程度に形成される。また、陥没部
19の深さは導通用微粒子24の直径（10μｍ程度）とほぼ
同じであることが望ましいが、それより浅くてもよい。Next, the IC chip 10 is placed upside down on the substrate 20 with the conductive adhesive 22 interposed therebetween, and as shown in FIG.
The bump electrodes 16 of the chip 10 and the connection terminals 21 of the substrate 20 are positioned so as to face each other. In this case, the size of the recess 19 formed in the bump electrode 16 is determined by the conductive fine particles of the conductive adhesive 22.
It is large enough to hold multiple 24. For example, if the pitch of the bump electrodes 16 is fine (about 80 to 100 μm), the size of the depressions 19 is about 30 to 40 μm because the bump electrodes 16 are about 40 to 50 μm. Also, the depression
The depth of 19 is preferably substantially the same as the diameter (about 10 μm) of the conducting fine particles 24, but may be shallower.

この後、バンプ電極16と接続端子21を対向させた状態
で熱圧着すると、導通用接着剤22の絶縁性接着剤23は熱
圧着時の熱により溶融して流動可能な状態となり、バン
プ電極16と接続端子21の接近により、その対向間から隣
接するバンプ電極16間および隣接する接続端子21間に流
れ出す。このとき、バンプ電極16の下では、絶縁性接着
剤23中に混合された導通用微粒子24が複数個（第１図で
は２個であるが、実際には２個以上）陥没部19内に抱き
込まれる。特に、導通用接着剤22として、導電性微粒子
の外周面が樹脂層で覆われた導通用微粒子24を用いた場
合には、導通用微粒子24を相互に密接させて絶縁性接着
剤23中に混合できるので、陥没部19は数多くの導通用微
粒子24を抱き込むことができる。Thereafter, when thermocompression bonding is performed with the bump electrode 16 and the connection terminal 21 facing each other, the insulating adhesive 23 of the conductive adhesive 22 is melted by heat at the time of thermocompression and becomes a flowable state. With the approach of the connection terminals 21, the liquid flows out between the opposing bump electrodes 16 and between the adjacent connection terminals 21. At this time, under the bump electrode 16, a plurality of conductive fine particles 24 mixed in the insulating adhesive 23 (two in FIG. 1, but actually two or more) are in the depression 19. Be embraced. In particular, when the conductive fine particles 24 in which the outer peripheral surface of the conductive fine particles is covered with the resin layer are used as the conductive adhesive 22, the conductive fine particles 24 are brought into close contact with each other, and the conductive fine particles 24 are contained in the insulating adhesive 23. Since the mixing can be performed, the depression 19 can embrace a large number of conductive fine particles 24.

そして、バンプ電極16と接続端子21が更に接近して、
第１図に示すように接触する際には、余分な絶縁性接着
剤23は陥没部19内から押し出されるが、陥没部19内に抱
き込まれた導通用微粒子24は陥没部19内から流れ出すこ
とがなく陥没部19内に残る。そのため、バンプ電極16と
接続端子21の間には必ず導通用微粒子24が存在すること
となり、この導通用微粒子24によりバンプ電極16と接続
端子20が接続される。したがって、バンプ電極16と接続
端子20の安定した接続が図れ、接続信頼性を高めること
ができ、かつバンプ電極16のピッチが微細化しても、バ
ンプ電極16の陥没部19が導通用微粒子24を逃さないの
で、確実に接続することができる。Then, the bump electrode 16 and the connection terminal 21 come closer to each other,
As shown in FIG. 1, when contact is made, the excess insulating adhesive 23 is pushed out of the recess 19, but the conductive fine particles 24 embraced in the recess 19 flow out of the recess 19. It remains in the depression 19 without any. Therefore, the conductive fine particles 24 always exist between the bump electrode 16 and the connection terminal 21, and the conductive fine particles 24 connect the bump electrode 16 and the connection terminal 20. Therefore, stable connection between the bump electrode 16 and the connection terminal 20 can be achieved, connection reliability can be improved, and even when the pitch of the bump electrode 16 is reduced, the depression 19 of the bump electrode 16 causes Since they are not missed, they can be securely connected.

なお、この発明は上述した実施例に限定されるもので
はない。例えば、陥没部19の大きさは、導通用接着剤22
の導通用微粒子24を複数個抱え込める大きさに形成する
必要はなく、最低１個の導通用微粒子24を抱え込める程
度の大きさであってもよい。接続端子21は必ずしも基板
20に設けられたものに限らず、TAB方式のテープキャリ
ア等のように基板20から突出したフィンガリード等であ
ってもよい。The present invention is not limited to the embodiment described above. For example, the size of the depression 19 is
The conductive particles 24 need not be formed in a size that can hold a plurality of the conductive particles 24, and may be a size that can hold at least one conductive particle 24. Connection terminal 21 is not necessarily a board
The present invention is not limited to the one provided on the substrate 20, but may be a finger lead or the like protruding from the substrate 20, such as a TAB type tape carrier.

［発明の効果］ 以上詳細に説明したように、この発明の半導体装置に
よれば、バンプ電極の頂面に全周囲がバンプ電極の側縁
部により囲まれた微粒子の直径とほぼ同じ深さの陥没部
を形成したので、例えば異方導電性接着剤を介在して接
続端子にバンプ電極を接続する際に、バンプ電極の陥没
部内に導通用微粒子を抱き込むことができ、したがって
安定した接続が図れ、接続信頼性を高めることができ
る。[Effects of the Invention] As described above in detail, according to the semiconductor device of the present invention, the entire periphery of the top surface of the bump electrode has the same depth as the diameter of the fine particles surrounded by the side edge of the bump electrode. Since the recessed portion is formed, for example, when connecting the bump electrode to the connection terminal via an anisotropic conductive adhesive, it is possible to embed the conductive fine particles in the recessed portion of the bump electrode, and thus a stable connection is achieved. And connection reliability can be improved.

また、この発明の接続方法によれば、半導体装置のバ
ンプ電極と接続端子を対向させて接近させる際に、バン
プ電極の頂面に形成された微粒子の直径とほぼ同じ深さ
の陥没部が導通用微粒子を抱き込むので、バンプ電極と
接続端子の対向間には、必ず導通用微粒子が介在するこ
ととなり、この導通用接着剤によりバンプ電極と接続端
子を接続することができ、したがって安定した接続が図
れ、接続信頼性が良く、かつバンプ電極が微細ピッチ化
しても、確実に接続することができる。Further, according to the connection method of the present invention, when the bump electrode and the connection terminal of the semiconductor device face each other and approach each other, the recessed portion having a depth substantially equal to the diameter of the fine particles formed on the top surface of the bump electrode is formed. Since the common fine particles are embraced, the conductive fine particles are always interposed between the bump electrodes and the connection terminals, and the bump adhesive and the connection terminals can be connected by the conductive adhesive. Thus, even if the bump electrodes are finely pitched, the connection can be surely made.

【図面の簡単な説明】 第１図〜第10図はこの発明の一実施例を示し、第１図は
導通用接着剤を介在させてICチップを基板に接続した状
態の断面図、第２図は導通用接着剤を介在させてICチッ
プを基板に熱圧着する状態を示す断面図、第３図〜第９
図は陥没部を有するバンプ電極をICチップに形成する行
程を示す各断面図、第10図はバンプ電極が形成されたIC
チップの要部平面図、第11図および第12図は従来例を示
し、第11図は異方導電性接着剤を介在してICチップを基
板に接続する状態を示す断面図、第12図はICチップを基
板に接続した状態の断面図である。 10……ICチップ、16……バンプ電極、16a……バンプ電
極の上面（頂面）、16b……バンプ電極の側縁部、19…
…陥没部、21……接続端子、22……導通用接着剤、23…
…絶縁性接着剤、24……導通用微粒子。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 to FIG. 10 show an embodiment of the present invention. FIG. 1 is a sectional view showing a state where an IC chip is connected to a substrate via a conductive adhesive. FIG. 3 is a cross-sectional view showing a state in which an IC chip is thermocompression-bonded to a substrate via a conductive adhesive, and FIGS.
The figures are cross-sectional views showing the process of forming a bump electrode having a depressed portion on an IC chip, and FIG. 10 is an IC on which a bump electrode is formed.
FIG. 11 is a plan view of a main part of the chip, and FIGS. 11 and 12 show a conventional example, and FIG. 11 is a cross-sectional view showing a state in which an IC chip is connected to a substrate via an anisotropic conductive adhesive. FIG. 3 is a sectional view showing a state where an IC chip is connected to a substrate. 10: IC chip, 16: Bump electrode, 16a: Upper surface (top surface) of bump electrode, 16b: Side edge of bump electrode, 19:
... Depressed part, 21 ... Connection terminal, 22 ... Adhesive for conduction, 23 ...
... insulating adhesive, 24 ... fine particles for conduction.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】バンプ電極と接続端子を絶縁性樹脂に粒子
を混合してなる接着剤を介して接続する半導体装置にお
いて、前記バンプ電極の頂面に全周囲が前記バンプ電極
の側縁部により囲まれた前記粒子の直径とほぼ同じ深さ
の陥没部を形成したことを特徴とする半導体装置。1. A semiconductor device in which a bump electrode and a connection terminal are connected via an adhesive made by mixing particles with an insulating resin, the entire periphery of the top surface of the bump electrode is formed by a side edge of the bump electrode. A semiconductor device, wherein a depression having a depth substantially equal to the diameter of the enclosed particle is formed. 【請求項２】バンプ電極と接続端子を絶縁性樹脂に粒子
を混合してなる接着剤を介して接続する半導体装置の接
続方法において、前記バンプ電極の頂面に全周囲が前記
バンプ電極の側縁部により囲まれた前記粒子の直径とほ
ぼ同じ深さの陥没部内に粒子を抱き込んで前記半導体装
置のバンプ電極と前記接続端子を接続することを特徴と
する半導体装置の接続方法。2. A method of connecting a semiconductor device in which a bump electrode and a connection terminal are connected via an adhesive obtained by mixing particles with an insulating resin, wherein the entire periphery of the top surface of the bump electrode is on the side of the bump electrode. A method of connecting a semiconductor device, comprising: embracing particles in a depression having a depth substantially equal to the diameter of the particles surrounded by an edge to connect the bump electrode of the semiconductor device to the connection terminal.
JP2022264A 1990-02-02 1990-02-02 Semiconductor device and connection method thereof Expired - Lifetime JP2928822B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2022264A JP2928822B2 (en) 1990-02-02 1990-02-02 Semiconductor device and connection method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2022264A JP2928822B2 (en) 1990-02-02 1990-02-02 Semiconductor device and connection method thereof

Publications (2)

Publication Number Publication Date
JPH03228334A JPH03228334A (en) 1991-10-09
JP2928822B2 true JP2928822B2 (en) 1999-08-03

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ID=12077912

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Application Number Title Priority Date Filing Date
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Country Link
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JP2012244080A (en) * 2011-05-24 2012-12-10 Kyocera Display Corp Flexible wiring board and display device

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Publication number Priority date Publication date Assignee Title
JPH11297759A (en) * 1998-04-08 1999-10-29 Seiko Epson Corp Semiconductor chip mounting structure and liquid crystal display device
TW464927B (en) * 2000-08-29 2001-11-21 Unipac Optoelectronics Corp Metal bump with an insulating sidewall and method of fabricating thereof
JP2002270641A (en) * 2001-03-12 2002-09-20 Asahi Kasei Corp Anisotropic conductive film for bare chip
JP5002633B2 (en) * 2009-09-30 2012-08-15 三洋電機株式会社 Semiconductor module and portable device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012244080A (en) * 2011-05-24 2012-12-10 Kyocera Display Corp Flexible wiring board and display device

Also Published As

Publication number Publication date
JPH03228334A (en) 1991-10-09

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