JP2906444B2 - Image recording device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an image recording apparatus that records a still image on a recording medium.

2. Description of the Related Art A digital still camera is an example of an image recording apparatus. Such a still camera generally uses a memory element having a relatively low writing speed as an external recording medium. In order to increase the continuous shooting speed, a plurality of frame memories are provided in the camera body, and A configuration has been proposed in which a captured image is written to another frame memory while a stored image of one frame memory is written to an external recording medium (for example, Japanese Patent Application Publication No.
64485).

[Problems to be Solved by the Invention] However, in the above-described conventional example, for example, in order to increase the continuous shooting speed, the number of frame memories of the camera body must be increased. In addition, power consumption increases with an increase in the amount of memory.

Therefore, an object of the present invention is to provide an image recording apparatus which has solved such a disadvantage.

[Means for Solving the Problems] An image recording apparatus according to the present invention is an image recording apparatus for recording image information on a recording medium, and specifies a memory for temporarily storing image signals in screen units and a continuous recording speed. And a compression unit that can select a signal compression ratio, and the compression unit compresses the read signal of the memory at a compression ratio corresponding to the continuous recording speed specified by the specification unit.
The compressed signal is supplied to a recording medium.

[Operation] By performing compression by the compression means, even if the continuous recording speed is increased, the supply speed to the recording medium can be suppressed according to the compression ratio. That is, a dedicated memory for continuous recording is not required.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
In FIG. 1, reference numeral 10 denotes a photographing lens, 12 denotes an aperture, and 14 denotes a shutter, which constitute a photographing optical system. 16 is a solid-state imaging device for converting an optical image by a photographing optical system into an electric signal, 18 is an amplifier, and 20 is for digitizing an analog signal
An A / D converter, 22 is a timing control circuit, and 24 is an oscillation circuit that generates a reference signal of the timing control circuit 22. 26 is a frame memory for temporarily storing a captured image signal, 28 is a memory control circuit for controlling the frame memory 26, 30 is a write address generation circuit for generating a write address signal for the frame memory 26, and 32 is a read address. A read address generating circuit 36 for applying one of the outputs of the write address generating circuit 30 and the read address generating circuit 32 to an address terminal of the frame memory 26;
Is a buffer for switching between writing and reading.

40 is a system control circuit for controlling the whole of the illustrated device, 42
Is a compressor with a compression ratio a1 (1/2 in this embodiment), and 44 is a compression ratio a
2 (1/4 in this embodiment) compressor, 46 is a compressor with a compression ratio a3 (1/6 in this embodiment), and 48 is a non-compressor without compression (that is, a compressor with a compression ratio of zero). is there. 50 is the compressor 42,44,
A switch for switching an address, data, and a write signal from the compressor 46 and the non-compressor 48, and a memory 52 for controlling data writing to the external memory pack 54 by using the address, data, and the write signal selected by the switch 50. This is a pack control circuit.

The external memory pack 54 includes, for example, a battery-backed SRAM, a large-capacity DRAM whose writing speed is reduced to reduce power consumption, and a solid-state memory device such as an EEPROM which does not require a battery backup but has a low writing speed. The writing speed of each memory pack is 200 nsec / byte for battery backup SRAM, 2 μsec / byte for battery backup low power consumption DRAM, and 31 μsec / byte for EEPROM. Also, the pixel size of the frame memory 26 is 512 × 4
When 80 pixels are used, all signals for one screen are stored in the external memory
The time required to write to the pack 54 is 49msec for battery backup SRAM and low power consumption DR for battery backup
It is 490msec for AM and 7.61sec for EEPROM.

Reference numeral 56 denotes a shutter switch linked to the operation of the shutter button, 58 and 60 are switches for selecting a continuous shooting mode, 62 is a switch interface circuit, and 64 is a continuous shooting mode selection signal by the switches 58 and 60. 44,46 and no compressor
48 selection signals ▲ ▼, ▲ ▼, ▲ ▼, ▲
This is a BCD binary decoder that converts to ▼. 66
Is a switch for selecting addresses and read signals of the compressors 42, 44, 46 and the non-compressor 48 and applying the signals to the read address generating circuit 32.

Next, the operation of FIG. 1 will be described. When the shutter button is pressed, the system control circuit 40 controls the aperture 12 so that the optimal amount of light is incident on the image sensor 16, and operates the shutter 14 for a shutter time set by a shutter speed setting device (not shown). open. The image sensor 16 converts an optical image obtained by the photographing optical system into an electric signal. The electric signal is sequentially read out in synchronization with the timing signal from the timing control circuit 22, amplified by the amplifier 18, and converted into an 8-bit digital signal by the A / D converter 20, for example. The timing control circuit 22 appropriately divides the frequency of the clock from the oscillator 24 to generate a timing signal for each operation of the image sensor 16, the A / D converter 20, and the memory control circuit.

At the same time as closing the shutter 14, the system control circuit 40 sets the signal ロ ー to low (L), activates the buffer 38, and outputs the output of the A / D converter 20 to the frame memory 26.
Lead to. By the signal ▲ ▼, the switch 36 is connected to the output side of the write address generation circuit 30, and the frame memory 26 synchronizes with the write signal of the memory control circuit 28,
The data from the buffer 38 is written to an address based on the write address signal of the write address generation circuit 30. When a series of readings from the image sensor 16 is completed, the memory control circuit 28 sends a capture end signal to the system control circuit 40 to notify the frame memory 26 that the image has been captured.
When the capture of one screen into the frame memory 26 is completed, the write address generation circuit 30 stops its operation and suppresses power consumption.

Next, the system control circuit 40 reads the state of the continuous shooting mode selection switches 58 and 60 via the switch interface circuit 62, and controls the switches 50 and 66 as shown in Table 1 by the control signals SEL1 and SEL2. The continuous shooting speed can be selected by switches 58 and 60 as shown in Table 1.

The frame capture mode will be described. At this time, switches 58 and 6
0 is both on. In frame capture mode, the shutter
Each time the button is pressed, the shutter 14 opens and closes, and the image sensor
The image signal by 16 is temporarily stored in the frame memory 26 by the above procedure. As shown in Table 1, the no-compressor 48 is selected, and the switches 50 and 66 are switched by the control signals SEL1 and SEL2.
48, the image signal stored in the frame memory 26 is read out according to the read address signal of the read address generation circuit 32, and sent to the external memory pack 54 via the no-compressor 48 and the memory control circuit 52. Written. For example, when a large-capacity DRAM is used for the external memory pack 54, a memory pack having a capacity of about 2 Mbytes has been prototyped with the current technology.
Eight images of × 480 pixels can be stored.

The case of continuous shooting will be described. Switch with switch 58 off
When 60 is off, 4 frames / sec. When switch 58 is on and switch 60 is off, 8 frames / sec. When switch 58 is off and switch 60 is on, 12 frames / sec. The time allowed to store one image in the external memory pack is 250 msec, which is about twice the writing speed of 490 msec of the external memory pack 54 made of DRAM. Therefore, in this case, the amount of recorded information is reduced to half by the compressor 42, and the time required to write one pixel into the external memory pack 54 is reduced. Similarly, in the case of 8 frames / sec, the amount of write information is compressed to 1/4 by the compressor 44, and in the case of 12 frames / sec, it is compressed to 1/6 by the compressor 46.

At the time of continuous shooting, one of the compressors 42, 44, 46 may be activated, so that power to the unused compressors 42, 44, 46 and the no-compressor 48 is cut off from the viewpoint of saving power consumption. It is preferable to keep it.

Such compressors 42, 46, 48 are, for example, as follows. That is, the compressor 42 performs 1/2 compression with the 4-bit DPCM quantization table, and the compressor 44 performs sub-sampling and DPC.
The M quantization table performs 1/4 compression with 4 bits.
The representative value for each pixel is compressed by 1/6 using a 4-bit DPCM quantization table.

In the above embodiment, different compression processes are performed by selectively using a non-compressor and a plurality of compressors.However, a high-speed digital signal processing circuit capable of externally controlling the compression ratio is used, and an external control signal is used. The image compression ratio (including no compression) may be switched. Further, the case where the external memory pack is a solid-state memory element has been described as an example, but it goes without saying that other recording media such as a magnetic bubble memory, a magnetic disk, and an optical disk may be used. Furthermore, as a compression method
Although the case of DPCM was explained, other vector quantization,
Block coding, discrete cosine transform, or the like may be used.

Further, the electronic still camera has been described as an example, but the present invention is not limited to this, and it is needless to say that the present invention can be applied to other recording apparatuses.

[Effect of the Invention] As can be easily understood from the above description, according to the present invention, a continuous image can be recorded on a relatively low-speed image recording medium without increasing the memory capacity. Was.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of one embodiment of the present invention. 10: photographic lens, 12: aperture, 14: shutter, 16: solid-state image sensor, 18: amplifier, 22: timing control circuit, 26: frame memory, 28: memory control circuit, 30: write address generation circuit, 32: Read address generation circuit, 38: buffer, 40:
System control circuit, 42, 44, 46: compressor, 48: no compressor, 5
2: Memory pack control circuit, 54: External memory pack, 5
6: Shutter switch, 58, 60: Continuous shooting mode switch, 6
4: BCD binary decoder

Claims (1)

(57) [Claims] 1. An image recording apparatus for recording image information on a recording medium, comprising: a memory for temporarily storing an image signal on a screen basis; a designating means for designating a continuous recording speed; Means for compressing a read signal from the memory at a compression rate according to the continuous recording speed specified by the specifying means, and supplying the compressed signal to a recording medium. apparatus.