JP2900879B2 - Bipolar multiplier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplier for multiplying two analog signals, and more particularly to a linearized four-quadrant multiplier suitable for being constructed on a bipolar semiconductor integrated circuit.

[0002]

2. Description of the Related Art As a prior art of a multiplier, for example, reference (1), “B. Gilbert,“ A Precise Four-Quadra ”
nt Analog Multiplier with Subnanosecond respons
e ”, IEEEJ. Solid-State Circuits, vol.SC-3, no.4,
pp. 353-365, Dec. 1968. "

At present, a complete bipolar multiplier performing this type of linear operation has not yet been realized. A moderately linearized bipolar multiplier of this kind was also published in 1968, and Gilbert multiplier
Well known as However, the voltage-current (V-
I) It is well known that if a conversion circuit operates completely linearly, a complete 4-quadrant multiplier that operates linearly can be obtained even with a Gilbert-type multiplier using cross-connected bipolar differential pairs.

The relationship between the collector current I _{ci of the} transistor and the base-emitter voltage V _BEi follows an exponential law and is expressed by the following equation (1).

[0005]

(Equation 1)

[0006] Here, I _s is the saturation current, V _T is the thermal voltage, denoted as V _T = kT / q. Here, q is a unit electron charge, k is a Boltzmann constant, and T is an absolute temperature.

The above equation (1) represents the base-emitter voltage V
_When a transistor having a _{BEi of} about 600 mV normally operates, the exponent exp (V _BEi / V _T ) becomes a value of about 10 power,
-1 can be ignored. Therefore, the following equation (2) holds.

[0008]

(Equation 2)

First, the operation of the inverse hyperbolic tangent-hyperbolic tangent conversion circuit shown in FIG. 7 will be described. First current (V-I) conversion circuit 72 and 73, V-I conversion circuit 73 - with reference to FIG. 7, first, second input voltage V _x, the voltage to the current output type the V _y A first differential pair transistor Q1, Q2 having an emitter commonly connected to a current output terminal of the first differential pair transistor Q2, and a second differential pair transistor Q3 having an emitter commonly connected to a second current output terminal of the VI conversion circuit 73; Q4 and diode-connected transistors Q5 and Q6 having emitters connected to the first and second current output terminals of the VI conversion circuit 72, respectively.
The collectors of the transistors Q1 and Q3 and the collectors of the transistors Q2 and Q4 are cross-connected to each other and connected to a differential-to-single-ended converter 74, and the emitters of the transistors Q5 and Q6 are connected to each other. First, the differential input of the second differential pair transistor is input, and a differential current is taken out from the collectors of the transistors Q1, Q3 and Q2, Q4. Voltage-current (V-
I) The conversion circuit is called a “linear gain cell”.

[0010] Linear differential output current of the gain cell 72 I _x ^+, I _x ^- diode connected to the transistors Q5,
When Q6 is driven, it is given by the following equations (3) and (4).
However, V _BE5, V _BE6 is the base-emitter voltage of the transistor Q5, Q6, the G _x is 1/2 of the conductance of a linear gain cells ^{_{(ΔI = I x + -I x}} - = 2G
_x V _x ).

[0011] ^{_{I x + = I Ox + G}} x V x = I s exp (V BE5 / V T) ... (3) I x - = I Ox -G x V x = I s exp (V BE6 / V T) …(Four)

Therefore, the output voltage ΔV _x of the diode-connected transistors Q5 and Q6 is given by the following equation (5).

[0013]

(Equation 3)

The differential output current of the bipolar transistor differential pair becomes a hyperbolic tangent function, and the differential output current ΔI of the cross-coupled bipolar differential pair Q1, Q2 and Q3, Q4 is derived by the following equation (6). I will

[0015]

(Equation 4)

However,

[0017]

(Equation 5)

## EQU1 ##

Therefore, if the output current of the VI conversion circuit 72, which operates linearly, is converted into a voltage by using a pn junction, an inverse hyperbolic tangent circuit is formed, and the cross-connected bipolar differential pair Q1, Q2, which is a hyperbolic tangent circuit, is formed. , And Q3 and Q4, a linear operation can be realized also with respect to the input signal voltage of the cross-connecting bipolar differential pair.

Similarly, a cross-connecting bipolar differential pair Q
1, Q2, and the differential output current (I
_0y ± G _y V _y ), by _performing inverse hyperbolic tangent-hyperbolic tangent conversion, a linear operation can be performed as shown in the following equation (9).

[0021]

(Equation 6)

However,

[0023]

(Equation 7)

## EQU1 ##

Therefore, the following equation (12) is obtained, and a complete four-quadrant multiplier that operates linearly is obtained.

[0026]

(Equation 8)

[0027]

In analog signal processing, a multiplier is an indispensable function block. In particular, there is a growing need for a complete four quadrant multiplier that operates linearly with two input voltages.

The conventional Gilbert multiplier cannot realize a complete inverse hyperbolic tangent-hyperbolic tangent conversion because the voltage-current (VI) conversion circuit does not operate completely linearly.
For this reason, the conventional Gilbert multiplier has not been a complete four-quadrant multiplier that operates linearly with respect to two input voltages.

Accordingly, the present invention has been made in view of the above circumstances, and has as its object to provide a multiplier which is particularly important in analog signal processing, with a completely operating linearly for two input voltages. The purpose is to provide a four-quadrant multiplier.

[0030]

In order to achieve the above object, the present invention provides a first and a second signal receiving a first signal and a second signal and outputting a differential current corresponding to an input voltage. A voltage-current conversion circuit, a pn junction element for converting the output current of each of the first and second voltage-current conversion circuits to a voltage, and the pn junction element connected to the first and second voltage-current conversion circuits. p
a linear gain cell group that operates as a differential input voltage with a voltage between n-junction elements as a differential input voltage and outputs a sum or a differential voltage between them, and first to fourth transistors that have outputs commonly connected to form a differential output pair And a multiplier core circuit for multiplying two signals by a quad tail cell driven by a common tail current.
Provide a multiplier.

[0031]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an embodiment of the present invention.

Referring to FIG. 1, in the present invention, a diode is used as a load and a first input signal (V _x ) is connected to each of the diodes.
And the second input signal (V _y ) are input to the two voltage-current conversion circuits 101 and 102, and the first and second two voltage-current conversion circuit outputs 101 and 102 are respectively output by the voltage. Pn junction elements 103-1 and 103- to be converted
2, 104-1 and 104-2, and linear gain cells 105 and 106 that operate linearly to output the sum or difference voltage by using the voltage between the pn junction elements of the respective voltage-current conversion circuits as a differential input voltage. Linear gain cell 10
The output voltages V1 to V4 of the transistors 5 and 106 are used as the base inputs of the respective transistors, and the outputs are commonly connected to form two differential transistor pairs Q1, Q2 and Q2.
3, Q4 comprises quad tail cells driven by a common tail current I ₀ .

In the embodiment of the present invention, a differential input voltage is obtained by using a linear gain cell as shown in FIG. 2 as the voltage-current (VI) conversion circuits 101 and 102 which operate linearly. Is inversely hyperbolic tangent transformed by logarithmic compression, and a desired sum or difference voltage is obtained between the two voltages. The base of a quadritail cell in which four transistors Q1 to Q4 are driven by a common tail current Voltage can be realized and the quad tail cell can be operated as a multiplier core circuit, thus
It is possible to realize a complete four-quadrant multiplier which is equivalently hyperbolic tangent transformed and operates linearly.

[0034]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Here, in order to explain the above-mentioned embodiment of the present invention in more detail, an embodiment of the present invention will be described with reference to the drawings. Hereinafter, a circuit in which three or more transistors are driven by one common tail current is referred to as a “multi-tail cell”.
, And in the case of four transistors, a “quadritail cell”.

An embodiment of the present invention will be described in detail with reference to FIG. The first input signal voltage (V _x) and a second input signal voltage (V _y) and two voltages is input - current (V-
I) The differential outputs of the conversion circuits 101 and 102 use the diodes 103 and 104 as loads, and output difference voltages ΔV _x and ΔV _y between the terminals of the diodes.

A plurality of linear gain cells 105 and 106 having the differential voltages ΔV _x and ΔV _y as differential inputs provide a desired sum voltage of the differential voltages ΔV _x and ΔV _y or differential voltages V 1 to V _y.
4 and the four transistors Q1 of the bipolar quadritail cell constituting the multiplier core circuit.
To Q4.

FIG. 2 shows a configuration example of a voltage-current (VI) conversion circuit as a specific diode load as one embodiment of the present invention.

Referring to FIG. 2, the bases of two transistors Q1 and Q2 driven at a constant current by a constant current source I _0X are connected.
The emitter-to-emitter voltages V _BE1 and V _BE2 become the same when the drive current is made equal, and the differential input voltage V _x is applied to the emitter-to-emitter resistance as it is. Therefore, transistors Q1, Q
Since the second emitter resistor R _x is a linear element, the current flowing through the emitter resistor R _x is proportional to the differential input voltage V _x, and inversely proportional to the resistance value R _x. However, since the two transistors Q1 and Q2 forming the differential pair are driven by a constant current, the transistors Q5 and Q6 connected to the emitters of the respective transistors Q1 and Q2 have a resistance between the emitters. The current that is added or subtracted by the flowing current flows. For this reason, the voltage-current (V-
I) The conversion circuit operates linearly.

The voltage-current (VI) shown in FIG.
The conversion circuit functions as a linear gain cell because it operates linearly. Therefore, by adding a current mirror circuit with an emitter follower to the linear gain cell shown in FIG. 2 (connecting the input terminal of the current mirror circuit to the emitters of the transistor pair Q1 and Q2), a current output linear gain cell is provided. Becomes

Since the differential outputs are provided, the current outputs of the plurality of linear gain cells are added to each other in a wired manner to form a resistive load, so that the input voltage ΔV _x to each linear gain cell is equivalently obtained. Sum voltage of ΔV _y aΔV _x + b
ΔV _y or the difference voltage a′ΔV _x −b′ΔV _y is obtained differentially.

Since the multiplier core circuit of the block diagram shown in FIG. 1 is a bipolar quad tail cell, assuming that the matching between elements is good, the bipolar core circuit driven by the tail current _IEEE is used. The collector current of each quadritail cell is given by the following equations (13) to (16).

[0042]

(Equation 9)

Where V _R is the DC voltage of the input signal, V _E
Is the common emitter voltage.

Further, from the condition of the tail current, it is expressed as: I _C1 + I _C2 + I _C3 + I _C4 = α _F I _O (17) Here, α _F is the DC current gain of the transistor. Solving equation (17) from equation (13) leads to the following equation (18).

[0045]

(Equation 10)

Referring to FIG. 1, the differential output current .DELTA.I of the bipolar
2 and the sum of the collector currents of the transistors Q3 and Q4.
9).

[0047]

[Equation 11]

An embodiment of the present invention will be described with reference to FIG. FIG. 3 shows an embodiment of the multiplier core circuit according to the present invention. Referring to FIG.
Quaterphenyl de four respective voltage applied to the base of the transistor Q1~Q4 retail _{cell, V 1 = aΔV x + bΔV} y, V 2 = (a-1) ΔV x + (b-1) ΔV y, V _{3 = (a-1) ΔV} x + bΔV y, V 4 = aΔV x + (b-1) ΔV y, is the, these, are substituted into the above equation (19), bipolar multipliers of the differential output current ΔI is given by the following equation (2)
0).

[0049]

(Equation 12)

This is a well-known double-balanced differential amplifier in which the right side of the above equation (20) is multiplied by α _F , and is called a “Gilbert multiplier cell” or “Gilbert cell”. In a typical bipolar process, α _F is
0.98 to 0.99, which is close to 1.

Accordingly, the transfer characteristics of the bipolar multiplier using the conventional quadritail cell are almost equal to those of the Gilbert multiplier cell. However, since the transistors are not stacked vertically, operation at low voltage is possible.

However, the transfer characteristic represented by the above equation (20) has poor linearity with respect to the input voltage, similarly to the Gilbert multiplier cell.

Here, ΔV _x and ΔV _y are obtained as follows.

[0054] shown in FIG. 2, and inputs the differential input voltage V _x, the voltage to the diode load - differential output current of the current (V-I) conversion circuit (101 in FIG. 1) are respectively the following formulas ( 21) and (22).

[0055] ^{_{I x + = I Ox + V}} x / R x = I s exp (V BE5 / V T) ... (21) I x - = I Ox -V x / R x = I s exp (V BE6 / V _T )… (22)

Therefore, the differential output voltage ΔV _x is given by the following equation (23).

[0057]

(Equation 13)

Similarly, the differential output current of the voltage-current (VI) conversion circuit (102 in FIG. 1) which receives the differential input voltage _Vy as an input and uses a diode load is expressed by the following equation (2).
4), given by (25). However, V _BE7 and V _BE8 are
This transistor is obtained by replacing the transistors Q5 and Q6 in FIG. 2 with Q7 and Q8, and is the base-emitter voltage of the transistor corresponding to the diode 104 in FIG.

[0059] ^{_{I y + = I Oy + V}} y / R y = I s exp (V BE7 / V T) ... (24) I y - = I Oy -V y / R y = I s exp (V BE8 / V _T )… (25)

[0060] Therefore, the differential output voltage [Delta] V _y is given by the following equation (26).

[0061]

[Equation 14]

Equations (23) and (26) are replaced by Equation (2)
0), the following equation (27) is derived.

[0063]

(Equation 15)

However,

[0065]

(Equation 16)

Is as follows.

Thus, a complete four-quadrant analog multiplier operating linearly is obtained.

From the above description of the operation of the bipolar multiplier of the embodiment of the present invention, the voltage applied to the base of each of the four transistors of the bipolar quadritail cell constituting the multiplier core circuit, V _{1 = aΔV x + bΔV y, V} 2 = (a-1) ΔV x + (b-1) ΔV y, V 3 = (a-1) ΔV x + bΔV y, V 4 = aΔV x + (b-1) ΔV It has been found that the constants a and b can be any values for _y and.

In the above-described linear gain cell, the arbitrary constants a and b can be set by setting the resistance between the emitters and the like.
Cannot be achieved. That is, by setting the constants a and b to specific values, a complete four-quadrant analog multiplier that operates linearly can be obtained.

For example, as another embodiment of the present invention, a =
If 1, b = 1, it can be easily realized by increasing the number of outputs of the current mirror circuit of the two linear gain cells. In this case, a connection circuit diagram of two linear gain cells is shown in FIG.

Referring to FIG. 4, difference voltages (ΔV _x , ΔV _y )
Are connected to each other, and the outputs of the current mirror circuits are connected to each other, and the sum or difference current of each is obtained. The voltages V1 to V4 are extracted from the terminal voltage of the load resistor R / 2 by the obtained current. The first linear gain cell includes differential pair transistors Q1 and Q2 each having an emitter connected by a resistor R, a differential voltage ΔV _x as a base input, and a collector connected to a constant current source I ₀ , respectively. The currents I ₀ ± G _x ΔV _x are respectively input to input terminals of first and second current mirror circuits (including an emitter follower circuit), and output terminals of these current mirror circuits (each having two output terminals). provided) is connected to the power supply VCC through a resistor R / 2 second third linear gain cells, are commonly connected to the output terminal of the fourth current mirror circuit which receives the difference voltage [Delta] V _y . The same applies to the second linear gain cell.

Similarly, a = 1/2, b = 1 or b = 0
Then, it can be easily realized by increasing the number of outputs of the current mirror circuit of the two linear gain cells. FIG. 5 shows a connection circuit diagram of two linear gain cells in this case.

If a = １ ／ and b = １ ／, then
This can be easily realized by increasing the number of outputs of the current mirror circuit of the two linear gain cells. FIG. 6 shows a connection circuit diagram of two linear gain cells in this case.

The above embodiment has an effect that an ideal multiplier having a completely linear input voltage range near 1 V _PP at a low voltage of about 1.9 V can be realized. This is because a linear gain cell that operates linearly is configured as a current mirror circuit output to enable low-voltage operation.

[0075]

As described above, according to the present invention,
This has the effect of realizing a complete four-quadrant multiplier that operates linearly. This is because, in the present invention, a complete linear circuit and a complete inverse hyperbolic tangent circuit are realized.

Further, according to the present invention, there is an effect that an ideal multiplier having a completely linear input voltage range close to 1 V _PP at a low voltage of about 1.9 V can be realized.

This is because, in the present invention, the linear gain cell that operates linearly is configured as a current mirror circuit output to enable low-voltage operation.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a bipolar multiplier according to an embodiment of the present invention.

FIG. 2 is a diagram for describing an embodiment of the present invention, and is a diagram illustrating a configuration example of a voltage-current (VI) conversion circuit using a diode as a load.

FIG. 3 is a diagram for explaining an embodiment of the present invention, and is a diagram showing a bipolar multiplier core circuit.

FIG. 4 is a circuit diagram showing one embodiment of a linear gain cell according to the present invention.

FIG. 5 is a circuit diagram showing another embodiment of the linear gain cell according to the present invention.

FIG. 6 is a circuit diagram showing still another embodiment of the linear gain cell according to the present invention.

FIG. 7 is a diagram illustrating a conventional inverse hyperbolic tangent-hyperbolic tangent conversion circuit for realizing a four-quadrant multiplier.

[Explanation of symbols]

 101, 102 VI conversion circuit 103, 104 Diode 105, 106 Linear gain cell Q1 to Q9 Transistor R Resistance VCC Power supply I0 Current source

Claims (5)

(57) [Claims] 1. A first and second voltage-current conversion circuit for receiving a first signal and a second signal and outputting a differential current according to an input voltage; and the first and second voltages. A pn junction element for converting the output current of each current conversion circuit into a voltage, and a voltage between the pn junction elements connected to the first and second voltage-current conversion circuits as a differential input voltage; Alternatively, a linear gain cell group that performs a linear operation that outputs a difference voltage, and two transistor pairs including first to fourth transistors that are commonly connected to each other to form a differential output pair are driven by a common tail current. And a multiplier core circuit configured by a quadritail cell and multiplying two signals. Wherein said first, second voltage - the pn junction element voltage which is connected to the current conversion circuit upon the [Delta] V _x, [Delta] V _y, of four transistors constituting the multiplier core circuit Base voltage (V1, V2, V3, V4)
But _{each, aΔV x + bΔV y, (} a-1) ΔV x + (b-1) ΔV y, (a-1) ΔV x + bΔV y, aΔV x + (b-1) ΔV y, ( where, a 2. The bipolar multiplier according to claim 1, wherein b is an arbitrary constant. 3. The bipolar multiplier according to claim 2, wherein a = 1 and b = 1. 4. The bipolar multiplier according to claim 2, wherein a = 1/2, b = 1 or b = 0. 5. The method according to claim 2, wherein a = 1/2 and b = 1 /
A bipolar multiplier, characterized in that the number is 2.