JP2871932B2 - Frequency stabilization circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a π / 4 shift QPSK.
The present invention relates to a frequency stabilization circuit for a signal receiver.

[0002]

2. Description of the Related Art As shown in FIG. 2, a conventional frequency stabilizing circuit receives a π / 4 shifted QPSK signal S _IN and a local oscillation signal S _LO and outputs a frequency-converted intermediate frequency signal S _IF . , A reference oscillator 22 for outputting a reference signal S _REF having a reference frequency f _REF , an intermediate frequency signal S _IF and a reference signal S _REF, and an intermediate frequency signal S _IF based on the reference signal S _REF. a frequency measurement circuit 23 for a frequency f _IF and outputs the measurement data D ₁₁ of,
And voltage data generating circuit 24 for generating a voltage data D ₁₂ according to the measured data D _11, the voltage data D ₁₂ to digital-to-analog conversion, and digital-to-analog converter 25 to output as the control voltage V _CONT, the control voltage V _CONT and a voltage controlled oscillator 26 as a local oscillator for outputting a local oscillation signal S _LO having a frequency f _LO corresponding. That is, conventional frequency stabilization circuit measures the intermediate frequency signal S _IF frequency f _IF, and stabilize the frequency. In addition,
The frequency-stabilized intermediate frequency signal _SIF is supplied to the demodulation circuit 27.
Is demodulated.

[0003]

However, in the conventional frequency stabilizing circuit, the π / 4 shift QPSK signal S _IN
Measures the frequency f _IF of the frequency-converted intermediate frequency signal S _IF to stabilize the frequency. Therefore, when transmission data of the π / 4 shifted QPSK signal S _IN is biased, that is, π / 4 When the average value of the frequency of the shifted QPSK signal is different from the carrier frequency, there is a problem that the voltage controlled oscillator cannot be stabilized at the correct oscillation frequency.

According to the present invention, regardless of the bias of transmission data,
It is an object of the present invention to provide a frequency stabilizing circuit that can stabilize a local oscillator at a correct oscillation frequency.

[0005]

According to the present invention, a QPS is provided.
Frequency conversion means for receiving the K reception signal and the local oscillation signal and outputting an intermediate frequency signal; reference frequency generation means for outputting a reference signal having a predetermined frequency; and a frequency of the intermediate frequency signal based on the reference signal. Frequency stabilizing circuit having a frequency measuring means for measuring the frequency of the intermediate frequency signal, and a local oscillation means for outputting the local oscillation signal based on the frequency measured by the frequency measuring means. Baud timing extracting means for outputting a phase change signal, a phase measuring means for measuring a phase change of the intermediate frequency signal in units of each baud section defined by the baud timing signal, a phase measured by the phase measuring means and a predetermined phase Phase error measuring means for measuring an error between the baud timing signal and the error signal, and outputting an error signal. Wherein the reference signal divides the frequency stabilization circuit, characterized in that it comprises a frequency adjusting means for outputting a divided signal to said frequency measuring means in place of the intermediate frequency signal is obtained.

In a frequency stabilizing circuit of a π / 4 shift QPSK signal receiver, a mixer for frequency-converting a π / 4 shift QPSK reception signal based on a local oscillation signal, and a frequency-converted π / 4 shift QP
A baud timing extraction circuit for extracting a baud timing from the SK reception signal and outputting a timing signal, and a reference for generating a reference signal having a frequency that is an integral multiple of the frequency of the carrier signal of the frequency-converted π / 4 shift QPSK reception signal An oscillator and the frequency-converted π / 4 shift QPS
A phase change measuring circuit for determining a phase change in each baud section defined by the timing signal of the K reception signal with reference to the reference signal; and a value of the phase change measured by the phase change measuring circuit being ± a phase error measuring circuit for measuring a deviation from any one of π / 4 and ± 3π / 4 radians, a multiplier for outputting deviation data proportional to the deviation, A programmable counter that divides the reference signal based on data and outputs a divided signal; a frequency measurement circuit that measures the frequency of the divided signal based on the reference signal; and a frequency that is measured by the frequency measurement circuit. A voltage data generating circuit that outputs voltage data corresponding to the voltage data, a digital-to-analog converter that converts the voltage data from digital to analog, and the analog-converted voltage data. Frequency stabilization circuit is obtained, characterized in that it comprises a voltage controlled oscillator for generating said local oscillation signal having a frequency based on.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of one embodiment of the present invention. Here, the same components as those in the related art are denoted by the same reference numerals. As shown in FIG. 1, the frequency stabilization circuit of the present embodiment includes a baud timing extraction circuit 11, a phase change measurement circuit 12,
It has a phase error measurement circuit 13, a multiplier 14, and a programmable counter 15. Further, as in the conventional case, it has a mixer 21, a reference oscillator 22, a frequency measuring circuit 23, a voltage data generating circuit 24, a digital / analog converter 25, and a voltage controlled oscillator 26.

Next, the operation of the frequency stabilizing circuit will be described. The π / 4 shift QPSK signal S _IN input to the mixer 21 is frequency-converted based on the local oscillation signal S _LO and output as an intermediate frequency signal S _IF . That is, π /
4 shift QPSK signal S _IN of the frequency f _IN and the local oscillation signal S _LO frequency f _LO and the carrier frequency f _IF the difference between [pi /
The 4-shift QPSK signal is output as the intermediate frequency signal _SIF . This intermediate frequency signal _SIF is input to the baud timing extraction circuit 11 and the phase change measurement circuit 12.

[0009] Bo timing extracting circuit 11 extracts the baud timing from the intermediate frequency signal S _IF, and outputs a timing signal S _1. Further, the phase change measuring circuit 12 detects the phase change of the intermediate frequency signal _{SIF in} units of baud intervals determined by the timing signal,
It is measured with an accuracy of 2π / N with reference to _REF . Measurement result is input as a phase change information D ₁ to the phase error measuring circuit 13. Here, the reference oscillator 22 is outputting the reference signal S _REF having an intermediate frequency signal S _IF carrier frequency f _IF of N times the reference frequency f _REF. The phase change information D ₁ is input to the demodulation circuit (not shown), the transmission data is demodulated.

[0010] The received signal of this embodiment is a π / 4 shift QP
This is the SK signal. Therefore, the value of the phase change information D ₁ of the a phase change measuring circuit 12, ± π / 4, should exhibit any of the values ± 3 [pi] / 4 radians. Therefore,
In the phase error measurement circuit 13 obtains the deviation of the value of the phase change information D ₁ of the from these values, output as phase error information D _2. The phase error information D ₂ is given a predetermined weight by the multiplier 16 and the weighted phase error information D ₃
As input to the programmable counter 15.

[0011] The programmable counter 15, the phase error information D ₃ that are weighted as an initial value is initialized with baud timing designated by the timing signal S _1. Then, the reference frequency f _REF is _divided based on the initial value.
When shifted to the carrier frequency f _IF of the intermediate frequency signal S _IF is not generated, the reference frequency f _REF by N divider, frequency division signal S ₂ is equal to the carrier frequency f _IF is output.

Further, the carrier frequency f _IF of the intermediate frequency signal S _IF is shifted for some reason, and f _IF = f _REF / N
+ Delta] f, and became case, the phase error Δφ is proportional to Delta] f an intermediate frequency signal S _IF is generated. Since the phase error signal D ₃ corresponding to the phase error Δφ is input to the programmable counter 15, the frequency f ₁ of the frequency-divided signal S ₂ becomes f ₁ = f
_The frequency of the reference frequency f _REF is _divided so that _REF / N + Δf.

The frequency-divided signal S ₂ is input to the frequency measurement circuit 23, which measures the frequency based on the reference signal S _REF . Hereinafter, the measurement data D ₅
Is input to the voltage data generation circuit 24, and the voltage data D ₆
Is generated, converted by the digital / analog converter 25, and input to the voltage controlled oscillator 26 as the control voltage V _CONT . Then, the voltage controlled oscillator 26 outputs a local oscillation signal S _LO having a frequency f _LO according to the control voltage V _CONT .

As described above, in the frequency stabilizing circuit of this embodiment, the deviation Δf of the carrier frequency f _IF of the intermediate frequency signal S _IF
Is detected as a phase error, the programmable counter 15 is initialized in accordance with the phase error, the reference frequency f _REF is divided, and the voltage data D ₆ according to the carrier frequency deviation Δf is calculated.
To change the frequency f _LO of the local oscillation signal S _LO .
As described above, in the present embodiment, the shift Δf of the carrier frequency f _IF is detected as a phase error, so that the carrier frequency f _IF of the intermediate frequency signal S _IF is set to f _REF / N without being affected by the bias of the transmission data. frequency f _LO of the made as the local oscillation signal S _LO
Can be stabilized.

[0015]

According to the present invention, the shift of the carrier frequency of the intermediate frequency signal is detected as a phase error, and the reference frequency is divided according to the phase error to generate voltage data corresponding to the shift of the carrier frequency. By doing so, the frequency of the local oscillation signal can be stabilized so that the carrier frequency of the intermediate frequency signal is constant regardless of the transmission data.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a block diagram of a conventional frequency stabilization circuit.

[Explanation of symbols]

 11 Baud Timing Extraction Circuit 12 Phase Change Measurement Circuit 13 Phase Error Measurement Circuit 14 Multiplier 15 Programmable Counter 21 Mixer 22 Reference Oscillator 23 Frequency Measurement Circuit 24 Voltage Data Generation Circuit 25 Digital-to-Analog Converter 26 Voltage Controlled Oscillator 27 Demodulation Circuit

Claims (2)

(57) [Claims] 1. A frequency conversion means for receiving an QPSK reception signal and a local oscillation signal and outputting an intermediate frequency signal; a reference frequency generation means for outputting a reference signal having a predetermined frequency; In a frequency stabilizing circuit having frequency measuring means for measuring the frequency of an intermediate frequency signal and local oscillation means for outputting the local oscillation signal based on the frequency measured by the frequency measuring means, the baud timing of the intermediate frequency signal Baud timing extracting means for extracting a timing signal and outputting a timing signal; phase measuring means for measuring a phase change of the intermediate frequency signal in each baud section unit defined by the baud timing signal; A phase error measuring means for measuring an error between a phase and a predetermined phase and outputting an error signal; A frequency adjusting circuit for dividing the reference signal based on the error signal and outputting the frequency-divided signal to the frequency measuring means instead of the intermediate frequency signal. 2. A frequency stabilizing circuit of a π / 4 shift QPSK signal receiver, comprising: a mixer for performing frequency conversion of a π / 4 shift QPSK reception signal based on a local oscillation signal; and a frequency converted π / A baud timing extraction circuit for extracting a baud timing from a 4-shift QPSK reception signal and outputting a timing signal; and generating a reference signal having a frequency that is an integral multiple of the frequency of the frequency-converted carrier signal of the π / 4-shift QPSK reception signal. A phase change measuring circuit for determining a phase change of each of the frequency-converted π / 4 shift QPSK reception signals in each baud period defined by the timing signal with reference to the reference signal; The phase for measuring the deviation of the value of the phase change measured by the change measurement circuit from any of ± π / 4, ± 3π / 4 radians An error measurement circuit, a multiplier that outputs deviation data proportional to the deviation, a programmable counter that is initialized with the timing signal and that divides the reference signal based on the deviation data and outputs a divided signal, A frequency measurement circuit that measures the frequency of the divided signal based on the reference signal; a voltage data generation circuit that outputs voltage data corresponding to the frequency measured by the frequency measurement circuit; and a digital-to-analog conversion of the voltage data. A frequency stabilizing circuit comprising: a digital-to-analog converter that converts a voltage; and a voltage-controlled oscillator that generates the local oscillation signal having a frequency based on the voltage data that has been converted into an analog signal.