JP2871634B2 - Burst signal demodulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a burst signal demodulator, and more particularly to a burst signal demodulator. In a time division multiplex communication system, a base station automatically sets a threshold for determining whether or not a burst signal is input to a base station to an optimum value. The present invention relates to a controlled burst signal demodulator.

[0002]

2. Description of the Related Art In a conventional burst signal demodulator,
The determination as to whether or not a burst signal is input to the receiver is based on the reception electric field strength (Receiv
e SignalStrength Indicator; hereinafter referred to as RSSI) and a preset threshold value,
When I is larger than the threshold, the input signal is a desired burst signal, and when RSSI is smaller than the threshold, it is determined that the burst signal is not input.

[0003] Generally, depending on the mode and performance of a modem, a signal power to interference power ratio (Desire / Undesire; hereinafter, referred to as D / U) or a signal power to noise power ratio (Signal / Noise; hereinafter, S / U). The relationship between N and Bit Error Rate (hereinafter referred to as BER) is known in advance by theoretical values or measured values. Also, the BER to be guaranteed for the line used is defined. Also, a received power level when a burst signal is not transmitted is measured, and this is regarded as noise power or interference wave power.

[0004] Then, like the method of setting the threshold level shown in FIG.
Required D / U or S / to satisfy the specified BER
If the threshold level is set so as to satisfy N, an optimum threshold under given conditions can be set.

(1) Description of Configuration FIG. 10 is a diagram showing a configuration of a conventional burst signal demodulator. The burst signal demodulator shown in FIG.
Demodulator 1 and unique word (hereinafter referred to as UW)
The configuration includes a detection unit 2, an RSSI measurement unit 3, a burst signal detection unit 4, and a counter 5.

[0006] The demodulator 1 demodulates the input signal S1 and the frame signal Sf output from the burst signal detector 4, and outputs demodulated data S2 of a demodulated baseband signal and a demodulated clock CK1. UW detector 2 receives demodulated data S2 and demodulated clock CK1, and detects UW from demodulated data S2. When UW is detected, output data S3, output clock CK2 and UW detection signal Ud, which are obtained by extracting only the data portion following UW from demodulated data S2, and output UW non-detection signal Un when UW is not detected. I do. RSS
The I measurement unit 3 receives the input signal S1, measures a received power level, and outputs an RSSI signal Ps. The burst signal detector 4 receives the RSSI signal Ps and the falling detection signal Sd output from the counter 5, and detects whether or not a burst signal is input to the input signal S1.
The frame signal Sf is output. The counter 5 includes a UW non-detection signal Un, a UW detection signal Ud, and an output clock CK.
2, the UW detection signal Ud and the output clock C
The last part of the output data S3 is detected using K2, and a falling detection signal Sd is output.

[0007] Of the components 1 to 5 shown in FIG. 10, the demodulator 1 and the UW detector 2 are main signal systems, and
The measuring unit 3, the burst signal detecting unit 4, and the counter 5 are a control system.

(2) Description of Operation First, the operation of the main signal system will be described. When the input signal S1 is input, the demodulator 1 uses the frame signal Sf output from the burst signal detection unit 4 to perform demodulation only during the time when the burst signal is input to the input signal S1, and obtains demodulated data S2 And a demodulated clock CK1 synchronized with the demodulated data S2. The UW detector 2 outputs the demodulated data S2
And the demodulation clock CK1, the demodulation data S2
When UW is detected from UW, a UW detection signal Ud, an output data S3 obtained by removing UW from demodulated data, and an output clock CK2 synchronized with the output data S3 are output.
, The UW non-detection signal Un is output.

Next, the operation of the control system will be described. The burst signal detection unit 4 outputs the RS signal output from the RSSI measurement unit 3.
The SI signal Ps and the falling detection signal Sd output from the counter 5 are input, the time during which the burst signal is input is obtained from these two pieces of information, and output as the frame signal Sf.

The counter 5 normally outputs a falling detection signal Sd at a high level (hereinafter, referred to as HI). Upon receiving the UW detection signal Ud, the counter 5 performs a counting operation by the output clock CK2. Usually, the data length included in one frame is known in advance,
The counter 5 is set so as to output a low level (hereinafter, referred to as LO) pulse to the falling detection signal Sd when counting for the data length.

FIG. 11 is a diagram showing the configuration of the RSSI measuring section in FIG. The RSSI measuring unit 3 shown in FIG. 11 has a configuration including a logarithmic amplifier 31 and an integrator 32.

The logarithmic amplifier 31 receives the input signal S1 and outputs the absolute value of the amplitude of the input signal S1 as a logarithmic (decibel) value. The integrator 32 smoothes the output of the logarithmic amplifier 32 and outputs it as the RSSI signal Ps with a time constant that can sufficiently recognize the guard time during which the burst signal is not input.

FIG. 12 is a diagram showing a configuration of the burst signal detecting section in FIG. The burst signal detector 4 shown in FIG.
2 is provided.

The comparator 41 receives the RSSI signal Ps and compares the RSSI signal Ps with a threshold value R set to an appropriate value in advance. When the RSSI signal Ps is large, HI is output, and when the RSSI signal Ps is small, LO is output. Frame signal generator 42
Is the output signal of the comparator 41 and the falling detection signal S
d, HI is output when the output signal of the comparator 41 is LO → HI, and the falling detection signal Sd is changed from HI → L
Outputs LO when O. Therefore, the burst signal detector 4 outputs the frame signal Sf which becomes HI during the time when the burst signal is input, and becomes LO during the other time (guard time).

With the above operation, the demodulation operation can be performed by determining whether or not the input signal S1 is a burst signal based on the RSSI signal.

[0016]

In a conventional burst signal demodulator, when determining whether an input signal is a burst signal using an RSSI signal, an appropriate threshold value is set as a fixed value in advance. I was Therefore, in order to determine the threshold, it was necessary to measure the noise power level, the interference power level, and the signal power level on the actual line.
Also, if the line environment changes after setting the threshold, each power level is measured again, and unless the threshold is set again,
I could not keep up with the changes in the line environment.

If the threshold is not set properly, the original signal may not be detected if the threshold is too high. If the threshold value is too low, a noise or interference wave is detected, and a malfunction occurs such that an original signal is missed during the demodulation operation and the UW detection operation.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems by eliminating the need for measuring the noise power level, interference power level and signal power level in a real line, and automatically following changes in the line environment. An object of the present invention is to provide a burst signal demodulator that holds an optimal threshold.

[0019]

In order to achieve the above object, a burst signal demodulator according to the present invention comprises an input signal (S1) to which a burst modulation signal is input and a frame output from a burst signal detector (6). Input the signal (Sf),
Demodulation is performed only during the period when the burst modulation signal is input to the input signal (S1), and is synchronized with the first demodulated data (S2) of the demodulated baseband signal and the first demodulated data (S2). A demodulator (1) that outputs a first demodulated clock (CK1), and the first demodulated data (S2) output from the demodulator (1) and the first demodulated clock (CK1) are input. A unique word of the first demodulated data (S2), and when the unique word is detected, a second demodulated data (S3) obtained by removing the unique word from the first demodulated data (S2); The second
A second demodulated clock (CK2) synchronized with the demodulated data (S3) and a unique word detection signal (Ud), and output a unique word non-detection signal (Un) when the unique word is not detected. A word detection unit (2) and a received electric field intensity signal (Ps) obtained by obtaining the received electric field intensity from the input signal (S1) using the burst modulated signal as an input signal (S1) and smoothing the received electric field intensity. A receiving field strength measuring unit (3) to be output, the second demodulation clock (CK2) output from the unique word detecting unit (2), and a unique word detection signal (U
d) and a counter (5) which receives the unique word non-detection signal (Un) and outputs a falling detection signal (Sd) indicating the last part of the second demodulated data (S3);
The received signal strength signal (Ps) output from the received signal strength measurement unit (3) and the frame signal (Sf) output from the burst signal detection unit (6) are input to the burst signal detection unit. (6) a threshold control unit (7) for outputting a threshold signal (Pt) for setting a signal detection threshold, the reception field intensity signal (Ps) output from the reception field intensity measurement unit (3), and the counter The falling detection signal (Sd) output from (5) and the threshold signal (Pt) output from the threshold control unit (7) are input to the input signal (S
(1) a burst signal detection unit (6) for outputting the frame signal (Sf) indicating whether or not a burst modulation signal is input, and a guard time which is a time when the burst modulation signal is not input. Measure the received power of
The detection threshold of the input signal (S1) is automatically controlled to an optimum value.

Further, the burst signal demodulator of the present invention receives an input signal (S1) to which a burst modulation signal is input and a frame signal (Sf) output from a burst signal detection section (8). Demodulation is performed only during the period when the burst modulation signal is input to (S1), and the first demodulated data (S2) of the demodulated baseband signal and the first demodulated data (S2) synchronized with the first demodulated data (S2). A demodulator (1) for outputting a demodulated clock (CK1); and a first demodulated data (S2) output from the demodulator (1) and the first demodulated clock (CK1). 1 demodulated data (S2) is detected, and when the unique word is detected, the second demodulated data (S3) obtained by removing the unique word from the first demodulated data (S2) and the unique word are detected. A unique word detector (2) that outputs a second demodulated clock (CK2) synchronized with the second demodulated data (S3), and receives the burst modulated signal as an input signal (S1) from the input signal (S1). A reception field strength measurement unit (3) for obtaining a field strength and outputting a reception field strength signal (Ps) obtained by smoothing the reception field strength;
The burst signal detection section receives the reception field strength signal (Ps) output from the reception field strength measurement section (3) and the frame signal (Sf) output from the burst signal detection section (8). (8) a threshold controller (9) for outputting a rising threshold signal (Tr) for setting a signal rising threshold and a falling threshold signal (Tf) for setting a signal falling threshold; ), The rising threshold signal (Tr) and the falling threshold signal (Tf) output from the threshold controller (9), and the input signal (Ps). A burst signal detection section (8) for outputting the frame signal (Sf) indicating whether or not a burst modulation signal is input as S1); By measuring the received power of a guard time, and controls the detection threshold of the input signal (S1) automatically the optimum value.

In the present invention, when determining whether an input signal is a burst signal using an RSSI signal,
The conventional burst signal demodulator adds a function to measure the received power level of the guard time when the burst signal is not transmitted and automatically control the signal detection threshold to the optimal value. In addition, it becomes unnecessary to measure the interference power level and the signal power level, and it is possible to automatically keep up with a change in the line environment and hold the optimum threshold.

[0022]

Embodiments of the present invention will now be described with reference to the drawings.

First, the overall operation will be described with reference to a time chart. FIG. 1 is a diagram showing a transmission signal frame format, and shows one frame of a general transmission signal. FIG. 2 is a time chart of input / output signals,
2 shows input / output signals of a burst signal demodulator when UW is normally detected when the transmission signal shown in FIG. 1 is modulated and transmitted.

The frame format shown in FIG. 1 has a preamble (PR) for performing carrier recovery and clock recovery in a demodulator, UW, and data (DAT).
A) is provided.

As shown in FIG. 2A, when the burst-modulated input signal S1 is input on the transmitting side, FIG.
As shown in the figure, the RSSI signal Ps rises. FIG.
As shown in (c), when Ps exceeds the threshold, the output of the comparator rises. As shown in FIG. 2F, the frame signal Sf rises at the same time when the output of the comparator rises. As shown in FIG. 2G, when the frame signal Sf rises, the demodulator starts operating, and the demodulated data S2 is output from the demodulator and input to the UW detection circuit. FIG.
As shown in (h), when UW is detected by the UW detection circuit, output data S3 is output. As shown in FIG. 2D, the output data S3 is output from the UW detector, and at the same time, the UW detection signal Ud is output. When the counter receives the UW detection signal Ud and counts for the data length of the output data S3, a falling detection signal Sd is output as shown in FIG. As shown in FIG. 2F, at the same time when the falling detection signal Sd is output,
The burst signal detection unit that has received the falling detection signal Sd falls the frame signal Sf. The above is a series of operations of the burst signal demodulator.

First Embodiment (1) Description of Configuration FIG. 3 is a block diagram showing a configuration of a burst signal demodulator according to a first embodiment of the present invention. The burst signal demodulator shown in FIG. 3 includes a demodulator 1, a UW detector 2,
The configuration includes an SSI measurement unit 3, a counter 5, a burst signal detection unit 6, and a threshold control unit 7.

The demodulator 1 demodulates the input signal S1 and the frame signal Sf output from the burst signal detector 6, and outputs demodulated data S2 of a demodulated baseband signal and a demodulated clock CK1. UW detector 2 receives demodulated data S2 and demodulated clock CK1, and detects UW from demodulated data S2. When UW is detected, output data S3, output clock CK2 and UW detection signal Ud, which are obtained by extracting only the data portion following UW from demodulated data S2, and output UW non-detection signal Un when UW is not detected. I do. RSS
The I measurement unit 3 receives the input signal S1, measures a received power level, and outputs an RSSI signal Ps. Counter 5
Receives the UW non-detection signal Un, the UW detection signal Ud and the output clock CK2, detects the last part of the output data S3 using the UW detection signal Ud and the output clock CK2, and outputs the falling detection signal Sd. . The burst signal detector 6 receives the RSSI signal Ps, the falling detection signal Sd, and the threshold signal Pt output from the threshold controller 7, and detects whether or not a burst signal is input to the input signal S1. The frame signal Sf is output. The threshold control unit 7 includes the RSSI signal Ps and the frame signal Sf
And outputs a threshold signal Pt for setting the signal detection threshold of the burst signal detector 6.

Since the same reference numerals are given to the same constituent elements as those shown in FIG. 10 among the constituent elements shown in FIG. 3, detailed description of these constituent elements is omitted. .

(2) Description of Operation Of the components 1-3, 5-7 shown in FIG.
The UW detection unit 2 is a main signal system, and the RSSI measurement unit 3, counter 5, burst signal detection unit 6, and threshold control unit 7 are control systems.

First, the operation of the main signal system will be described. When the input signal S1 is input, the demodulator 1 uses the frame signal Sf output from the burst signal detection unit 6 to perform demodulation only during the time when the burst signal is input to the input signal S1, and performs demodulation data S2 And a demodulated clock CK1 synchronized with the demodulated data S2. The UW detection unit 2 receives the demodulated data S2 and the demodulated clock CK1, and when UW is detected from the demodulated data S2, the UW detection signal Ud and the output data S from which UW is removed from the demodulated data.
3 and an output clock CK2 synchronized with the output data S3, and outputs a UW non-detection signal Un when UW is not detected.

Next, the operation of the control system will be described. The burst signal detector 6 is configured to output the RS
SI signal Ps, falling detection signal Sd output from counter 5, and threshold signal Pt output from threshold controller 7
Is input, and the time during which the burst signal is input is obtained from the information, and is output as the frame signal Sf. The threshold controller 7 receives the RSSI signal Ps and the frame signal Sf, and outputs a threshold signal Pt.

FIG. 4 is a diagram showing a configuration of the burst signal detecting section in FIG. The burst signal detector shown in FIG. 4 has a configuration including a comparator 61 and a frame signal generator 62.

The comparator 61 receives the RSSI signal Ps output from the RSSI measuring section 3 and the threshold signal Pt output from the threshold control section, and compares the RSSI signal Ps with the threshold signal Pt. When the RSSI signal Ps is large, HI is output, and when the RSSI signal Ps is small, LO is output. The frame signal generator 62 receives the output signal of the comparator 61 and the falling detection signal Sd, and outputs the HI signal when the output signal of the comparator 61 changes from LO to HI.
And outputs LO when the falling detection signal Sd changes from HI to LO. Therefore, the burst signal detection unit 6
It outputs a frame signal Sf which becomes HI during the time when the burst signal is input and becomes LO during other times (guard time).

FIG. 5 is a diagram showing the configuration of the threshold control unit in FIG. The threshold control unit shown in FIG.
, An integrator 72, and an adder 73.

The SW 71 receives the RSSI signal Ps output from the RSSI measuring section 3 and the frame signal Sf output from the burst signal detecting section 6 and receives the frame signal Sf.
The input of the RSSI signal Ps to the integrator 72 is
N / OFF. OF when frame signal Sf is HI
It becomes F and it becomes ON at LO. As a result, only when the frame signal Sf is LO, that is, during the guard time when no burst signal is input to the input signal S1,
The RSSI signal Ps is output to the integrator 72.

Since the integrator 72 inputs the RSSI signal only during the guard time, the noise power or the interference power of the used channel is smoothed and held.

The adder 73 adds a value obtained by adding a required C / N value (D / U value) C to the output signal of the integrator 72 to a threshold signal Pt.
Output as

With the above operation, the RS of the guard time
By automatically controlling the optimum signal detection threshold using the SI signal, it is possible to determine whether or not the input signal S1 is a burst signal and perform a demodulation operation.

[Second Embodiment] (1) Description of Configuration FIG. 6 is a block diagram showing a configuration of a burst signal demodulator according to a second embodiment of the present invention. The burst signal demodulator shown in FIG. 6 includes a demodulator 1, a UW detector 2,
The configuration includes an SSI measurement unit 3, a burst signal detection unit 8, and a threshold control unit 9.

The demodulator 1 demodulates the input signal S1 and the frame signal Sf output from the burst signal detector 8, and outputs demodulated data S2 of a demodulated baseband signal and a demodulated clock CK1. UW detector 2 receives demodulated data S2 and demodulated clock CK1, and detects UW from demodulated data S2. Then, when UW is detected, output data S3 and output clock CK2 obtained by extracting only the data portion following UW from demodulated data S2 are output. The RSSI measuring unit 3 receives the input signal S1, measures a received power level, and outputs an RSSI signal Ps. The burst signal detector 8 receives the RSSI signal Ps, the rising threshold signal Tr output from the threshold controller 9, and the falling threshold signal Tf output from the threshold controller 9, and the burst signal is input to the input signal S1. And outputs a frame signal Sf. The threshold controller 9 receives the RSSI signal Ps and the frame signal Sf, and outputs a threshold signal Pt for setting a signal detection threshold of the burst signal detector 8.

6, the same components as those shown in FIG. 10 are denoted by the same reference numerals, and a detailed description of these components will be omitted. .

(2) Description of Operation Among the constituent elements 1 to 3, 8, and 9 shown in FIG.
The UW detection unit 2 is a main signal system, and the RSSI measurement unit 3, burst signal detection unit 8, and threshold control unit 9 are control systems.

First, the operation of the main signal system will be described. When the input signal S1 is input, the demodulator 1 performs demodulation using the frame signal Sf output from the burst signal detection unit 8 only during the time when the burst signal is input to the input signal S1, and outputs the demodulated data S2 And a demodulated clock CK1 synchronized with the demodulated data S2. The UW detection unit 2 receives the demodulated data S2 and the demodulated clock CK1, and when the UW is detected from the demodulated data S2, outputs the output data S3 obtained by removing the UW from the demodulated data and the output clock CK2 synchronized with the output data S3. I do.

Next, the operation of the control system will be described. The burst signal detection unit 8 outputs the RS signal output from the RSSI measurement unit 3.
The SI signal Ps, the rising threshold signal Tr and the falling threshold signal Tf output from the threshold control unit 9 are input, the time during which the burst signal is input is obtained from these information, and output as the frame signal Sf. . The threshold controller 9 receives the RSSI signal Ps and the frame signal, and outputs a rising threshold signal Tr and a falling threshold signal Tf.

FIG. 7 is a diagram showing a configuration of the burst signal detecting section in FIG. The burst signal detector shown in FIG. 7 includes comparators 81 and 82 and a frame signal generator 83
Is provided.

The comparator 81 receives the RSSI signal Ps output from the RSSI measuring section 3 and the rising threshold signal Tr output from the threshold control section 9 and receives the RSSI signal Ps
s and the rising threshold signal Tr are compared. And R
When the SSI signal Ps is large, HI is output and RSS is output.
When the I signal Ps is small, LO is output. Comparator 8
2 also receives the RSSI signal Ps and the falling threshold signal Tf output from the threshold controller 9 and
The signal Ps is compared with the falling threshold signal Tf. And when the RSSI signal Ps is large, HI is output,
When the RSSI signal Ps is small, LO is output. The frame signal generator 83 outputs the LO signal of the comparator 81
HI is output when HI, and LO is output when the output signal of the comparator 82 is HI → LO. Therefore, the burst signal detector 8 becomes HI during the time when the burst signal is input, and becomes LO during the other time (guard time).
Is output.

FIG. 8 is a diagram showing the configuration of the threshold control unit in FIG. The threshold control unit shown in FIG.
, An integrator 92, and adders 93 and 94.

The SW 91 receives the RSSI signal Ps output from the RSSI measurement section 3 and the frame signal Sf output from the burst signal detection section 8 and inputs the frame signal Sf.
The input of the RSSI signal Ps to the integrator 92 is
N / OFF. OF when frame signal Sf is HI
It becomes F and it becomes ON at LO. As a result, only when the frame signal Sf is LO, that is, during the guard time when no burst signal is input to the input signal S1,
The RSSI signal Ps is output to the integrator 92.

Since the integrator 92 inputs the RSSI signal only during the guard time, the noise power or the interference power of the used channel is smoothed and held.

The adder 93 outputs a value obtained by adding a required C / N value (D / U value) Cr to the output signal of the integrator 92 as a rising threshold signal Tr. The adder 94 includes the integrator 9
A value obtained by adding a required C / N value (D / U value) Cf to the output signal of No. 2 is output as a falling threshold signal Tf. However, Cr> Cf must be satisfied. Here, the rising threshold value and the falling threshold value are separated from each other because, when the RSSI signal Ps fluctuates near the threshold value, the frame signal S
This is to provide a hysteresis characteristic that prevents f from fluttering.

The second embodiment differs from the configuration of the threshold control section in the first embodiment described with reference to FIG. 5 in that the output signal of the integrator 92 is divided into two systems of adders 9.
3, 94.

With the above operation, the optimum signal detection threshold is automatically controlled by using the guard time RSSI signal, as in the first embodiment, so that the input signal S
The demodulation operation can be performed by determining whether 1 is a burst signal.

[0053]

As described above, according to the present invention, the RSSI
When determining whether an input signal is a burst signal using a signal, a conventional burst signal demodulator measures a reception power level of a guard time when a burst signal is not transmitted and automatically sets a signal detection threshold. By adding a function (threshold control unit) to control to the optimal value, eliminates the need to measure the noise power level, interference power level and signal power level in the actual line, and automatically follows changes in the line environment Thus, an optimum threshold value can be maintained.

[Brief description of the drawings]

FIG. 1 is a diagram showing a transmission signal frame format.

FIG. 2 is a time chart of input / output signals.

FIG. 3 is a diagram showing a configuration of a burst signal demodulator according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a configuration of a burst signal detector in FIG. 3;

FIG. 5 is a diagram showing a configuration of a threshold control unit in FIG. 3;

FIG. 6 is a diagram illustrating a configuration of a burst signal demodulator according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a configuration of a burst signal detector in FIG. 6;

FIG. 8 is a diagram showing a configuration of a threshold control unit in FIG. 6;

FIG. 9 is a diagram showing a method of setting a threshold level.

FIG. 10 is a diagram showing a configuration of a conventional burst signal demodulator;

FIG. 11 is a diagram showing a configuration of an RSSI measurement unit in FIG. 10;

FIG. 12 is a diagram showing a configuration of a burst signal detector in FIG. 10;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Demodulator 2 UW detection part 3 RSSI measurement part 4, 6, 8 Burst signal detection part 5 Counter 7, 9 Threshold control part 31 Logarithmic amplifier 32, 72, 92 Integrator 41, 61, 81, 82 Comparator 42, 62 , 83 Frame signal generator 71, 91 SW 73, 93, 94 Adder

Claims (2)

(57) [Claims] An input signal to which a burst modulation signal is input and a frame signal output from a burst signal detection unit are input, and demodulation is performed only during a period when the burst modulation signal is input to the input signal. A demodulator that outputs first demodulated data of the baseband signal and a first demodulated clock synchronized with the first demodulated data, the first demodulated data output from the demodulator, and the first demodulated data. A demodulation clock is input, a unique word of the first demodulated data is detected, and when the unique word is detected, second demodulated data obtained by removing the unique word from the first demodulated data; Outputting a second demodulation clock synchronized with the demodulated data and a unique word detection signal, and when the unique word is not detected, a unique word non-detection signal A unique word detection unit that outputs, a reception field strength measurement unit that obtains a reception field strength from the input signal using the burst modulation signal as an input signal, and outputs a reception field strength signal obtained by smoothing the reception field strength; Inputting the second demodulation clock, the unique word detection signal, and the unique word non-detection signal output from the unique word detection unit, and outputting a falling detection signal indicating the end of the second demodulated data A threshold for setting the signal detection threshold of the burst signal detection unit by inputting the reception field intensity signal output from the reception field intensity measurement unit and the frame signal output from the burst signal detection unit A threshold control unit that outputs a signal; the reception electric field intensity signal output from the reception electric field intensity measurement unit; and the falling edge detection output from the counter. A signal and the threshold signal output from the threshold control unit, the burst signal detection unit that outputs the frame signal indicating whether or not a burst modulation signal is input as the input signal, A burst signal demodulator that measures reception power during a guard time during which a burst modulation signal is not input, and automatically controls a detection threshold value of the input signal to an optimal value. 2. An input signal to which a burst modulation signal is input and a frame signal output from a burst signal detection unit are input, and demodulation is performed only during a period when the burst modulation signal is input to the input signal. A demodulator that outputs first demodulated data of the baseband signal and a first demodulated clock synchronized with the first demodulated data, the first demodulated data output from the demodulator, and the first demodulated data. A demodulation clock is input to detect a unique word of the first demodulated data, and when the unique word is detected, the second demodulated data obtained by removing the unique word from the first demodulated data and the second demodulated data. A unique word detector that outputs a second demodulated clock synchronized with the demodulated data; and a received electric field strength obtained from the input signal using the burst modulated signal as an input signal. A receiving electric field intensity measuring unit that outputs a receiving electric field intensity signal obtained by smoothing the receiving electric field intensity, and the receiving electric field intensity signal output from the receiving electric field intensity measuring unit and the burst signal detecting unit output from the burst signal detecting unit. A threshold control unit that inputs a frame signal and outputs a rising threshold signal for setting a signal rising threshold and a falling threshold signal for setting a signal falling threshold of the burst signal detection unit; and an output from the reception field strength measurement unit. Receiving the received electric field strength signal, the rising threshold signal and the falling threshold signal output from the threshold control unit, and the frame signal indicating whether or not a burst modulation signal is input as the input signal. And a burst signal detecting unit for outputting a burst signal, and measuring a reception power of a guard time, which is a time when a burst modulation signal is not input. And controls the detection threshold of the input signal to automatically optimum value, the burst signal demodulator.