JP2822209B2 - Charge transfer device and driving method thereof, solid-state imaging device and driving method thereof - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge transfer device and a method of driving the same, and a solid-state imaging device and a method of driving the same, and is suitable for application to, for example, a charge-coupled device (CCD). is there.

[Summary of the Invention]

According to the present invention, in a charge transfer device having a driver for driving a charge transfer electrode, a capacitor is connected to a predetermined power supply when the charge transfer electrode is not driven within one horizontal scanning period, and the capacitor is charged. When the charge transfer electrode is driven during a scanning period, a negative power is supplied from the capacitor to the driver. This eliminates the need to use a DC / DC converter as a negative power supply, eliminates the need to provide a large-capacity capacitor for level shifting between the main unit of the charge transfer device and the driver, and further reduces power consumption. it can.

[Conventional technology]

The CCD image sensor has a power supply voltage V _DD for the output MOSFET of 15
A clock pulse (hereinafter, referred to as V clock) for driving a vertical register (hereinafter, referred to as V register) is often driven at a ternary level (H, M, L). Then, as the ternary level (H, M, L), H level = 1
0 to 15 V, M level = 5 to 0 V, L level = −7 to −10 V are most frequently used.

A conventional CCD image pickup device that drives a V register with such a ternary level (H, M, L) V clock needs at least three types of power supplies including a negative power supply.
When a video camera or the like is manufactured using a CCD image pickup device, it is often inconvenient because miniaturization is difficult.

For example, if the M level is set to 0 V and the H level is set to the same as V _DD or V _DD is divided,
The V clock can be driven only by the L level negative power supply and V _DD , and if the L level negative power supply can be eliminated, the V clock can be driven only by V _DD .

9 to 11 show a conventional CCD V-clock drive circuit.

FIG. 9 shows an example of a driving circuit of a low level clamp system. As shown in FIG. 9, a V driver 103 for driving a V register is connected to a CCD 101 via a capacitor 102 in this example. The V driver 103 has a negative power supply circuit 1
04 is connected. Reference numeral 105 indicates a diode. Reference numeral 106 denotes a timing generator. In the example shown in FIG. 9, the V driver 10
At step 3, only the amplitude of the V clock is generated, and the bias level is cut by the capacitor 102 and clamped at the L level ( _VL ) by the diode 105.

FIG. 10 shows an example of a driving circuit of a high level clamp system. In the example shown in FIG.
Only the amplitude of the clock is generated, and the bias level is cut by the capacitor 102 and clamped to the H level (V _H ) by the diode 105.

FIG. 11 shows an example using a V driver 103 constituted by CMOS. In this example, the CCD 101 and the V driver 103 are directly connected.

[Problems to be solved by the invention]

9 and 10 described above, for example, when driving a V register with a four-phase clock,
Large capacity capacitor 102 and diode 105
You need them individually.

In the example shown in FIG. 9, the negative power supply circuit 104 is used only for bias,
It does not work as a negative power supply for 3.

On the other hand, in the example shown in FIG.
9 and 10 do not require a large-capacity capacitor as in the examples shown in FIGS.
4. A DC / DC converter is required.

Accordingly, an object of the present invention is to provide a charge transfer device which eliminates the need to use a DC / DC converter as a negative power supply and eliminates the need to provide a large-capacity capacitor for level shifting between the charge transfer device main body and a driver. It is in.

Another object of the present invention is to eliminate the need to use a DC / DC converter as a negative power supply and eliminate the need to provide a large-capacity capacitor for level shift between the solid-state imaging device main body and the driver of the vertical register. Is to provide.

The above and other objects of the present invention will become apparent from the following description.

[Means for solving the problem]

To achieve the above object, the present invention is configured as follows.

According to the first aspect of the present invention, in a charge transfer device having a driver (2) for driving a charge transfer electrode, a predetermined power supply (V _E )
(C _L ) charged by switching with respect to
When the charge transfer electrode is not driven during one horizontal scanning period, the capacitor ( _CL ) is connected to a predetermined power supply (V _E ) to charge the capacitor ( _CL ), and within one horizontal scanning period Is configured to supply a negative power supply from the capacitive element ( _CL ) to the driver (2) when the charge transfer electrode is driven.

According to a second aspect of the present invention, in the first aspect of the present invention, another capacitance element (C _E ) is connected to a wiring for supplying a negative power.

According to a third aspect of the present invention, in the solid-state imaging device having the driver (2) for driving the vertical register, the predetermined power supply (V _E )
(C _L ) charged by switching with respect to
When the vertical register is not driven in one horizontal scanning period, the capacitor ( _CL ) is connected to a predetermined power supply (V _E ) to charge the capacitor ( _CL ), and the capacitor ( _CL ) is charged in one horizontal scanning period. At the time of driving the vertical register, negative power is supplied from the capacitive element ( _CL ) to the driver (2).

According to a fourth aspect of the present invention, in the third aspect, another capacitance element (C _E ) is connected to a wiring for supplying a negative power.

According to a fifth aspect of the present invention, there is provided a method for driving a charge transfer device in which a charge transfer electrode is driven by a driver.
Predetermined power during non-driving of the charge transfer electrodes in the horizontal scanning period capacitive element by switching for (V _E) (C _L)
And a negative power supply is supplied to the driver from the capacitive element (C _L ) when the charge transfer electrode is driven within one horizontal scanning period.

According to a sixth aspect of the present invention, there is provided a driving method of a solid-state imaging device in which a vertical register is driven by a driver.
When the vertical register is not driven in the horizontal scanning period, the capacitive element ( _CL ) is charged by switching to a predetermined power supply (V _E ), and when the vertical register is driven in one horizontal scanning period, the capacitance element ( _CL ) becomes negative. Power is supplied to the driver.

[Action]

According to the first and fifth aspects of the present invention, since the negative power supply is supplied to the driver (2) from the capacitance element ( _CL ) charged by switching with respect to the predetermined power supply (V _E ), Thus, it is not necessary to use a DC / DC converter as the negative power supply. In addition, since it is possible to directly connect the main body of the charge transfer device and the driver (2), it is necessary to provide a large-capacity capacitor for level shifting between the main body of the charge transfer device and the driver (2) as in the related art. Disappears. Further, since the capacitor (C _L ) is charged once in one horizontal scanning period, the power consumption is low.

According to the second aspect of the present invention, the other capacitance element (C _E ) connected to the wiring for supplying the negative power is connected to the predetermined power supply (V _E ) for a certain time to be charged, and then the other capacitance is charged. The negative power supply can be supplied to the driver (2) while charging the capacitance element (C _L ) from the element (C _E ).
In addition to the above advantages of the invention, there is an advantage that a negative power supply can be obtained with low power consumption.

According to the third and sixth aspects of the invention, when the vertical register is stopped, the capacitor (C _L ) is connected to the predetermined power supply (V _E ) to charge the capacitor (C _L ). Since a negative power is supplied from the element ( _CL ) to the driver (2), DC power is used as the negative power in the same manner as in the first aspect of the present invention.
It is not necessary to use a / DC converter, and it is not necessary to provide a large-capacity capacitor for level shifting between the solid-state imaging device main body and the driver (2).

According to the fourth aspect of the present invention, since the other capacitance element (C _E ) is connected to the wiring for supplying the negative power supply, in addition to the above-mentioned advantages of the third aspect of the present invention, There are similar advantages.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. This embodiment is an embodiment in which the present invention is applied to a CCD image sensor.

FIG. 1 shows a CCD image pickup device according to this embodiment, and particularly shows a drive circuit section of a V driver.

As shown in FIG. 1, in this embodiment, CCD1
A V driver 2 composed of CMOS is directly connected.
A timing generator 3 is connected to the V driver 2. Moreover, this V driver 2, a capacitor C _L having one end grounded is connected. As described below, the capacitor C _L acts as a negative power supply for the V driver 2. This capacitor C _L has switches S ₁₁ , S ₁₂ , S ₂₁ , S ₂₂ and a resistor r
_{11, r 12, r 21,} r 22 and the switched capacitor comprising a capacitor C _E is connected. Here, one end of the resistor r ₁₁ is adapted to be connected to a power supply V _E when the switch S ₁₁ is closed.

FIG. 2 shows an example in which the switched capacitor configured as described above is formed as a CMOS IC on a semiconductor substrate.

In FIG. 2, reference numeral 4 denotes, for example, n-type silicon (Si).
1 shows a semiconductor substrate such as a substrate. On the semiconductor substrate 4, a gate electrode G ₁₁ ,
G ₁₂ , G ₂₁ and G ₂₂ are provided. Reference numerals 5 and 6 indicate, for example, p ⁺ -type source regions and drain regions formed in the semiconductor substrate 4, respectively. These gate electrodes G _11, p-channel MOSFET Q ₁₁ is constituted by the source region 5 and drain region 6. The switch S ₁₁ shown in FIG. 1 by the p-channel MOSFET Q ₁₁ is configured. Reference numeral 7 denotes a p-well formed in the semiconductor substrate 4. Reference numerals 8 and 9 indicate, for example, an n ⁺ type source region and a drain region formed in the p well 7, respectively. The gate electrode G ₂₁ , the source region 8 and the drain region 9 form n
Channel MOSFET Q ₂₁ is formed. And this n
Switch S ₂₁ shown in FIG. 1 by the channel MOSFET Q ₂₁ is formed. Reference numeral 10 indicates, for example, ap ⁺ type semiconductor region. Reference numerals 11 and 12 denote, for example, p ⁺ -type source and drain regions formed in the semiconductor substrate 4.
Gate electrode G _12, p-channel MOSFET Q ₁₂ is constituted by the source region 11 and drain region 12. The switch S ₁₂ shown in FIG. 1 by the p-channel MOSFET Q ₁₂
Is configured. Reference numeral 13 denotes a p-well formed in the semiconductor substrate 4. Symbols 14 and 15 indicate this p
3 shows, for example, an n ⁺ -type source region and a drain region formed in a well 13. The gate electrode G ₂₂ , the source region 14 and the drain region 15 form an n-channel MOSFET Q ₂₂ . By the n-channel MOSFET Q ₂₂ first
Switch S ₂₂ shown in FIG is constituted. Note that reference numeral 16
Indicates, for example, ap ⁺ type semiconductor region.

On the other hand, in FIG. 2, reference symbols C ₁ and C ₂ indicate level shift capacitors, and reference symbols D ₁ and D ₂ indicate level shift diodes. However, these capacitors C ₁ and C ₂
Unlike the capacitor 102 shown in FIGS. 9 and 10, a capacitor having a small capacity is sufficient.

Next, a method of driving the V driver by using the switched capacitor configured as described above will be described. Here, V
An example in which a register is driven by a four-phase clock will be described.

FIG. 3 shows the waveforms of the pulses φ ₁ and φ ₂ used for driving the above-mentioned switched capacitor. As shown in FIG. 3, in this example, one horizontal scanning period, that is, 1H (normally, 63.5 μm)
₂ ), φ ₁ = L, φ ₂ = L during the effective period (image display period) in which the V clock is not operating. At this time, the p-channel MOSFETs Q ₁₁ and Q ₁₂ shown in FIG. MOSFETs Q ₂₁ and Q ₂₂ are turned off. And
Power V _E in this case the capacitor C _E as shown in FIG. 4
Is connected, a current i flows, and the capacitor _CE is charged. Voltage E of the one end of the capacitor C _E This charge third
It increases with time t as shown in the figure. Since the V driver 2 constituted by CMOS does not consume current when not operating, the voltage _VL at one end of the capacitor _CL is constant during this charging.

Next, as shown in FIG. 3, during horizontal blanking (hereinafter referred to as H blanking) in which the V clock moves, φ ₁ =
H to turn off the p-channel MOSFETs Q ₁₁ and Q ₁₂ shown in FIG. 2 and turn on the n-channel MOSFETs Q ₂₁ and Q ₂₂ by setting Δ ₂ = H after Δt (for example, 10 nsec to 1 μsec. As a result, FIG. as shown in the capacitor C _E charged as described above is connected to the capacitor C _L. then,
While charging from the capacitor C _E to the capacitor C _L to drive the V driver 2. In this case, the voltage E at one end of the capacitor _CE drops to the original voltage level in four steps corresponding to the fact that the V register is driven by the four-phase clock, and the voltage V _L is correspondingly four times. Stand up (see Fig. 3). Then, charge is sent to the CCD 1 through the V driver 2 at each rising of _VL .

The time constant during charging of the capacitor _CE shown in FIG.
If both the resistance values of r ₁₁ and r ₁₂ are r ₁ , then 2r ₁ × C _E. On the other hand, as shown in FIG. 5, the time constant of the charging of the capacitor C _L, when both of the resistance value of the resistor r _21, r ₂₂ and _{r 2 2r 2 [(C E} C L) / (C E + _CL )]. In the case shown in FIG. 5, the power supply capacity as viewed from the V driver 2 is C _E
+ Is a C _L. Here, when V driver 2 which require e.g. 5mA current consumption, for example, choose the C _E = C _L = 0.5μF a C _E + C _L = 1μF, whereas r ₁ ≒ 50 [Omega, and r ₂ = 20 [Omega Then, for example, V _E = 10V V _L ≒ -9V respect it is possible to _{(| ≒ 9V | V L)} . This _VL can be used as a negative power supply of the driver 2.

As described above, according to this embodiment is obtained by charging the CMOSIC reduction has been switched capacitor of the capacitor C _E during the lifetime, charging the capacitor C _L from the capacitor C _E in H blanking V _L to V driver 2
Since the power supply is used as a negative power supply, there is no need to use a DC / DC converter as a negative power supply circuit as in the related art.
Moreover, since CCD1 and V driver 2 are directly connected,
This eliminates the need for a large-capacity capacitor for level shifting, which was conventionally required. Thus, when this CCD image sensor is used for a video camera, for example, the size and cost of the video camera can be reduced.

Since the capacitors C _E and C _L are charged once to 1H, the p-channel MOSFETs Q ₁₁ and Q ₁₂ and the n-channel MOSFET
The power required to drive OSFETs Q ₂₁ and Q ₂₂ can be minimized. For example, each MOSFET Q ₁₁ , Q ₁₂ , Q ₂₁ , Q ₂₂
If the gate capacitance of the p-channel MOSFET is, for example, about 10 pF and the amplitude of the V clock is about 10 V, these p-channel MOSFETs Q
₁₁ , Q ₁₂ and the power required to drive the n-channel MOSFETs Q ₂₁ , Q ₂₂ are about 60 μM, which indicates that the power consumption is extremely low.

Further, the above-described switched capacitor and V driver 2
If they are integrated into a CMOS IC, the number of ICs will not increase. Furthermore, if the V driver 2 and the switched capacitor are built in the IC for the timing generator 3, the number of ICs can be reduced by one.

Next, FIG. 6 to FIG. 8 show a configuration example of a driving circuit of a CCD image pickup device including a driver (H driver) for driving a horizontal register.

FIG. 6 shows an example in which the CCD 1, the H driver 17, the V driver 2 and the timing generator 3 are constituted by separate ICs. In this case, four ICs are required.

FIG. 7 shows the H driver 17 integrated with the timing generator 3.
This is an example in which an IC is used. In this case, three ICs are required.

On the other hand, FIG. 8 shows an example in which the H driver 17, the V driver 2, and the negative power supply 18 are integrated with the timing generator 3 into an IC.
In this case, two ICs are required.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications based on the technical idea of the present invention are possible.

For example, the capacitances of the capacitors C _E and C _L are not necessarily limited to the values described in the above-described embodiments, and can be selected as needed. Further, in the above-described embodiment, the case where the present invention is applied to the CCD image pickup device has been described.
It is also possible to apply to D.

〔The invention's effect〕

Since the present invention is configured as described below,
The following effects are obtained.

According to the first and fifth aspects of the present invention, it is not necessary to use a DC / DC converter as the negative power supply, and it is not necessary to provide a large-capacity capacitor for level shifting between the charge transfer device main body and the driver.

According to the invention of claim 2, a negative power supply can be obtained with low power consumption.

According to the third and sixth aspects of the present invention, it is not necessary to use a DC / DC converter as a negative power supply, and it is not necessary to provide a large-capacity capacitor for level shifting between the solid-state imaging device main body and the driver.

According to the invention of claim 4, it is possible to obtain a negative power supply with low power consumption.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a CCD image pickup device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view showing an example of an IC of the switched capacitor shown in FIG. 1, and FIG. 3 is a switched capacitor shown in FIG. FIG. 4 is a waveform diagram for explaining a method of driving the V driver by using the capacitor C _E during the valid period.
Circuit diagram for explaining the charging, Fig. 5 V due to the charging of the capacitor C _E in H blanking to capacitor C _L
6 to 8 are circuit diagrams for explaining the driving of the clock.
9 is a block diagram showing a configuration example of a drive circuit of a CCD image sensor, and FIGS. 9 to 11 are block diagrams each showing an example of a drive circuit of a V driver of a conventional CCD image sensor. Description of the key symbols in drawings 1: CCD, 2: V driver, 3: timing generator, S _11, S _12, S
_21, S _22: switch, C _E, C _L: capacitor, Q _11, Q _12: p-channel _{MOSFET, Q 21, Q 22:} n -channel MOSFET.

Claims (6)

(57) [Claims] 1. A charge transfer device having a driver for driving a charge transfer electrode, comprising: a capacitive element charged by switching with respect to a predetermined power supply; wherein the predetermined power supply is provided when the charge transfer electrode is not driven within one horizontal scanning period. And charging the capacitive element, and supplying a negative power supply from the capacitive element to the driver when the charge transfer electrode is driven within one horizontal scanning period. Charge transfer device. 2. The charge transfer device according to claim 1, wherein another capacitance element is connected to the wiring for supplying the negative power. 3. A solid-state imaging device having a driver for driving a vertical register, comprising a capacitive element charged by switching with respect to a predetermined power supply, wherein the predetermined power supply is supplied when the vertical register is not driven within one horizontal scanning period. A solid-state imaging device configured to charge a capacitor by connecting the capacitor, and to supply a negative power from the capacitor to the driver when the vertical register is driven within one horizontal scanning period. apparatus. 4. The solid-state imaging device according to claim 3, wherein another capacitance element is connected to the wiring for supplying the negative power. 5. A method of driving a charge transfer device in which a charge transfer electrode is driven by a driver, wherein the capacitor is charged by switching to a predetermined power supply when the charge transfer electrode is not driven during one horizontal scanning period. A method of driving a charge transfer device, wherein a negative power is supplied from the capacitance element to the driver when the charge transfer electrode is driven during a horizontal scanning period. 6. A driving method for a solid-state imaging device in which a vertical register is driven by a driver, wherein when a vertical register is not driven within one horizontal scanning period, a capacitive element is charged by switching to a predetermined power supply, and one horizontal scanning is performed. A method for driving a solid-state imaging device, wherein a negative power is supplied from the capacitance element to the driver when the vertical register is driven during a period.