JP2778712B2 - Thin film transistor array - Google Patents

Description

Description: Object of the Invention (Industrial application field) The present invention relates to an active matrix type liquid crystal display device having a thin film transistor in each pixel portion of a liquid crystal display device, and particularly to an active matrix type liquid crystal display device. The present invention relates to a thin film transistor array of a liquid crystal display device.

(Prior art) An active matrix type liquid crystal display device in which a thin film transistor is provided in each pixel portion to independently drive and control each pixel has a large display capacity without lowering contrast because a static voltage is applied to the liquid crystal. It has attracted attention as a liquid crystal display device that replaces the simple matrix type liquid crystal display device.

In general, since an active matrix type liquid crystal display device uses a thin film transistor or the like, it is an important issue to improve the aperture ratio of a pixel portion. By improving the aperture ratio, a backlight can be reduced in size and the like.

In order to improve the aperture ratio of the pixel portion in this manner, it is effective to reduce the resistance value of the conductor used for the bus line constituting the active matrix type liquid crystal display device and to reduce the pattern width of the bus line. is there. What is required of the conductor used for this bus line is heat resistance of about 350 ° C,
This is due to the ease of film formation or the ease of patterning. Actually, a Ta, Mo-Ta alloy or the like is used.

On the other hand, the insulating layer provided on the bus line is generally formed by depositing a SiOx line or a SiN film by a large-area in-line P-CVD apparatus. However, in the P-CVD apparatus, generation of dust is inevitable. For this reason, dust entering the film causes pinholes and the like, which causes an increase in leakage current of the insulating film.

Therefore, it has been considered to form an insulating film without pinholes or the like by anodizing the bus line. As described above, Ta is used for the bus line to form an insulating film by anodic oxidation. However, this Ta has a resistance value that is about 4 to 5 times higher than that of Mo—Ta, causing a reduction in the aperture ratio.

(Problems to be Solved by the Invention) When Ta is used for a bus line as described above, a bus line having a good insulating film can be obtained by anodic oxidation, but since the resistance value is high, the aperture ratio of the pixel portion is improved. It is difficult. It is also conceivable to use a resistance anti-metal such as Al or Cu for the bus line, but a good anodic oxide film cannot be formed, which causes a leak current. An anodic oxide film can be formed with Mo-Ta, but since the anodic oxide film contains a good oxide of Mo, the anodic oxide film is not excellent in insulating properties.

The present invention has been made in view of the above problems, and has as its object to provide a thin film transistor array having a high aperture ratio by employing a structure in which a bus line has a low resistance value and a favorable insulating film.

[Structure of the Invention] (Means for Solving the Problems) The thin film transistor array of the present invention comprises a first layer formed on an insulating substrate, a second layer made of Ta disposed thereon, A plurality of first bus lines including a third layer obtained by anodizing the second layer; an insulating layer formed on the bus line; and a selectively formed layer on the insulating layer. Semiconductor layer and a second semiconductor layer electrically connected to the semiconductor layer.
And a pixel electrode connected to the source electrode, wherein the first layer of the first bus line has α-Ta as the second layer. The thin film transistor array is an auxiliary layer mainly composed of Ta, wherein the first layer and the second layer are continuously formed by sputtering.

(Operation) The present inventors have found the following from the results of various experiments. Thin film transistor array, usually 10 ⁴ (μm)
^When a voltage of 10 V is applied between the pixel section consisting of a transparent electrode having an area of ² and the capacitor dedicated line, a leak current of 10 ^-9 A or more will cause a point defect. The leakage current was 10 ⁻¹⁰ A or less even when the anodic oxide film obtained by the above method was used alone. In addition, Ta has excellent film-forming properties, and is suitable for use as a bus line except that it has a higher resistance value than Mo-Ta or the like.

Therefore, all the problems described above can be solved by making the structure of the bus line a three-layer structure. That is, Mo-Ta, Cu, or the like having a lower resistance value than Ta is formed as the first layer of the bus line, and a second layer of Ta is formed on the first layer.
Further, a third layer obtained by anodizing Ta is formed on the second layer. By doing so, the resistance value of the bus line is low, and a third layer which is a good quality anodic oxide film is obtained, so that a thin film transistor array having no leak current can be obtained.

First Embodiment Hereinafter, a thin film transistor array according to a first embodiment of the present invention will be described with reference to FIG. 1 and FIG. FIG. 1 is a schematic front view of a thin-film transistor array (1). The thin-film transistor (1) has a plurality of first bus lines (21) and second bus lines on a transparent insulating substrate (11). (61) The first bus line (21) and the second bus line (21) are formed.
A thin film transistor is formed at the intersection of the bus lines (61). Further, a transparent conductive film (81) forming a pixel portion integrated with the source electrode (71) of the thin film transistor is provided.

The thin film transistor becomes conductive by the drive pulse transmitted from the first bus line (21), and the second bus line (6
By transmitting the information signal voltage from 1) to the transparent conductive film (81) via the source electrode (71), the transparent conductive film (81)
Is applied with a static information signal voltage.

FIG. 2 is a cross-sectional view of the thin film transistor array (1) of FIG. 1 taken along the line A-A ', and shows a first bus line (21) installed on an insulating substrate (11).
Consists of a three-layer structure, and Mo-Ta, which is a resistive alloy, is formed on an insulating substrate (11) by sputtering.
The film is deposited to a thickness of Å, and Ta is continuously sputtered thereon, and the Mo-Ta layer and the Ta layer are simultaneously patterned by photoetching to form the first layer (21a) and the second layer (21b). Is formed. In this case, when dry etching is used, Mo-Ta and Ta can be tapered. Then, Ta as the second layer (21b) is anodized to form a third layer (21c). In this case, Mo-Ta is exposed and anodized at the end of the pattern. This is not particularly problematic because the area is small compared to the area. Furthermore, SiOx is P-CVD on the first bus line (21).
The a-Si, n ⁺ a-Si is deposited by P to form an insulating layer (31) and form a thin film transistor continuously.
A-Si, n ⁺ a-Si layer is patterned by patterning the a-Si, n ⁺ a-Si layer to form an a-Si layer (41) and an n ⁺ a-Si layer (51). Al is sputtered on the n ⁺ a-Si layer (51) to form a plurality of second bus lines (61) and a source electrode (71), which is connected to the source electrode (71) to form a pixel portion. The transparent conductive film (81) to be formed is formed of ITO.

As described above, the first bus line (21) is composed of the first layer (21a) of Mo-Ta, the second layer (21b) made of Ta on the first layer (21a), and the second layer (21b). By forming the third layer (21c) by anodizing Ta as the layer (21b), the resistance can be made lower than that of the conventional first bus line (21). The ratio can be increased by about 50 to 60%, and the performance as a liquid crystal display device can be greatly improved. This is especially true when Ta is deposited on Mo-Ta.
Ta has a cubic α-Ta crystal structure, and has a lower resistance value than β-Ta which is normally used. In addition, by using Mo-Ta for the first layer (21a) and Ta for the second layer (21b), continuous sputtering is possible, and since the resistance value is low, the film thickness is smaller than that of the conventional one. The thickness can be reduced, and the manufacturing time required for sputtering can be reduced. Furthermore, Ta, M
Since o-Ta has excellent film-forming properties, it can be easily manufactured, and since Ta can be easily anodized, the third layer (21c) has excellent insulation without pinholes due to dust or the like. By using the thin film transistor array (1) together with the insulating layer (31), the defective rate of the thin film transistor array (1) can be significantly reduced.

(Second Embodiment) A thin film transistor array according to a second embodiment of the present invention will be described with reference to FIGS. 3 and 4, where the same parts as those in the first embodiment are denoted by the same reference numerals. I do.

FIG. 4 is a sectional view taken along line B-B 'of the thin film transistor array (1) shown in FIG. 3. As in the first embodiment, the first thin film transistor has a three-layer structure on an insulating substrate (11). Along with the bus line (21), a capacitor dedicated line (91) having the same structure as that of the first bus line (21) is provided.

First bus line (71) and capacitor dedicated line (91)
The thin film transistor array (1) having no short circuit or disconnection due to a pinhole can be obtained by adopting a layer structure.

Further, by providing the capacitor exclusive line (91) having such a configuration, the anodized film and the insulating layer (31) allow the capacitor exclusive line (91) and the transparent conductive film forming the pixel portion to be formed.
Since a condenser of about 1PF is added, a clear image with no afterimage can be obtained.

If the aperture ratio of the pixel portion is made the same as that of the conventional one in the manufacture of the thin film transistor array (1), the thickness of the first bus line (21) and the line dedicated to the capacitor (91) can be made thinner than in the conventional case. , The time required for the process can be reduced, and the cost of the product can be reduced.

In this embodiment, an inverse stagger type thin film transistor array is described as an example, but a normal stagger type thin film transistor array may be used. Further, a gate overlap in which the capacitor dedicated line is replaced by the first bus line may be used.

[Effects of the Invention] As described in detail above, the thin film transistor array of the present invention enables the pattern width of the bus line to be narrowed, whereby the aperture ratio can be improved by about 10% as compared with the conventional one, and the liquid crystal display The performance of the device can be improved. Further, since a sufficient insulating effect was obtained by using the insulating film and the anodic oxide film together, the defective rate of the thin film transistor array could be greatly reduced.

[Brief description of the drawings]

FIG. 1 is a schematic front view of a thin film transistor array according to a first embodiment of the present invention, FIG. 2 is a sectional view of the thin film transistor array taken along line A-A 'in FIG. 1, and FIG. 3 is a second embodiment of the present invention. FIG. 4 is a schematic front view of the thin-film transistor array according to the example, and FIG. 4 is a cross-sectional view of the thin-film transistor array taken along line B-B 'in FIG. (1) Thin film transistor array (21a) First layer (21b) Second layer (21c) Third layer (61) Second bus line (81) Transparent Conductive film (91) ... Capacitor dedicated line

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-62-297892 (JP, A) JP-A-60-9167 (JP, A) JP-A-62-265689 (JP, A) JP-A 64-64 35421 (JP, A) JP-A-1-231024 (JP, A) JP-A-2-106723 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G02F 1/136 G02F 1 / 1343 G09F 9/30 H01L 29/78 H01L 27/01

Claims (4)

(57) [Claims] 1. A first layer formed on an insulating substrate, a second layer made of Ta disposed thereon, and a third layer obtained by anodizing the second layer. A plurality of first
Bus line, an insulating layer formed on the bus line, a semiconductor layer selectively formed on the insulating layer, a second bus line and a source electrode electrically connected to the semiconductor layer. And a pixel electrode connected to the source electrode, wherein the first layer of the first bus line sets the second layer to α-
A thin film transistor array, which is an auxiliary layer mainly composed of Ta and composed of Ta, wherein the first layer and the second layer are continuously formed by sputtering. 2. The thin-film transistor array according to claim 1, wherein the thin-film transistor array has a configuration similar to that of the first bus line, and includes the pixel electrode and a capacitor-dedicated line formed and formed with a capacitor. Thin film transistor array. 3. The thin film transistor array according to claim 1, wherein said first layer and said second layer are continuously formed by sputtering and are simultaneously patterned. 4. The thin film transistor array according to claim 1, wherein said first layer is a Mo—Ta layer.