JP2761113B2 - Printed wiring board - Google Patents
Printed wiring boardInfo
- Publication number
- JP2761113B2 JP2761113B2 JP3030169A JP3016991A JP2761113B2 JP 2761113 B2 JP2761113 B2 JP 2761113B2 JP 3030169 A JP3030169 A JP 3030169A JP 3016991 A JP3016991 A JP 3016991A JP 2761113 B2 JP2761113 B2 JP 2761113B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- wiring board
- printed wiring
- dielectric constant
- electric field
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000011810 insulating material Substances 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 4
- 230000005684 electric field Effects 0.000 description 26
- 230000015556 catabolic process Effects 0.000 description 12
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N titanium dioxide Inorganic materials O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 8
- 239000003822 epoxy resin Substances 0.000 description 7
- 229920000647 polyepoxide Polymers 0.000 description 7
- 230000006378 damage Effects 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 4
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000005686 electrostatic field Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
Description
【0001】[0001]
【産業上の利用分野】この発明は、絶縁膜の上にプリン
ト回路が設けられてなるプリント配線板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board having a printed circuit provided on an insulating film.
【0002】[0002]
【従来の技術】インバータ回路用や電源用のパワー回路
用のプリント配線板においても、高密度実装化、多層
化、薄型化、小型化が進められ、これに従ってプリント
配線板に高放熱性が要求されるようになった。そのた
め、最近、図5にみるように、プリント回路3が設けら
れた絶縁膜2の下に金属基体1のある金属基体型プリン
ト配線板がよく使われる。金属基体型プリント配線板は
放熱性に優れるからである。2. Description of the Related Art Printed wiring boards for inverter circuits and power circuits for power supplies have also been developed to have high density mounting, multilayer structure, thinning, and miniaturization. It was started. Therefore, recently, as shown in FIG. 5, a metal-substrate type printed wiring board having a metal substrate 1 under an insulating film 2 provided with a printed circuit 3 is often used. This is because the metal-substrate type printed wiring board is excellent in heat dissipation.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、金属基
体型プリント配線板では、絶縁膜2が絶縁破壊を起こし
易くて信頼性が低いという問題がある。絶縁膜2の厚み
が薄くて、金属基板1とプリント回路3における電路1
3の間に電圧がかかった場合、電路13の絶縁膜2側エ
ッジ13aで電界集中が起こり、そこから絶縁破壊が始
まる。樹脂材料を使用した絶縁膜2の場合に特に絶縁破
壊が起こり易い。絶縁膜2の厚みを厚くすれば、絶縁破
壊は起こり難くなるが、放熱性が低下したり、薄型化に
逆行することになるため、絶縁膜2の厚み増大は適切な
対策ではない。However, the metal-substrate type printed wiring board has a problem that the insulating film 2 is liable to cause dielectric breakdown and has low reliability. The thickness of the insulating film 2 is small, and the electric circuit 1 in the metal substrate 1 and the printed circuit 3
When a voltage is applied during the period 3, electric field concentration occurs at the edge 13a of the electric circuit 13 on the insulating film 2 side, and dielectric breakdown starts therefrom. In the case of the insulating film 2 using a resin material, dielectric breakdown is particularly likely to occur. If the thickness of the insulating film 2 is increased, dielectric breakdown is less likely to occur, but heat dissipation is reduced or the thickness of the insulating film 2 is reduced. Therefore, increasing the thickness of the insulating film 2 is not an appropriate measure.
【0004】この発明は、上記事情に鑑み、絶縁膜の絶
縁破壊が絶縁膜の厚み増大を伴わずとも起こり難くなる
プリント配線板を提供することを課題とする。In view of the above circumstances, it is an object of the present invention to provide a printed wiring board in which dielectric breakdown of an insulating film is less likely to occur without increasing the thickness of the insulating film.
【0005】[0005]
【課題を解決するための手段】前記課題を解決するた
め、請求項1記載の発明にかかるプリント配線板では、
絶縁膜の上に設けられたプリント回路における電路の少
なくとも前記絶縁膜側エッジに高誘電率絶縁材料を施与
するようにしている。高誘電率絶縁材料は、その誘電率
が、絶縁膜の誘電率よりも大きい。 According to a first aspect of the present invention, there is provided a printed wiring board.
A high-dielectric-constant insulating material is applied to at least the insulating-film-side edge of an electric circuit in a printed circuit provided on the insulating film . High-dielectric insulating material, the dielectric constant, not greater than the dielectric constant of the insulation Enmaku.
【0006】プリント配線板の種類としては、例えば、
絶縁膜の下に金属基材を備えた金属基体型プリント配線
板が挙げられるが、これ以外に、積層板型プリント配線
板、セラミック板型プリント配線板等であってもよい。
プリント回路は、金属箔をエッチングパターン化したも
の、導電性ペーストを印刷したもの、アディティブ法等
によるメッキ電路等が挙げられる。As the type of the printed wiring board, for example ,
Although metal substrate type printed circuit board with a metal substrate underneath the insulation Enmaku the like, in addition to this, the laminate-type printed wiring board may be a ceramic plate type printed circuit board or the like.
Examples of the printed circuit include a metal foil formed by etching and patterning, a conductive paste printed thereon, and a plating circuit formed by an additive method.
【0007】以下、この発明をより具体的に説明する。
図5においてエポキシ樹脂含浸ガラス布を絶縁膜2とす
る場合、大気中で電圧を印加すると、絶縁膜2側エッジ
13aには2倍の電界集中がある。絶縁膜2がほぼ均一
の絶縁耐力をもっているとすると、プリント配線板は絶
縁膜2の1/2の耐電圧しかないことになる。電路と金
属基体を導体電極として、絶縁膜2内の電界を有限要素
法を用いて計算している。静電場において、空間電荷が
存在しないとするとラプラスの方程式「div(εgr
adφ)=0」を満足し、よって「E=−gradφ」
となり、これにより求めた。但し、φは電位、εは誘電
率である。絶縁膜2の厚み100μm、εr =5〜6、
印加電圧10kVとすると、エッジ13aでの電界強度
は約200kV/mmに達する図4において、電界集中
域Aの電界を考える。要素内での電界は一定で要素境界
で電位が連続とすると電界集中域Aの電界はそのまわり
の電界の平均となる。絶縁膜2内の誘電率は一定であ
り、エッジ13aの近傍域Bの誘電率が大きくなると、
電界は誘電率に反比例するから、近傍域Bの電界が小さ
くなり、これを受けて電界集中域Aの電界も小さくな
り、結果として、電界集中が緩和されることになる。Hereinafter, the present invention will be described more specifically.
In FIG. 5, when the insulating film 2 is made of an epoxy resin-impregnated glass cloth, when a voltage is applied in the air, the electric field concentration is doubled at the insulating film 2 side edge 13a. Assuming that the insulating film 2 has a substantially uniform dielectric strength, the printed wiring board has only half the withstand voltage of the insulating film 2. The electric field in the insulating film 2 is calculated using the finite element method, using the electric circuit and the metal base as conductor electrodes. Assuming that there is no space charge in an electrostatic field, Laplace's equation "div (εgr
adφ) = 0 ”, and thus“ E = −gradφ ”
It was determined by this. Where φ is a potential and ε is a dielectric constant. The thickness of the insulating film 2 is 100 μm, ε r = 5 to 6,
Assuming that the applied voltage is 10 kV, the electric field intensity at the edge 13a reaches about 200 kV / mm. In FIG. If the electric field in the element is constant and the potential is continuous at the element boundary, the electric field in the electric field concentration area A will be the average of the electric fields around it. The dielectric constant in the insulating film 2 is constant, and when the dielectric constant in the region B near the edge 13a increases,
Since the electric field is inversely proportional to the dielectric constant, the electric field in the vicinity area B decreases, and accordingly, the electric field in the electric field concentration area A also decreases. As a result, the electric field concentration is reduced.
【0008】絶縁膜側エッジ13aへの高誘電率絶縁材
料の具体的な施与態様としては、例えば、以下のような
ものがある。 図1にみるように、高誘電率絶縁材料
5が電路13のエッジ13aを含む側面をちょうど覆う
ように施与する。 図2にみるように、高誘電率絶縁
材料5が電路13のエッジ13aに限らず全露出面を覆
うように施与する。Specific examples of application of a high dielectric constant insulating material to the insulating film side edge 13a include the following. As shown in FIG. 1, the high dielectric constant insulating material 5 is applied so as to just cover the side surface including the edge 13 a of the electric circuit 13. As shown in FIG. 2, the high dielectric constant insulating material 5 is applied so as to cover not only the edge 13 a of the electric circuit 13 but the entire exposed surface.
【0009】 図3にみるように、高誘電率絶縁材料
5が電路13のエッジ13aから電路13の上面13b
の一部にかけて覆うように施与する。 図4にみるよ
うに、高誘電率絶縁材料5が電路13のエッジ13a近
傍だけを覆うように施与する。上記に限らず、プリント
配線板の全面に高誘電率絶縁材料を施与してもよいが、
電路部のみをスクリーン印刷法(これに限らない)等に
より限定的に塗布する方が隣接する電路同士の干渉が少
なく望ましい。また、高誘電率絶縁材料の塗布後、脱泡
してボイドを除いてから加熱等により硬化させることに
より施与する形態をとることが望ましい。As shown in FIG. 3, the high dielectric constant insulating material 5 is moved from the edge 13 a of the electric circuit 13 to the upper surface 13 b of the electric circuit 13.
To cover a part of As shown in FIG. 4, the high dielectric constant insulating material 5 is applied so as to cover only the vicinity of the edge 13a of the electric circuit 13. Not limited to the above, a high dielectric constant insulating material may be applied to the entire surface of the printed wiring board,
It is desirable to apply only the electric circuit portion by screen printing (not limited to this) or the like so as to reduce interference between adjacent electric circuits. In addition, it is desirable that after application of the high dielectric constant insulating material, defoaming is performed to remove voids, and then the applied material is cured by heating or the like.
【0010】[0010]
【作用】この発明のプリント配線板では、絶縁膜上のプ
リント回路における電路の絶縁膜側エッジに高誘電率絶
縁材料が施与されており、絶縁膜側エッジ域の電界集中
が緩和されるため、絶縁膜の厚みを増さずとも絶縁破壊
が起こり難くなっている。In the printed wiring board of the present invention, the high dielectric constant insulating material is applied to the insulating film side edge of the electric circuit in the printed circuit on the insulating film, so that the electric field concentration in the insulating film side edge region is reduced. In addition, dielectric breakdown does not easily occur without increasing the thickness of the insulating film.
【0011】高誘電率絶縁材料の誘電率が絶縁膜の誘電
率よりも大きい場合は電界集中が緩和される度合いが大
きく、より絶縁膜の絶縁破壊が起こり難い。When the dielectric constant of the high dielectric constant insulating material is higher than the dielectric constant of the insulating film, the degree of reduction of the electric field concentration is large, and the dielectric breakdown of the insulating film is less likely to occur.
【0012】[0012]
【実施例】以下、この発明の実施例を説明する。 −実施例1− 実施例1のプリント配線板は、図3に示す構成である。
金属基体1は厚み1mm、縦70mm、横70mmのア
ルミニウム角板である。絶縁膜2は厚み100μmのエ
ポキシ樹脂膜(εr =3.9)である。電路13は、厚
み35μm、直径25mmの銅箔円板である。高誘電率
絶縁材料5はエポキシ樹脂にルチル(酸化チタン)を4
0体積%添加したもの(εr =10)である。Embodiments of the present invention will be described below. -Example 1-The printed wiring board of Example 1 has a configuration shown in Fig. 3.
The metal substrate 1 is an aluminum square plate having a thickness of 1 mm, a length of 70 mm and a width of 70 mm. The insulating film 2 is a 100 μm thick epoxy resin film (ε r = 3.9). The electric circuit 13 is a copper foil disk having a thickness of 35 μm and a diameter of 25 mm. High dielectric constant insulating material 5 is made of epoxy resin containing rutile (titanium oxide) 4
0 volume% was added (ε r = 10).
【0013】電路13は絶縁膜2上の銅箔をエッチング
しパターン化することにより形成されており、電路13
形成後、エポキシ樹脂にルチル(酸化チタン)を40堆
積%添加したものをエッジ13aに塗布した後、脱泡に
よるボイド除去処理を行い、加熱して硬化させている。 −実施例2− 絶縁膜2が厚み150μmのアルミナフィラー50体積
%添加エポキシ樹脂膜(εr =6.0)である他は、実
施例1と同じである。The electric circuit 13 is formed by etching and patterning a copper foil on the insulating film 2.
After the formation, an epoxy resin obtained by adding 40% by weight of rutile (titanium oxide) to the epoxy resin is applied to the edge 13a, followed by performing a void removal treatment by defoaming, and curing by heating. Example 2 Example 2 was the same as Example 1 except that the insulating film 2 was a 150 μm thick epoxy resin film (ε r = 6.0) containing 50% by volume of an alumina filler.
【0014】−実施例3− エポキシ樹脂にルチル(酸化チタン)を40堆積%添加
したものに代えて、ソルダーレジスト(太陽インキ ε
r =3.5)を用いた他は、実施例1と同じである。 −実施例4− エポキシ樹脂にルチル(酸化チタン)を40堆積%添加
したものに代えて、ソルダーレジスト(太陽インキ)を
用いた他は、実施例2と同じである。Example 3 A solder resist (solar ink ε) was used instead of epoxy resin to which rutile (titanium oxide) was added by 40% by weight.
This example is the same as Example 1 except that r = 3.5) was used. -Example 4-Example 4 is the same as Example 2 except that a solder resist (solar ink) is used instead of epoxy resin to which rutile (titanium oxide) is added by 40% by weight.
【0015】−比較例1− 高誘電率絶縁材料5を施していない他は、実施例1と同
じである。したがって、エッジの近傍域は空気(εr =
1.0)である。 −比較例2− 高誘電率絶縁材料5を施していない他は、実施例2と同
じである。したがって、エッジの近傍域は空気(εr =
1.0)である。Comparative Example 1 The same as Example 1 except that the high dielectric constant insulating material 5 was not applied. Therefore, the area near the edge is air (ε r =
1.0). - other not subjected to comparative example 2 high-dielectric insulating material 5 is the same as Example 2. Therefore, the area near the edge is air (ε r =
1.0).
【0016】得られたプリント配線板それぞれ6個に対
しV−t試験を実施した。V−t試験では、オイルバス
中で電路13と金属基体1の間にAC4kVの電圧を印
加し、絶縁破壊に至るまでの時間を測定した。測定結果
(平均)を有限要素法でシュミレーションし求めた電界
集中度と共に下記に示す。 実施例1 破壊までの時間:130時間 電界集中度1.55 実施例2 破壊までの時間:150時間 電界集中度1.61 実施例3 破壊までの時間: 50時間 電界集中度1.73 実施例4 破壊までの時間: 70時間 電界集中度1.83 比較例1 破壊までの時間: 5時間 電界集中度2.00 比較例2 破壊までの時間: 9時間 電界集中度2.07 実施例のプリント配線板は格段に絶縁膜の絶縁破壊が
起こり難くなっている。電界集中度のシュミレーション
結果も絶縁破壊が起こり難くなったのが、電界集中の緩
和によるものであることをよく裏付けている。A Vt test was performed on each of the six printed wiring boards obtained. In the Vt test, a voltage of AC 4 kV was applied between the electric circuit 13 and the metal substrate 1 in an oil bath, and the time until dielectric breakdown was measured. The measurement results (average) are shown below together with the electric field concentration obtained by simulating with the finite element method. Example 1 Time to destruction: 130 hours Electric field concentration 1.55 Example 2 Time to destruction: 150 hours Electric field concentration 1.61 Example 3 Time to destruction: 50 hours Electric field concentration 1.73 Example 4 Time to destruction: 70 hours Electric field concentration 1.83 Comparative Example 1 Time to destruction: 5 hours Electric field concentration 2.00 Comparative Example 2 Time to destruction: 9 hours Electric field concentration 2.07 Print Examples In a wiring board, dielectric breakdown of an insulating film is extremely unlikely to occur. The results of the simulation of the degree of concentration of the electric field also well support that the fact that the dielectric breakdown became less likely is due to the relaxation of the concentration of the electric field.
【0017】[0017]
【発明の効果】以上に述べたように、この発明のプリン
ト配線板では、プリント回路における電路の絶縁膜側エ
ッジ近傍の電界集中が緩和されるため、絶縁膜の絶縁破
壊が絶縁膜の厚み増大を伴わずとも起こり難くなってい
る。高誘電率絶縁材料の誘電率が絶縁膜の誘電率よりも
大きい場合は電界集中が緩和される度合いが大きく、よ
り絶縁膜の絶縁破壊が起こり難くなる。As described above, in the printed wiring board of the present invention, since the electric field concentration near the insulating film side edge of the electric circuit in the printed circuit is reduced, the dielectric breakdown of the insulating film increases the thickness of the insulating film. It is unlikely to occur even without. When the dielectric constant of the high-dielectric-constant insulating material is higher than the dielectric constant of the insulating film, the degree of reduction of electric field concentration is large, and dielectric breakdown of the insulating film is less likely to occur.
【図1】この発明のプリント配線板の第1構成例をあら
わす断面図である。FIG. 1 is a sectional view showing a first configuration example of a printed wiring board according to the present invention.
【図2】この発明のプリント配線板の第2構成例をあら
わす断面図である。FIG. 2 is a sectional view showing a second configuration example of the printed wiring board of the present invention.
【図3】この発明のプリント配線板の第3構成例をあら
わす断面図である。FIG. 3 is a sectional view showing a third configuration example of the printed wiring board of the present invention.
【図4】この発明のプリント配線板の第4構成例をあら
わす断面図である。FIG. 4 is a cross-sectional view illustrating a fourth configuration example of the printed wiring board of the present invention.
【図5】従来のプリント配線板の構成例をあらわす断面
図である。FIG. 5 is a cross-sectional view illustrating a configuration example of a conventional printed wiring board.
1 金属基体 2 絶縁膜 3 プリント回路 5 高誘電率絶縁材料 13 電路 13a 絶縁膜側エッジ DESCRIPTION OF SYMBOLS 1 Metal substrate 2 Insulating film 3 Printed circuit 5 High dielectric constant insulating material 13 Electric circuit 13a Insulating film side edge
Claims (2)
なるプリント配線板において、前記プリント回路におけ
る電路の少なくとも前記絶縁膜側エッジに誘電率が絶縁
膜の誘電率よりも大きい高誘電率絶縁材料が施与されて
いることを特徴とするプリント配線板。1. A printed wiring board comprising a printed circuit provided on an insulating film, wherein a dielectric constant is insulated at least at an edge of the printed circuit on an insulating film side of an electric path.
A printed wiring board provided with a high dielectric constant insulating material having a dielectric constant higher than a dielectric constant of a film .
請求項1記載のプリント配線板。2. A method according to claim 1 Symbol placement of the printed circuit board insulating film is formed on the metal substrate surface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3030169A JP2761113B2 (en) | 1991-02-25 | 1991-02-25 | Printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3030169A JP2761113B2 (en) | 1991-02-25 | 1991-02-25 | Printed wiring board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04268786A JPH04268786A (en) | 1992-09-24 |
JP2761113B2 true JP2761113B2 (en) | 1998-06-04 |
Family
ID=12296255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3030169A Expired - Lifetime JP2761113B2 (en) | 1991-02-25 | 1991-02-25 | Printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2761113B2 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5936846A (en) * | 1997-01-16 | 1999-08-10 | Ford Global Technologies | Optimized solder joints and lifter pads for improving the solder joint life of surface mount chips |
JP5838754B2 (en) * | 2011-11-18 | 2016-01-06 | 富士通株式会社 | Wiring structure and method of manufacturing wiring structure |
JP5991411B2 (en) * | 2015-07-10 | 2016-09-14 | 住友電気工業株式会社 | Photovoltaic module, photovoltaic panel, and flexible printed wiring board for photovoltaic module |
JP7325747B2 (en) * | 2019-02-07 | 2023-08-15 | 積水化学工業株式会社 | semiconductor equipment |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0834343B2 (en) * | 1986-12-26 | 1996-03-29 | 三菱電線工業株式会社 | Circuit board and manufacturing method thereof |
JP2726515B2 (en) * | 1989-09-22 | 1998-03-11 | 電気化学工業株式会社 | Semiconductor tower mounting circuit board and method of manufacturing the same |
-
1991
- 1991-02-25 JP JP3030169A patent/JP2761113B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH04268786A (en) | 1992-09-24 |
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