JP2760320B2 - Die bonding method and apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a die bonding method and an apparatus for mounting a semiconductor chip on an island of a strip-shaped lead frame in which a plurality of islands surrounded by a frame are arranged in one direction.

[0002]

2. Description of the Related Art Conventionally, a die bonding process is the first process to enter an assembling process from a chip forming process in which an impurity is diffused into a wafer to form an element and wiring to the element is performed. Before entering this die bonding step, the electrical characteristics of each integrated circuit forming region which becomes a semiconductor chip in a wafer state are measured, and the characteristic grade in each region is classified.
Thereafter, the wafer attached to the pressure-sensitive adhesive sheet was cut into individual regions by a cutting blade to separate into semiconductor chips.

In the die bonding method, first, an adhesive sheet to which a semiconductor chip separated from one wafer is attached is fixed together with a frame to a pellet pickup stage. Next, based on the electrical characteristic result information, only semiconductor chips of the same grade are sequentially picked up by a collet, and the semiconductor chips are placed on a die stage in advance and pressed against each of the adhesive-coated lead frame islands and mounted. I do.

[0004] When semiconductor chips of the same grade are no longer present on the adhesive sheet, the adhesive sheet to which the semiconductor chips separated from another wafer are attached is fixed together with a frame to a pellet pickup stage. Then, as described above, semiconductor chips of the same grade are mounted on the islands of the lead frame. After the semiconductor chips are mounted on the expected number of lead frames, the lead frame mounting the same grade semiconductor chips is called, for example, A lot,
Send to the next process.

[0005] Next, the adhesive sheet from which the semiconductor chips have been removed in the lot A is fixed together with the frame to the pellet pickup stage again. Then, based on the electrical characteristic result information, only semiconductor chips of the same grade different from those described above are sequentially picked up by a collet, and semiconductor chips are placed on each of the lead frame islands previously mounted on the die stage and coated with an adhesive. The chip is pressed and mounted. When there is no semiconductor chip of the same grade on the adhesive sheet, the adhesive sheet separated from another wafer and from which the semiconductor chip of the above-mentioned grade has been removed is fixed together with a frame to a pellet pickup stage. Then, as described above, semiconductor chips of the same grade are mounted on the islands of the lead frame. After the semiconductor chips are mounted on a predetermined number of lead frames, the lead frame mounting the same grade semiconductor chips is called, for example, a lot B and sent to the next process.

As described above, in the assembly process after the die bonding process, lot management is performed so that semiconductor chips of different grades are not mixed.

[0007]

However, in the above-described conventional die bonding method, the adhesive sheet to which the semiconductor chips separated from the wafer for each same grade have been attached must be remounted on the pellet pickup stage. As a result, there is a problem that the die bonding operation must be stopped during the replacement work, which not only lowers the throughput but also lowers the actual operation rate.

Further, since it is necessary to flow in a divided lot configuration for the subsequent process so that different grades are not mixed, productivity is reduced in the subsequent process as in the die bonding process, and furthermore, the variety of the lot configuration is increased. In addition, problems such as an increase in the number of man-hours for production management and delay in TAT arise.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a die bonding method and a die bonding method capable of increasing the actual operation rate at a high processing speed and reducing the number of man-hours required for post-processing.

[0010]

A feature of the present invention is a die bonding method for mounting a semiconductor chip on an island of a strip-shaped lead frame in which a plurality of islands surrounded by a frame are arranged in one direction. A die bonding method in which the semiconductor chip is pressed against the island portion via an adhesive, and at the same time, a grade identification mark is stamped on the frame portion without deforming the frame portion.

Further, another feature of the present invention is that a table on which the lead frame is mounted, an adhesive application section for applying the adhesive to the island section, and the semiconductor chip divided from a wafer are held. A collet portion for pressing the semiconductor chip against the island portion, a stamping portion including a plurality of marking portions of the grade identification mark to be stamped on the frame portion simultaneously with the pressing operation of the collet portion, and an electrical characteristic value of the semiconductor chip. And a marking switching unit that switches to a marking of the grade identification mark of the stamp corresponding to the stamping unit.

Further, it is preferable that the stamp is attached to the collet.

[0013]

Next, the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing the flow of products for explaining one embodiment of the die bonding method of the present invention. In this die bonding method, as shown in FIG.
First, the wafer 21 whose electric characteristics are performed in the electric characteristics selection step and each chip region is classified into grades is diced, divided into semiconductor chips 22 and sent to the die bonding step in a state of being attached to the adhesive sheet 16.
Next, the semiconductor chip 2 is placed on the pellet pickup stage.
The pressure-sensitive adhesive sheet 16 to which 2 is attached is placed together with the outer frame 17.

Next, the collet picks up the semiconductor chip 22 adhering to the end of the adhesive sheet 16 and positions the semiconductor chip of the wafer stored in the floppy disk FD 15 and the electrical characteristic data information thereof. The mark portion of the grade identification mark corresponding to the semiconductor chip 22 picked up is selected based on the semiconductor chip 22 and the semiconductor chip 22 is placed on the island 19 of the lead frame 20 to which the adhesive has been applied in advance.
Is pressed with a collet, and at the same time, the marked part is pressed on the frame part 18 of the lead frame 20 to seal the grade recognition mark 8 with two dots.

Next, the collet is returned to the pellet pick-up stage, the semiconductor chip 22 adjacent to the above-mentioned semiconductor chip is picked up, and the position information of the semiconductor chip on the wafer stored in the FD 15 and their electric characteristic data information are also obtained. Select the mark of the grade identification mark corresponding to the semiconductor chip 22 picked up by
2 is pressed with a collet, and at the same time, the marked part is pressed on the frame part 18 of the lead frame 20 to imprint the grade recognition mark 8 with one dot.

As described above, the semiconductor chips 22 attached to the adhesive sheet 16 are sequentially picked up from the end, and the FD 15
Select the mark portion of the grade identification mark corresponding to the semiconductor chip 22 picked up based on the position information of the semiconductor chip of the wafer stored in the storage device and their electrical characteristic data information, and collect the semiconductor chip 22 on the island 19 by collet. At the same time as the pressing, the marking portion is pressed on the frame portion 18 of the lead frame 20, the grade recognition mark 8 is stamped, and the semiconductor chip affixed to the adhesive sheet 16 is repeatedly removed except for the defective one.

Then, the adhesive sheet 16 on which the semiconductor chip 22 newly selected and diced is attached is placed on a pellet pickup stage together with the outer frame 17, and the same operation as described above is repeated until the number of lots is reached. The bonding process ends. Then, it is sent in a lead frame state to a wire bonding step and a resin sealing step, which are subsequent steps, and after the wires are connected, the periphery of the wires and the semiconductor chip is wrapped with resin. Then, the lead frame 20 is separated and cut into individual separated lead frames 20a, finished, sorted by the grade recognition mark 8, and stored in each packaging tray 23 as the molded semiconductor device 20b.

Applying an identification mark to the lead frame itself is a known technique. If you fall down,
As disclosed in Japanese Unexamined Patent Publication No. 634, a notch or notch is formed outside the lead frame to serve as an identifier.

However, if such a notch or notch is applied to the grade identification mark of the lead frame of the present invention, the following problem occurs. First, if a notch or notch is to be formed in the lead frame, which is a metal plate, a mechanical mechanism must be provided to strike the punch, and the impact force of the punch must be Be aware that the semiconductor chip must be placed away from the collet so that it will not be transmitted, and after the semiconductor chip is mounted, sufficient consideration must be given to the misalignment of the semiconductor chip, such as the formation of a notch or notch, and the delay due to the sequence. Must do.

Another problem is that if such a notch or notch is formed outside the lead frame, the lead frame will be deformed or burred. The lead frame does not slide smoothly in the lead frame guide mechanism described above, which may cause a mounting failure or a wire connection failure due to a positioning failure.

FIGS. 2A and 2B show examples of grade identification marks imprinted on a lead frame.
Therefore, the present invention is to seal the lead frame with ink so as not to deform the lead frame when forming the grade identification mark. Then, it is desirable to use an inorganic material for the pigment so that the ink does not discolor by heating at the time of sealing the resin.

The shape of the grade identification mark to be stamped is, for example, shown by dots as shown in FIG. 2A, or by alphabets as shown in FIG. 2B. . In the case of showing with dots, it is suitable when the grade classification is small, and when the alphabet is used, it is suitable when the grade classification is large. However, marks such as D and O can be confused with C by stamping.

FIG. 3 is a perspective view showing one embodiment of the die bonding apparatus of the present invention. As shown in FIG. 3, the die bonding apparatus includes a table 5 for feeding and positioning the lead frame 20 one frame at a time, a coating section 6 for coating the island section 19 with an Ag paste, and an adhesive sheet 16 separated from the wafer. A plurality of marking portions 1a of a collet portion 3 for adsorbing and holding the semiconductor chip 22 stuck to the island portion 19 and pressing the semiconductor chip 22 against the island portion 19, and a grade identification mark 8 stamped on the frame portion 18 simultaneously with the pressing operation of the collet portion 3. A turret head 2 comprising ~ 1d;
An index mechanism (not shown) is provided at the marking portions 1a to 1d of the grade identification marks of the turret head 2 corresponding to the electrical characteristic values of the semiconductor chip.

In the turret head 2 as a stamping portion, for example, marking portions 1a to 1d each having a different grade identification mark at 90 ° are equally distributed, and the marking portions 1a to 1d are formed by an index mechanism on the back surface of the turret head 2. Is switched. The ink is stored in the jacket of the turret head 2, and the built-in spring is compressed by pressing the markings 1a to 1d, the valve communicating with the jacket opens, and the ink in the jacket flows into the spaces of the markings 1a to 1d. Bleeds on a flat stamped surface.

Next, the operation of the die bonding apparatus will be described. First, the adhesive sheet 16 to which the semiconductor chip 22 is attached is placed on the pellet pickup stage 4 together with the outer frame 17. Next, the pellet pickup stage 4 moves and the semiconductor chip 22 is moved to a position where the collet 3 picks up.
Position. Then, a corresponding grade identification mark signal is obtained from the FD from the position information of the positioned semiconductor chip 22. Then, the collet unit 3 moves as indicated by the arrow, picks up the semiconductor chip 22, and operates the turret head 2 according to the grade identification mark signal to operate the mark 1a to the grade identification mark corresponding to the semiconductor chip 22.
Switch to 1d.

Next, the semiconductor chip 22 is pressed by the collet portion 3 onto the island 19 of the lead frame 20 to which the Ag paste has been applied by the application portion 6 at the same time, and the marked portions 1a to 1d are simultaneously formed on the frame portion of the lead frame 20. A grade recognition mark 8 indicated by a push dot is stamped on 18.

Next, the lead frame 20 on the table 5 is advanced by one frame, and the lead frame 2 on which the Ag paste is applied is moved.
The zero island portion 19 is positioned below the collet portion 3. At the same time, the pellet pickup stage 4 is moved by one pitch, and the semiconductor chip 22 is positioned at a position where the collet unit 3 should pick up. Then, the semiconductor chip 22 adjacent to the semiconductor chip is picked up in the same manner as described above, and the grade identification mark corresponding to the semiconductor chip 22 based on the position information of the semiconductor chip of the wafer stored in the FD 15 and their electrical characteristic data information. And switch the collet portion 3 to pick up the semiconductor chip 22 and press the semiconductor chip 22 against the island portion 19 with the collet portion 3 while simultaneously attaching the mark portions 1a to 1d to the frame portion 18 of the lead frame 20. A grade recognition mark 8 indicated by a push dot is stamped.

As described above, the semiconductor chips 22 attached to the adhesive sheet 16 are sequentially picked up from the end, and the FD 15
Mark portions 1a to 1d of the grade identification marks corresponding to the semiconductor chips 22 picked up based on the position information of the semiconductor chips of the wafer stored in the semiconductor chip and their electrical characteristic data information
And simultaneously pressing the semiconductor chip 22 against the island 19 with a collet, pressing the marking portions 1a to 1d against the frame portion 18 of the lead frame 20, stamping the grade recognition mark 8, and replacing the semiconductor chip stuck on the adhesive sheet 16 with the defective one. Repeat until it disappears except for.

In this die bonding apparatus, in addition to eliminating replacement of wafers for grade classification,
There is no need to move the pellet pickup stage to pick up semiconductor chips of the same grade.
Since the operation of the stamping portion can be performed simultaneously with the lowering operation of the collet portion, there is an advantage that the total time for mounting the semiconductor chip on the lead frame can be further reduced.

[0031]

As described above, according to the present invention, the electric characteristic grade of the semiconductor chip is marked on the lead frame as indicated by the mark so as to be mounted on the lead frame. The work of replacing the number of wafers including the lot for die bonding becomes unnecessary, and as a result, the operation rate of the apparatus is increased, and the throughput of the apparatus can be increased.

Further, since the mark indicating the grade remains in the frame portion of one frame of the lead frame, it is not necessary to manage each lead frame, so that the number of management steps can be greatly reduced. The operation rate of the equipment was also increased.

[Brief description of the drawings]

FIG. 1 is a diagram showing a flow of products for explaining an embodiment of a die bonding method of the present invention.

FIG. 2 is a diagram showing an example of a grade identification mark stamped on a lead frame.

FIG. 3 is a perspective view showing one embodiment of a die bonding apparatus of the present invention.

[Explanation of symbols]

 1a, 1b, 1c, 1d Marking part 2 Turret head 3 Collet part 4 Pellet pickup stage 5 units 6 Coating part 8 Grade identification mark 15 FD 16 Adhesive sheet 17 Outer frame 18 Frame part 19 Island part 20 Lead frame 21 Wafer 22 Semiconductor chip

Claims (3)

(57) [Claims] 1. A die bonding method for mounting a semiconductor chip on an island of a strip-shaped lead frame formed by arranging a plurality of island portions surrounded by a frame portion in one direction, wherein the semiconductor chip is attached via an adhesive. A die bonding method, wherein a grade identification mark is stamped on the frame portion while pressing the island portion without deforming the frame portion. 2. A table on which the lead frame is placed, an adhesive application section for applying the adhesive to the island section, and the semiconductor chip divided from a wafer and held on the island section. A collet portion to be pressed, a stamping portion including a plurality of marking portions of the grade identification mark to be stamped on the frame portion at the same time as the pressing operation of the collet portion, and the stamping portion corresponding to an electrical characteristic value of the semiconductor chip. A die switching unit for switching to a mark of a grade identification mark. 3. The die-boarding device according to claim 2, wherein the stamp is attached to the collet.