JP2753592B2 - 2-wire instrument - Google Patents
2-wire instrumentInfo
- Publication number
- JP2753592B2 JP2753592B2 JP915490A JP915490A JP2753592B2 JP 2753592 B2 JP2753592 B2 JP 2753592B2 JP 915490 A JP915490 A JP 915490A JP 915490 A JP915490 A JP 915490A JP 2753592 B2 JP2753592 B2 JP 2753592B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- signal
- terminal
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000005540 biological transmission Effects 0.000 claims description 11
- 238000004092 self-diagnosis Methods 0.000 claims description 8
- 230000000087 stabilizing effect Effects 0.000 claims description 2
- 230000006641 stabilisation Effects 0.000 claims 1
- 238000011105 stabilization Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 14
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 9
- 230000002159 abnormal effect Effects 0.000 description 8
- 230000005856 abnormality Effects 0.000 description 8
- 238000001514 detection method Methods 0.000 description 8
- 239000003990 capacitor Substances 0.000 description 5
- 230000003111 delayed effect Effects 0.000 description 3
- 230000007613 environmental effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
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- Arrangements For Transmission Of Measured Signals (AREA)
Description
【発明の詳細な説明】 <産業上の利用分野> 本発明は、負荷側から2線の伝送線を介して電源の供
給を受けて測定すべき物理量を電気信号に変換しこれを
マイクロプロセッサにより信号処理をして伝送線を介し
て負荷に電流信号として伝送する2線式計器に係り、特
にこの2線式計器の環境条件の異常を検出するように改
良された2線式計器に関する。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention converts a physical quantity to be measured into an electric signal by receiving power from a load side through two transmission lines, and converts the physical quantity into an electric signal by a microprocessor. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-wire instrument that performs signal processing and transmits a current signal to a load via a transmission line, and more particularly to a two-wire instrument improved to detect an abnormality in environmental conditions of the two-wire instrument.
<従来の技術> 第8図は従来のいわゆる2線式計器の構成の概略を示
す構成図である。<Prior Art> FIG. 8 is a configuration diagram schematically showing a configuration of a conventional so-called two-wire instrument.
マイクロプロセッサを含む2線式計器10は、負荷11側
から直流電源12により2線の伝送線l1、l2を介して入力
端子T1、T2を通じて電流の供給を受けてこの電流から回
路電源を作ると共に測定すべき物理量を検出してこれを
電流信号の変化として、同一の伝送線l1、l2を通じて例
えば4〜20mAの統一された統一電流ILの形で負荷11に伝
達する。The two-wire instrument 10 including the microprocessor receives the current from the load 11 through the input terminals T 1 and T 2 through the two transmission lines l 1 and l 2 from the DC power supply 12 and receives a circuit from the current. a physical quantity to be measured with making power as the detected change by which the current signal is transferred to the load 11 in the form of unified unified current I L of the same transmission line l 1, through l 2 example 4~20mA .
このうち最小の電流は4mAであるが、通常この電流は
ゼロ点の調整・確認のため3.2mA〜3.6mA程度での動作が
要求され、2線式計器10での消費電流に対する制限が大
きい。特に、最近は多機能化の要求を満たすためこの2
線式計器10にマイクロコンピュータが導入されその電力
に対する要求が厳しくなっている。Of these, the minimum current is 4 mA, but usually, this current is required to operate at about 3.2 mA to 3.6 mA to adjust and check the zero point, and the current consumption of the two-wire instrument 10 is greatly limited. In particular, recently, in order to meet the demand for multi-functionality,
A microcomputer has been introduced into the wire-type instrument 10, and the demand for its power has become strict.
その電源回路の具体的な構成の1例を第9図に示す。 FIG. 9 shows an example of a specific configuration of the power supply circuit.
入力端子T1、T2には端子電圧VTとして通常10V程度が
供給され、マイクロプロセッサ14の電源電圧VCは5Vなの
で、この電圧差を利用して供給電流を増加させるために
スイッチングレギュレータ13が用いられている。The input terminal T 1, T 2 usually about 10V is supplied as a terminal voltage V T, the power supply voltage V C of the microprocessor 14 so 5V, the switching regulator 13 to increase the supply current using this voltage difference Is used.
スイッチングレギュレータ13はその入力端子T1、T2の
両端にコンデンサC1が接続され、スイッチSW1とコイルL
1との直列回路を介してマイクロプロセッサ14の電源回
路に接続され、コイルL1の両端にはダイオードD1とコン
デンサC2の一端がそれぞれ接続され、これ等の他端は入
力端子T2に接続されている。The switching regulator 13 is the capacitor C 1 is connected to both ends of the input terminals T 1, T 2, switch SW 1 and a coil L
Is connected to the power supply circuit of the microprocessor 14 via a series circuit of a 1, at both ends of the coil L 1 is connected one end of the diode D 1 and capacitor C 2, respectively, the other end of which, such as the input terminal T 2 It is connected.
この電源電圧VCは制御回路15で検出され内蔵された所
定の基準値と比較されて比較信号が例えばアンドゲート
に印加され、このアンドゲートの他端に印加されている
内蔵された発振器からの周波数の高い発振周波数を比較
信号でオン/オフ制御してこのアンドゲートの出力端に
得られるスイッチング信号によりスイッチSW1をオン/
オフ制御する。This power supply voltage V C is detected by the control circuit 15 and compared with a predetermined reference value stored therein.A comparison signal is applied to, for example, an AND gate, and a signal from a built-in oscillator applied to the other end of the AND gate is applied. oN / oFF control of the high oscillation frequency of the frequency comparison signal the switch SW 1 by the switching signal obtained at the output terminal of the aND gate on /
Control off.
スイッチSW1が閉じられるとコイルL1に電流が注入さ
れ、次にスイッチSW1が開かれると、この間はコイルL1
に蓄積されたエネルギがダイオードD1を介して放出され
電源電圧VCが作られる。When the switch SW 1 is closed is current injected into the coil L 1, the next time the switch SW 1 is opened, during which the coil L 1
Stored energy power supply voltage V C is discharged through the diode D 1 is made.
この場合の電源電圧VCは制御回路15に内蔵されている
基準電圧を変更してスイッチSW1の開閉時間を変えて任
意に変えることができる。The power supply voltage V C of the case can be varied by changing the reference voltage incorporated in the control circuit 15 arbitrarily by changing the closing time of the switch SW 1.
<本発明が解決しようとする課題> しかしながら、電子電圧VTと統一電流ILについては、
例えば12V≦VT≦45V、4mA≦IL≦20mAなどの動作範囲の
仕様であるが、これを外れた場合でも異常な動作をしな
いことが要求される。特に、VT<12V、IL<4mAのように
信号処理回路としてのマイクロプロセッサ14に十分な電
力を供給できない場合にも異常動作を防止する必要があ
る。<Problems The present invention is to solve> However, for the unified current I L and the electron voltage V T is
For example, the specification of the operation range is 12V ≦ V T ≦ 45V, 4mA ≦ I L ≦ 20mA. In particular, it is necessary to prevent abnormal operation even when sufficient power cannot be supplied to the microprocessor 14 as a signal processing circuit such as V T <12 V and I L <4 mA.
演算増幅器などのアナログ回路のみで信号処理回路を
構成しているときにはこの様な異常時の出力をダウンさ
せるのは比較的容易であったが、マクロプロセッサが信
号処理回路として使用されるときに初期化(リセット)
と警報が確実に実行されないと異常動作を起こす機会が
多くなり、安定性を欠くという問題がある。When the signal processing circuit is composed of only analog circuits such as operational amplifiers, it is relatively easy to reduce the output in such an abnormal condition. (Reset)
If the alarm is not securely executed, there are many opportunities to cause an abnormal operation, and there is a problem that the stability is lacking.
<課題を解決するための手段> 本発明は、以上の課題を解決するために、負荷側から
2線の伝送線を介して電源の供給を受けて測定すべき物
理量を電気信号に変換しこれをマイクロプロセッサによ
り信号処理をして伝送線を介して負荷に電流信号として
伝送する2線式計器において、伝送線の両端に発生する
端子電圧のレベルを変換して第1電圧を作るスイッチン
グレギュレータと、端子電圧を安定化して第2電圧を作
る安定化電源回路と、この第2電圧によって動作し端子
電圧の投入・停止・低下と第1電圧の監視を実行して初
期化信号と警報信号とを出力する自己診断回路と、第1
電圧によって動作し初期化信号と警報信号により制御さ
れるマイクロプロセッサを含む信号処理手段とを具備す
るようにしたものである。<Means for Solving the Problems> In order to solve the above problems, the present invention converts a physical quantity to be measured into an electric signal by receiving power supply from a load side through two transmission lines. And a switching regulator for converting a level of a terminal voltage generated at both ends of the transmission line to generate a first voltage in a two-wire instrument that performs signal processing by a microprocessor and transmits the current signal to a load via a transmission line. A stabilized power supply circuit for stabilizing a terminal voltage to generate a second voltage, and an initialization signal and an alarm signal which are operated by the second voltage to execute turning on / off / lowering of the terminal voltage and to monitor the first voltage. Self-diagnosis circuit for outputting
It is provided with signal processing means including a microprocessor which operates by voltage and is controlled by an initialization signal and an alarm signal.
<作 用> スイッチングレギュレータにより伝送線の両端に発生
する端子電圧のレベルを変換して第1電圧を作ると共に
安定化電源回路により端子電圧を安定化して第2電圧を
作る。<Operation> The switching regulator converts the level of the terminal voltage generated at both ends of the transmission line to generate the first voltage, and stabilizes the terminal voltage with the stabilized power supply circuit to generate the second voltage.
自己診断回路はこの第2電圧によって動作し端子電圧
の投入・停止・低下と第1電圧の監視を実行して初期化
信号と警報信号とを出力する。The self-diagnosis circuit operates with the second voltage, performs the turning on / off / lowering of the terminal voltage and monitors the first voltage, and outputs an initialization signal and an alarm signal.
そして、マイクロプロセッサはこの第1電圧によって
動作され初期化信号と警報信号により制御されるように
して環境条件の異常を検出する。Then, the microprocessor is operated by the first voltage and controlled by the initialization signal and the alarm signal to detect the abnormality of the environmental condition.
<実施例> 以下、本発明の実施例について図を用いて説明する。
第1図は本発明の1実施例の構成を示すブロック図であ
る。なお、第8図と第9図に示す回路と同一の機能を有
する要素には同一の符号を付して適宜にその説明を省略
する。<Example> Hereinafter, an example of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention. Elements having the same functions as those of the circuits shown in FIGS. 8 and 9 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.
16は2線式計器であり、この2線式計器16はスイッチ
ングレギュレータ13、安定化電源回路17、自己診断回路
18、およびマイクロプロセッサを含む信号処理回路19な
どにより構成されている。そして、信号電圧VSは入力端
子T1とT2にそれぞれ接続された伝送線l1、l2に直列に接
続された抵抗R1の両端で検出されて信号処理回路19に出
力され、ここで信号処理がなされて出力端子TOに出力さ
れる。Reference numeral 16 denotes a two-wire instrument. The two-wire instrument 16 includes a switching regulator 13, a stabilized power supply circuit 17, and a self-diagnosis circuit.
And a signal processing circuit 19 including a microprocessor. The signal voltage V S is outputted is detected across the input terminals T 1 and T transmission line l 1 which are respectively connected to 2, l 2 resistors connected in series to R1 in the signal processing circuit 19, where signal processing is output to the output terminal T O is made.
スイッチングレギュレータ13は端子電圧VTが入力さ
れ、これをレベル変換して信号処理回路19に第1電圧と
して回路電圧VCを出力するが、端子電圧VTの入力に対し
て回路電圧VCの立上りが遅くしかも負荷電流も大きいの
で、回路電圧VCが安定になるのは安定化電源回路17より
一般に後になる。The switching regulator 13 is the terminal voltage V T is input, but outputs a circuit voltage V C as a first voltage which the signal processing circuit 19 and the level conversion, the circuit voltage V C to the input terminal voltage V T since the rise is slow addition load current is large, the circuit voltage V C is stabilized becomes later generally from the regulated power supply circuit 17.
安定化電源回路17は端子電圧VTが入力され、その出力
端に第2電圧として定電圧VKを出力する。この安定化電
源回路17は、トランジスタQ1、抵抗R2、ツエナダイオー
ドD2などで構成されている。そして、端子電圧VTが抵抗
R2とツエナダイオードD2との直列回路に印加されてツエ
ナダイオードD2の両端に発生したツエナー電圧を基準と
して動作し対応する定電圧VKを出力端に出力するが、こ
の安定化電源回路17は端子電圧VTが回路が動作出来る電
圧まで上がると直ちに動作して定電圧VKを自己診断回路
18に出力することができる。Stabilized power supply circuit 17 is the terminal voltage V T, and outputs the constant voltage V K as the second voltage to its output. The stabilized power supply circuit 17 includes a transistor Q1, a resistor R2, a Zener diode D2, and the like. And the terminal voltage VT is a resistance
R2 and tools is to output a Zener voltage generated at both ends of the is applied to the series circuit Zener diode D2 to the output terminal of the operation corresponding to the constant voltage V K as a reference with Ena diode D2, the stabilized power supply circuit 17 pin if the voltage V T to operate as soon as the rise until the voltage that can operate circuit is self-diagnostic circuit a constant voltage V K
18 can be output.
なお、第1図では安定化電源回路17としてトランジス
タを用いる構成として説明したが、このトランジスタQ1
は必ずしも必要ではなく、抵抗R2とツエナダイオードD2
の直列回路としてこのツエナダイオードD2の両端の電圧
を定電圧VKとする構成としても良い。Although FIG. 1 shows a configuration using a transistor as the stabilized power supply circuit 17, this transistor Q1
Is not always necessary, the resistor R2 and Zener diode D2
Of the voltage across the Zener diode D2 as a serial circuit may be configured to a constant voltage V K.
自己診断回路18は、抵抗R3、R4、R5、R6、コンデンサ
C3、ヒステリシスを持つインバータQ2、R/Sフリップフ
ロップFF1、比較器Q3、基準電圧源E1などで構成される
リセット信号発生回路20と、抵抗R7、R8、基準電圧源E
2、比較器Q4などで構成される異常検知回路21などで構
成されている。The self-diagnosis circuit 18 includes resistors R3, R4, R5, R6, and a capacitor.
A reset signal generation circuit 20 including C3, an inverter Q2 having hysteresis, an R / S flip-flop FF1, a comparator Q3, a reference voltage source E1, etc., and resistors R7, R8, and a reference voltage source E.
2. It is composed of an abnormality detection circuit 21 composed of a comparator Q4 and the like.
まず、リセット信号発生回路20について説明する。 First, the reset signal generation circuit 20 will be described.
定電圧VKを抵抗R3とR4で分圧した分圧電圧がインバー
タQ2の入力端に印加される。インバータQ2の出力端はR/
SフリップフロップFF1のセット端子Sに接続されてい
る。このリセット端子Rは、スイッチングレギュレータ
13の出力である回路電圧VCを抵抗R5とR6で分圧された分
圧電圧が非反転入力端(+)に印加され反転入力端
(−)には基準電圧E1が印加された比較器Q3の出力端が
接続されている。そして、R/SフリップフロップFF1の出
力端Qからリセット信号RSが信号処理回路19に出力され
ている。A divided voltage obtained by dividing the constant voltage VK by the resistors R3 and R4 is applied to the input terminal of the inverter Q2. The output terminal of inverter Q2 is R /
It is connected to the set terminal S of the S flip-flop FF1. This reset terminal R is a switching regulator
Is the output circuit voltage divided by the divided voltage of V C by resistors R5 and R6 non-inverting input terminal (+) to be applied inverting input terminal 13 (-) a comparator reference voltage E1 is applied to the The output terminal of Q3 is connected. Then, the reset signal RS is output to the signal processing circuit 19 from the output terminal Q of the R / S flip-flop FF1.
以上の構成で、電源が投入されるとインバータQ2を介
してR/SフリップフロップFF1がセットされる。With the above configuration, when the power is turned on, the R / S flip-flop FF1 is set via the inverter Q2.
一方、回路電圧VCは端子電圧VTが立ち上がっても暫く
の間は正規の電圧とはならず、このためR/Sフリップフ
ロップFF1のリセット端子Rはローレベルに保持されそ
の出力端Qからマイクロプロセッサを含む信号処理回路
19にリセット信号(初期化信号)RSを与え続けている。
しかし、回路電圧VCがある値、例えば信号処理回路19が
動作する最低電圧に対応する基準電圧E1を越えると比較
器Q3の出力がハイレベルに反転しR/SフリップフロップF
F1のリセット端子Rをハイレベルにしてその出力端Qに
出ていたリセット信号RSを解除する。この回路電圧VCの
最低の値としては例えば4.75Vなどが選択される。以上
のようにしてマイクロプロセッサは確実に初期化され
る。On the other hand, the circuit voltage V C for a while even the rise of the terminal voltage V T does not become normal voltage, Therefore reset terminal R of the R / S flip-flop FF1 is held at a low level from its output terminal Q Signal processing circuit including microprocessor
The reset signal (initialization signal) RS is continuously supplied to 19.
However, when the circuit voltage V C exceeds a certain value, for example, a reference voltage E1 corresponding to the lowest voltage at which the signal processing circuit 19 operates, the output of the comparator Q3 is inverted to a high level, and the R / S flip-flop F
The reset terminal R of F1 is set to a high level to release the reset signal RS output from the output terminal Q. Etc. The lowest value of the circuit voltage V C eg 4.75V is selected. As described above, the microprocessor is securely initialized.
次に、異常検知回路21について説明する。通常、スイ
ッチングレギュレータ13などにはコンデンサが含まれて
いるので外部電源が低下しても直ぐに回路が死ぬことは
ない。Next, the abnormality detection circuit 21 will be described. Usually, since the switching regulator 13 and the like include a capacitor, even if the external power supply drops, the circuit does not die immediately.
そこで、この異常検知回路21が外部電源としての直流
電源12の電圧の異常低下を早期に検知して警報信号ALを
信号処理回路19に出力する。この異常低下を検知する値
としては、例えば仕様最低電圧などが選定され、これは
基準電圧E2で設定される。Thus, the abnormality detection circuit 21 detects an abnormal decrease in the voltage of the DC power supply 12 as an external power supply at an early stage, and outputs an alarm signal AL to the signal processing circuit 19. As a value for detecting the abnormal decrease, for example, a minimum specification voltage or the like is selected, and this is set by the reference voltage E2.
信号処理回路19はこの警報信号ALを検知すると重要な
パラメータの退避、或いは動作の固定などを行い異常動
作を防止する。When detecting the alarm signal AL, the signal processing circuit 19 saves important parameters or fixes the operation to prevent abnormal operation.
第2図はリセット信号発生回路の第2の実施例を示す
回路図である。FIG. 2 is a circuit diagram showing a second embodiment of the reset signal generation circuit.
これは、回路電圧VCが、例えば4.75V以下なら電源投
入直後と想定される場合に、回路電圧VCの検知が電源投
入を兼ねるように構成したものである。This circuit voltage V C, for example when it is assumed that immediately after the following if the power is turned 4.75V, in which the detection circuit voltage V C is configured to serve as a power-on.
比較器Q4の出力をインバータQ5を介してリセット信号
RSを取り出す。なお、比較器Q4にはヒステリシスを持た
せるために抵抗R9で正帰還がかけられている。The output of comparator Q4 is reset via inverter Q5.
Take out RS. In addition, positive feedback is applied to the comparator Q4 by the resistor R9 in order to have hysteresis.
第3図はリセット信号発生回路の第2の実施例を示す
回路図である。FIG. 3 is a circuit diagram showing a second embodiment of the reset signal generation circuit.
この実施例はマイクロプロセッサなどは回路電圧VCが
4.75V以上になっても一定時間以上はリセットをかけ続
ける必要がある。この様な場合に遅延回路によりリセッ
ト時間を長くするように構成したものである。In this embodiment, the circuit voltage V C is
Even if it becomes 4.75V or more, it is necessary to continue resetting for more than a fixed time. In such a case, the reset circuit is configured to extend the reset time by a delay circuit.
オア回路Q6の入力の一端にはリセット信号RSが、その
他端には遅延回路DLで所定時間τだけ遅延された遅延信
号ΔRSがそれぞれ入力され、オア回路Q6でこれ等の論理
和が演算されてこの出力端に得られたリセット信号RS′
により信号処理回路19をリセットする。The reset signal RS is input to one end of the input of the OR circuit Q6, and the delay signal ΔRS delayed by a predetermined time τ by the delay circuit DL is input to the other end, and the OR of these signals is calculated by the OR circuit Q6. The reset signal RS 'obtained at this output terminal
Resets the signal processing circuit 19.
この場合のタイミング図を第4図に示す。(イ)に示
すリセット信号RSに対して(ロ)に示す遅延時間τだけ
遅延された遅延信号ΔRSにより(ハ)に示すようにリセ
ット信号RS′のパルス幅が拡大されている。FIG. 4 shows a timing chart in this case. The pulse width of the reset signal RS 'is expanded as shown in (c) by the delay signal ΔRS delayed by the delay time τ shown in (b) with respect to the reset signal RS shown in (a).
第5図は第3図に示す遅延回路DLの第2の実施例を示
す回路図である。FIG. 5 is a circuit diagram showing a second embodiment of the delay circuit DL shown in FIG.
この場合は、インバータQ7、抵抗R10、コンデンサC
4、ヒステリシスを持つインバータQ8により遅延回路を
構成している。In this case, inverter Q7, resistor R10, capacitor C
4. The delay circuit is composed of the inverter Q8 with hysteresis.
第6図はリセット信号発生回路の第3の実施例を示す
回路図である。FIG. 6 is a circuit diagram showing a third embodiment of the reset signal generation circuit.
この場合は、R/SフリップフロップFF2、2η+1カウ
ンタCTを用いて構成した場合を示している。In this case, a case is shown in which an R / S flip-flop FF2, 2η + 1 counter CT is used.
リセット信号RSはR/SフリップフロップFF2のセット端
子Sに入力されると共にカウンタCTのリセット端Rに入
力される。一方、カウンタCTのクロック端CLにはクロッ
ク信号CLKが入力され、その計数結は出力端QηからR/S
フリップフロップFF2のリセット端子Rに出力され、そ
の出力端Qから遅延されたリセット信号RS′が出力され
る。The reset signal RS is input to the set terminal S of the R / S flip-flop FF2 and to the reset terminal R of the counter CT. On the other hand, the clock signal CLK is input to the clock terminal CL of the counter CT, and the counting is performed by the output terminal Qη from the R / S
The signal is output to the reset terminal R of the flip-flop FF2, and a delayed reset signal RS 'is output from the output terminal Q.
リセット信号RSがローレベルになってからクロック信
号CLKを2η数えて立ち上がり、その出力をR/Sフリップ
フロップFF2のリセット端子Rに印加する。これにより
その出力端Qから出される反転されたリセット信号RS′
により信号処理回路19のリセットが解除される。Reset signal RS rises counted from the low level clock signal CLK to 2 eta, and applies the output to the reset terminal R of the R / S flip-flop FF2. As a result, an inverted reset signal RS 'output from its output terminal Q is output.
As a result, the reset of the signal processing circuit 19 is released.
第7図は異常検知回路の他の実施例を示す回路図であ
る。FIG. 7 is a circuit diagram showing another embodiment of the abnormality detection circuit.
この実施例は仕様より遥かに低い電圧を下回ったとき
に警報信号としてダウン信号DWNをも出力できるように
構成したものである。This embodiment is configured so that a down signal DWN can be output as an alarm signal when the voltage is much lower than the specification.
端子電圧VTを抵抗R8、R11、R12で分圧し、抵抗R8とR1
1との接続点の電圧を電圧E2が印加された比較器Q9の反
転入力端(−)に印加して、その出力端から信号処理回
路19にダウン信号DWNを出力する。The terminal voltage V T resistors R8, R11, dividing by R12, resistor R8 and R1
The voltage at the connection point with 1 is applied to the inverting input terminal (−) of the comparator Q9 to which the voltage E2 is applied, and the output terminal outputs a down signal DWN to the signal processing circuit 19.
また、異常信号の検知としては第1図に示すスイッチ
ングレギュレータ13のスイッチSW1をオンにするデュー
テイが規定以上になったときには負荷電流が入力電流に
比べて多くなっているので、これを検出して警報信号と
しても良い。As for the detection of an abnormal signal, when the duty for turning on the switch SW1 of the switching regulator 13 shown in FIG. 1 exceeds a specified value, the load current is larger than the input current. May be used as an alarm signal.
<発明の効果> 以上、実施例と共に具体的に説明したように本発明に
よれば、自己診断回路はマイクロプロセッサより早く立
ち上がる第2電圧で動作するので、電源投入のときに確
実に初期化をすることができ、また外部電源の低下・停
電を検出しているのでマイクロプロセッサ側で異常動作
を防止する対策が容易に行うことができる。さらに、第
2電圧は簡単な安定化電源で構成するので電力利用率が
低いが、これを利用するのは自己診断回路だけであり、
信号処理回路はスイッチングレギレータの第1電圧を使
うので全体として電力の有効利用が可能となり、2線式
計器で重要な回路の低電力化を図ることができる。<Effects of the Invention> As described above in detail with the embodiment, according to the present invention, the self-diagnosis circuit operates at the second voltage which rises faster than the microprocessor, so that the initialization is surely performed when the power is turned on. In addition, since a decrease in the external power supply and a power failure are detected, measures to prevent abnormal operation can be easily performed on the microprocessor side. Furthermore, since the second voltage is composed of a simple stabilized power supply, the power utilization rate is low, but this is used only by the self-diagnosis circuit.
Since the signal processing circuit uses the first voltage of the switching regulator, power can be effectively used as a whole, and the power of important circuits in a two-wire instrument can be reduced.
第1図は本発明の1実施例の構成を示すブロック図、第
2図はリセット信号発生回路の第2の実施例を示す回路
図、第3図はリセット信号発生回路の第2の実施例を示
す回路図、第4図は第3図に示す回路の動作を説明する
タイミング図、第5図は第3図に示す遅延回路の第2の
実施例を示す回路図、第6図はリセット信号発生回路の
第3の実施例を示す回路図、第7図は異常検知回路の他
の実施例を示す回路図、第8図は従来の2線式計器の構
成の概要を示す構成図、第9図は第8図に示す電源回路
の具体的な構成の1例を示すブロック図である。 10、16……2線式計器、11……負荷、12……直流電源、
13……スイッチングレギュレータ、14……マイクロプロ
セッサ、17……安定化電源回路、18……自己診断回路、
19……信号処理回路、20……リセット信号発生回路、21
……異常検知回路。FIG. 1 is a block diagram showing a configuration of one embodiment of the present invention, FIG. 2 is a circuit diagram showing a second embodiment of a reset signal generation circuit, and FIG. 3 is a second embodiment of a reset signal generation circuit. FIG. 4 is a timing chart for explaining the operation of the circuit shown in FIG. 3, FIG. 5 is a circuit diagram showing a second embodiment of the delay circuit shown in FIG. 3, and FIG. 6 is a reset circuit. FIG. 7 is a circuit diagram showing a third embodiment of the signal generation circuit, FIG. 7 is a circuit diagram showing another embodiment of the abnormality detection circuit, FIG. 8 is a configuration diagram showing an outline of the configuration of a conventional two-wire instrument, FIG. 9 is a block diagram showing one example of a specific configuration of the power supply circuit shown in FIG. 10, 16 ... 2-wire instrument, 11 ... load, 12 ... DC power supply,
13 Switching regulator, 14 Microprocessor, 17 Stabilized power supply circuit, 18 Self-diagnosis circuit,
19: Signal processing circuit, 20: Reset signal generation circuit, 21
…… Abnormality detection circuit.
Claims (1)
給を受けて測定すべき物理量を電気信号に変換しこれを
マイクロプロセッサにより信号処理をして前記伝送線を
介して前記負荷に電流信号として伝送する2線式計器に
おいて、前記伝送線の両端に発生する端子電圧のレベル
を変換して第1電圧を作るスイッチングレギュレータ
と、前記端子電圧を安定化して第2電圧を作る安定化電
源回路と、この第2電圧によって動作し前記端子電圧の
投入・停止・低下と前記第1電圧の監視を実行して初期
化信号と警報信号とを出力する自己診断回路と、前記第
1電圧によって動作し前記初期化信号と前記警報信号に
より制御される前記マイクロプロセッサを含む信号処理
手段とを具備することを特徴とする2線式計器。1. A power supply is supplied from a load side via two transmission lines to convert a physical quantity to be measured into an electric signal, which is subjected to signal processing by a microprocessor, and the electric signal is processed by a microprocessor. And a switching regulator for converting a level of a terminal voltage generated at both ends of the transmission line to generate a first voltage, and a stabilization for stabilizing the terminal voltage to generate a second voltage. A power supply circuit, a self-diagnosis circuit that operates with the second voltage, performs on / off / stop of the terminal voltage, monitors the first voltage, and outputs an initialization signal and an alarm signal; A two-wire instrument comprising signal processing means including a microprocessor operated by voltage and controlled by the initialization signal and the alarm signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP915490A JP2753592B2 (en) | 1990-01-18 | 1990-01-18 | 2-wire instrument |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP915490A JP2753592B2 (en) | 1990-01-18 | 1990-01-18 | 2-wire instrument |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH03212799A JPH03212799A (en) | 1991-09-18 |
JP2753592B2 true JP2753592B2 (en) | 1998-05-20 |
Family
ID=11712703
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP915490A Expired - Lifetime JP2753592B2 (en) | 1990-01-18 | 1990-01-18 | 2-wire instrument |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2753592B2 (en) |
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US6519546B1 (en) | 1996-11-07 | 2003-02-11 | Rosemount Inc. | Auto correcting temperature transmitter with resistance based sensor |
US6754601B1 (en) | 1996-11-07 | 2004-06-22 | Rosemount Inc. | Diagnostics for resistive elements of process devices |
US6449574B1 (en) | 1996-11-07 | 2002-09-10 | Micro Motion, Inc. | Resistance based process control device diagnostics |
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US6473710B1 (en) | 1999-07-01 | 2002-10-29 | Rosemount Inc. | Low power two-wire self validating temperature transmitter |
US6505517B1 (en) | 1999-07-23 | 2003-01-14 | Rosemount Inc. | High accuracy signal processing for magnetic flowmeter |
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US6629059B2 (en) | 2001-05-14 | 2003-09-30 | Fisher-Rosemount Systems, Inc. | Hand held diagnostic and communication device with automatic bus detection |
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US8874402B2 (en) | 2003-05-16 | 2014-10-28 | Fisher-Rosemount Systems, Inc. | Physical memory handling for handheld field maintenance tools |
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US7199784B2 (en) | 2003-05-16 | 2007-04-03 | Fisher Rosemount Systems, Inc. | One-handed operation of a handheld field maintenance tool |
US7290450B2 (en) | 2003-07-18 | 2007-11-06 | Rosemount Inc. | Process diagnostics |
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US8112565B2 (en) | 2005-06-08 | 2012-02-07 | Fisher-Rosemount Systems, Inc. | Multi-protocol field device interface with automatic bus detection |
US7940189B2 (en) | 2005-09-29 | 2011-05-10 | Rosemount Inc. | Leak detector for process valve |
US7953501B2 (en) | 2006-09-25 | 2011-05-31 | Fisher-Rosemount Systems, Inc. | Industrial process control loop monitor |
US7750642B2 (en) | 2006-09-29 | 2010-07-06 | Rosemount Inc. | Magnetic flowmeter with verification |
US7321846B1 (en) | 2006-10-05 | 2008-01-22 | Rosemount Inc. | Two-wire process control loop diagnostics |
US8898036B2 (en) | 2007-08-06 | 2014-11-25 | Rosemount Inc. | Process variable transmitter with acceleration sensor |
US7590511B2 (en) | 2007-09-25 | 2009-09-15 | Rosemount Inc. | Field device for digital process control loop diagnostics |
US7921734B2 (en) | 2009-05-12 | 2011-04-12 | Rosemount Inc. | System to detect poor process ground connections |
US9207670B2 (en) | 2011-03-21 | 2015-12-08 | Rosemount Inc. | Degrading sensor detection implemented within a transmitter |
US9052240B2 (en) | 2012-06-29 | 2015-06-09 | Rosemount Inc. | Industrial process temperature transmitter with sensor stress diagnostics |
US9602122B2 (en) | 2012-09-28 | 2017-03-21 | Rosemount Inc. | Process variable measurement noise diagnostic |
Also Published As
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