JP2727073B2 - Image processing device capable of specifying recording position - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a simple electrophotographic color copying machine and the like.
An image recording apparatus capable of specifying a suitable recording position by applying
You. [Background of the Invention] An image processing apparatus capable of enlarging / reducing an original image
In addition, photoelectric conversion elements such as CCD
When using an element, the original image read by the photoelectric conversion element
Appropriate for pixel data of the image according to the enlargement / reduction magnification
By increasing or decimating unnecessary image data.
To obtain an enlarged / reduced image signal
General. FIG. 43 shows an enlarged image used in such an image processing apparatus.
Block diagram of a main part showing an example of a processing system for executing reduction.
FIG. In the figure, reference numeral 40 denotes a memory for image data,
Input terminal 41 is read by image reading means.
The expanded image data is supplied after being subjected to enlargement / reduction processing. output
Output image data obtained at terminal 42 is supplied to a recording device, etc.
And the enlarged / reduced image is reproduced. When enlarging / reducing, it depends on the recording width of the recording device.
The amount of image data to the memory 40 is limited.
Is the timing of the address generator 47 for the memory 40
Is controlled according to enlargement / reduction. Therefore, presettable first and second counters
43 and 44 are provided, and a predetermined cycle is reached until each preset value P1 and P2.
When counting the clock CLK2 (FIG. 44C) of the wave number,
First and second output pulses C1 and C2 are generated (FIG.
E). The flip-flop 45 is set by the first output pulse C1.
And reset by the second output pulse C2.
As a result, a window pulse WP shown in FIG. This
Window pulse WP is applied to the gate circuit 46 by a gate pulse.
The address is supplied by the width W1 of the window pulse WP.
The clock CLK2 is supplied to the generator 47. However, this
Lock CLK2 is synchronized with the scaled image data
Clock. As a result, the address data for the memory
44A, the horizontal effective area signal (H-VA
LID) image data (B in the figure)
Image data corresponding to the period W1 is written to the memory 40
(G in the figure). Therefore, the preset values P1 and P2 are
Window pulse WP according to this change.
This changes the width W1 of the
The amount of image data to be transferred is limited. In the case of reduction, the window pulse WP and the horizontal effective area signal
The width of the issue (H-VALID) is treated the same. In contrast,
In the case of enlargement, the number of image data increases, so
To the width of the horizontal effective area signal (H-VALID)
The width of the window pulse WP to reduce the number of data
Like that. Further, in such an image processing apparatus, the recording paper
An image can be recorded at an arbitrary position. When specifying the recording position, as shown in FIG. 44,
First, the width W1 is changed according to the magnification and the designated reading area.
At the same time, recording on the recording paper is specified by the width W2.
You. [Problems to be Solved by the Invention] By the way, in the conventional color image processing apparatus described above,
This raises the following problems. That is, in the configuration shown in FIG.
The amount of image data to be written in the memory 40 is controlled according to the magnification of
Although the write address is limited,
The first address (address 0) is always specified
In particular, if the reading device or recording device
Or scan the original with reference to the center of the recording paper
When applied to an image processing device that records or records
Depending on the magnification, the image to be recorded is
It happens that you are out of range. For example, as shown in FIG.
When the maximum reading width is set, the center line l of the document table 51 is
The image data of the original 52 is read based on
If the image is recorded on the basis of
Although recorded as shown in FIG. 46B, at the time of reduction,
It is recorded as shown in FIG. This is the first write address in memory 40,
That is, the address 0 is an output device (such as a laser printer).
This corresponds to the writing start position of the recording device.
Therefore, if the size of the recording paper 53 to be recorded is small,
May be outside the transfer area of the recording paper.
In this case, the reduced image can be correctly recorded on the recording paper.
Can not. Even when the size of the recording paper 53 is large, the reduced image
Has the drawback that it is recorded at the end of the recording paper 53. Furthermore, at the time of enlargement processing, the margins of the original document are also enlarged.
As a result, it is enlarged as shown in FIG. 46C.
You. Therefore, the necessary range of the image is
Recording may not be possible. In such a color image processing apparatus, the
It is configured so that the recording position can be specified externally by the operator.
Some are. This corresponds to the area of the original 52 shown in FIG. 47A.
n is enlarged to, for example, the designated position of the recording paper 53 shown in FIG.
Color image that can record the enlarged image N
An image processing apparatus. In such a color image processing apparatus, an image reading
Regarding the main scanning direction of the column, the specified magnification is transferred to the memory 40.
Control the write address of the
The read address is controlled in accordance with the
Horizontal valid area signal (H-VALID) according to the width of the specified area
Need to control the width. Therefore, in the conventional color image processing apparatus, the recording position is
The circuit configuration and its control added to specify
It was complicated. In the sub-scanning direction, start reading an image and start recording.
The start timing is controlled according to the recording position.
In this case, the start of reading or recording
Control only the recording position.
May run out of time for one process. Therefore, in the present invention, the recording position can be designated in this way.
An image recording device configured to
To be able to record images in real time
In this kind of image recording device, the configuration is simple, specified
Image area can be correctly recorded at the specified position
It is an object of the present invention to provide an image processing apparatus having such a configuration. [Means for Solving the Problem] In order to solve the above-mentioned problem, in the present invention, the original image
Reading means for reading the image, and reading by the reading means.
Output means for outputting image data based on the extracted original image
And image data output by the output means.
To image data on an image forming body having a photoconductive photosensitive layer.
Form a corresponding electrostatic image, develop it, and print the image on recording paper
In the image processing apparatus recorded on the
Area designation means and designation in the sub-scanning direction of the output means
If the area coordinate position is larger than the original image coordinate position
Output timing more than read timing
The output means in the sub-scanning direction.
Position of the specified area is smaller than the coordinates of the original image.
If it is smaller, the read timing is
Control so that it is faster than the
Timing control means and the output means in the sub-scanning direction.
The position of the specified area coordinates in the
Is greater than the return time of the reading means,
Select from the relationship between output timing and read timing
And the designated area coordinates in the sub-scanning direction of the output means.
Is smaller than the position of the coordinates of the original image,
The return time is a predetermined time regardless of the output timing.
Having return time selecting means to make it selected.
It is a feature. [Operation] By adopting the above configuration, a large-scale
Easy trimming without the need for re-mounting equipment
Processing becomes possible. Also, the processing time during the trimming process
Can be shortened. [Embodiment] Hereinafter, an image processing apparatus capable of specifying a recording position according to the present invention will be described.
An example of the position is a real-time processing based on the center line l.
When applied to a color image processing device
This will be described in detail with reference to FIG. FIG. 1 shows a schematic configuration of an image processing apparatus according to the present invention.
You. The image information of the original 52 and the like is
Separation processing, A / D conversion processing, and other image processing are performed
As a result, image data of a predetermined number of bits corresponding to each color signal can be obtained.
Data, for example, converted to image data of 16 gradations (OF)
It is. Each image data is enlarged / reduced by the image processing circuit 2.
After image processing such as is done, in the output buffer circuit 90,
Image recording processing and recording designation based on the central reference described later
Is performed. These processes are performed by the line provided in the output buffer circuit 90.
Write or read address to
It is achieved by controlling. Output buffer circuit 90
The image data corresponding to each color read from the
And the image is recorded at the magnification set externally.
Or the image is recorded at a position set externally.
is there. These series of image processing are all real-time processing.
Reason. An image reading unit is driven in the image reading device 50.
Drive motor, exposure lamp, etc.
However, these are sequence control circuits (sequence driver
-) Predetermined timing by control signal obtained from 70
Controlled by The sequence control circuit 70
Data from the application sensor (especially, not shown)
You. The operation / display section 75 allows you to specify the magnification,
Various input data, such as the designation of recording colors, has been input
And its contents are displayed. Therefore, this operation / table
The display unit 75 specifies the image recording position (processing area) and the recording color.
It also functions as a means. The display means uses elements such as LEDs.
Used. Controls for the various control and image processing devices described above
System control circuit 80
Is controlled by Therefore, this system control
Rule circuit 80 is microcomputer controlled using CPU
Is appropriate. The figure shows an example of microcomputer control.
There is a system between the control circuit 80 and the various circuit systems described above.
Necessary image processing data and control data
Data will be exchanged. This will be specifically described below. An image reading start signal is sent to the image reading device 50.
Signal, start signal for shading correction, recording color designation signal
And the like are supplied via a system bus 81. The image processing circuit 2 is designated by the operation / display unit 75.
Data for specifying the specified magnification or image data
Threshold selection data for selecting a threshold for
Recording position specification data when the recording position is specified
Is loaded into the control circuit 80 before the system
Is supplied through the network 81. The output buffer circuit 90 has a line
Memory write or read start address
Be paid. Writing set to line memory
Or read start address data is specified magnification or recording position
It differs depending on the specified data. The start signal for image recording is output to the output device 65.
No. and a selection signal of the recording paper size are supplied. Output device
An electrophotographic color copier is used as the device 65.
It is. For convenience of explanation, first, a simplified form applicable to the present invention
An example of the configuration of a color copying machine will be described with reference to FIG.
I will do it. Simplified color copiers use three types of color information
And attempts to record a color image.
In this example, three types of color information to be separated are black BK,
A red R and a blue B are exemplified. In FIG. 8, reference numeral 200 denotes an example of a main part of a color copying machine.
There is a drum-shaped image forming member 201 on its surface.
Has a photoconductive photoreceptor surface layer such as selenium Se
To form an electrostatic image (electrostatic latent image) corresponding to
Have been. The circumferential surface of the image forming body 201 is sequentially arranged in the rotation direction.
The members as described below are arranged. The surface of the image forming body 201 is uniformly charged by the charger 202.
And then its surface is weak by the exposure lamp 203
It is uniformly exposed to light. Charged and exposed image forming body 201
The image exposure based on each color separation image (the optical image
4). After the image exposure, the image is developed by a predetermined developing device. Developing unit
Are arranged by the number corresponding to the color separation images. Black in this example
Developing device 205 filled with the toner developer of
Developer 206 filled with the same developer and the blue toner
The developing device 207 filled with the image agent is used to rotate the image forming body 201.
In this order, the surface of the image forming body 201 is sequentially faced.
Oriented. The developing units 205 to 207 are sequentially synchronized with the rotation of the image forming body 201.
Selected, for example, by selecting developer 205
Toner adheres to the electrostatic image based on the color separation image of
As a result, a black color separation image is developed. On the developing unit 207 side, a pre-transfer charger 209 and a pre-transfer exposure lamp
210, which are used to record color images
It is easy to transfer to P. However, these pre-transfer zones
The electric appliance 209 and the pre-transfer exposure lamp 210 are provided as necessary.
It is. The color image developed on the image forming body 201 is transferred to a transfer unit 211.
Is transferred onto the recording medium P. Transcribed recordings
P is subjected to a fixing process by a fixing unit 212 at a subsequent stage,
The post-recording medium P is discharged. The static eliminator 213 includes a static elimination lamp and a corona discharger for static elimination.
Or a combination of both. The cleaning device 214 includes a cleaning blade and a fan.
Brushes, which are used to cover the image forming body 201.
Remaining on the drum surface after transferring the color image
Try to remove toner. This removal is performed once the developed surface is reached.
By the time it moves away from the surface of the image forming body 201.
Is well known. As the charger 202, a scorotron corona discharger or the like is used.
Can be used. This is due to the influence of the previous charging.
It is possible to give a small and stable charge on the image forming body 201.
Because you can. As the image exposure 204, a laser beam scanner is used.
The resulting image exposure is used. Laser beam scanner
In this case, a clear color image is recorded as described later.
Can be The image exposure means shown in FIG.
An example of 220 is shown. The laser beam scanner 220 is a laser beam source such as a He-Ne laser.
The laser beam emitted from the laser 221.
Reaching the acousto-optic modulator 224 via mirrors 222 and 223
This allows the laser beam to form a color separation image (eg, 2
ON / OFF control based on the value data). On Oh
The controlled laser beam is emitted from an octahedral rotating polygon mirror.
Is deflected by the mirror scanner 225
The surface of the image forming body 201 through the f-θ lens 227 for
Is done. The laser beam is changed to the image forming body 2 by the mirror scanner 225.
01 will be scanned in a predetermined direction at a constant speed.
Therefore, image scanning corresponding to the color separation image is performed by such scanning.
Will be done. When using the laser beam scanner 220, the color component
Easy to form while shifting the electrostatic image for each resolution
Because it is possible to form a clear color image
Wear. The magnifying lens 226 provided in the mirror scanner 225
Is to reduce the beam diameter on the image forming body 201,
The diameter of the beam incident on the imaging f-θ lens 227 is determined in advance.
It is used to enlarge. Image data obtained from the image processing circuit 2, for example,
The binarized binary output constitutes a part of the output device 65.
When supplied to the beam scanner 220,
The optical modulator 224 is modulated by the binary output to obtain the image exposure described above.
Light will be performed. Since the developing devices 205 to 207 have the same configuration,
The configuration will be described. FIG. 10 shows an example of the developing device 205. In the figure, reference numeral 241 denotes aluminum or stainless steel.
Image formation with a cylindrical developing sleeve made of any non-magnetic material
The body 201 is opposed to and located close to the peripheral surface of the body 201. Development
The inside of the leave 241 has a plurality of magnetic poles in the circumferential direction.
Is provided. By this
Then, the developer (toner T) stored in the developer reservoir 246 is
The surface of the developing sleeve 241 can be attracted.
You. Layer provided on the peripheral side of developing sleeve 241
The thickness regulating blade 243 is formed on the developing sleeve 241.
The purpose of this is to regulate the thickness of the image agent layer.
The paper blade 244 is used for developing after developing from the developing sleeve 241.
This is for removing the agent layer. A stirring rotator 245 for stirring the developer is contained in the developer reservoir 246.
Is provided. 247 is the toner hopper and 248 is
This is a toner supply roller. Reference numeral 249 denotes a power supply for forming an electric field.
Voltage to the developing sleeve 241 via the protective resistor 251
Applied. The resulting electric field of a certain magnitude
The toner between the developing sleeve 241 and the image forming body 201
-T movement is controlled. In such a developing device 205, the magnetic pole of the magnet body 242 is usually 500
Magnetized to a magnetic flux density of ~ 1500 Gauss,
The developer is attracted to the surface of the developing sleeve 241 by the force.
The thickness of the adsorbed developer is
Will be regulated. And the thickness of the layer is regulated
Developer layer is in the same direction as the rotation direction of the image forming body 201 or
Move in the opposite direction (the same direction in the figure) to
In the development region where the surface of
The electrostatic image of the image forming body 201 is developed, and the rest is
Is removed from the surface of the developing sleeve 241 and the developer pool 2
It is to be returned to 46. It should be noted that a small number of repetitions for overlapping the color toner images
At least for the second and subsequent developments,
The toner T attached to the image forming body 201 is shifted in later development.
You have to make sure there is no such thing as So
In the sense of such development is non-contact jumping development conditions
Is preferred. Figure 10 shows such a non-contact
Shows a developing device that develops according to the pumping development conditions.
You. The developer includes a non-magnetic toner and a magnetic carrier.
It is preferable to use a so-called two-component developer in which
Good. This two-component developer has a clear color and toner
This is because charge control is easy. FIG. 2 shows an image reading device 50 and an image processing circuit.
2 shows an example. In the figure, the color image information (optical image) of the original 52 is
The dichroic mirror 55 separates the image into two color separation images.
Separated. In this example, the color separation image of red R and the color of cyan Cy
It is separated into a separated image. Therefore, Dichroic Mira
The cut-off of -55 is about 660 nm. This
As a result, the red component becomes transmitted light and the cyan line segment is reflected.
It becomes light. Each color separation image of red R and cyan Cy is an image such as CCD
The red component R and the red component R are supplied to reading means 56 and 57, respectively.
And an image signal of only the cyan component Cy. FIG. 3 shows the relationship between the image signals R and Cy and various timing signals.
The horizontal effective area signal (H-VALID) (Fig. C) is C
It corresponds to the maximum original reading width W of CD56 and CD57,
The image signals R and Cy shown in G are applied to the synchronous clock CLK (E in the same figure).
Read out synchronously. These image signals R and Cy are passed through normalizing amplifiers 58 and 59.
Is supplied to the A / D converters 60 and 61,
Are converted to digital signals of the same number. Digital color image
The signal is supplied to the next stage color separation circuit 150,
It is separated into a plurality of color signals necessary for recording. In the above example, a color image with three colors of red R, blue B and black BK
Since it is a simple recording device that records
The separation circuit 150 separates these three color signals R, B, and BK.
Will be. A specific example of color separation will be described later. The color signals R, B, and BK are one of them in the color selection circuit 160.
Color signals are selected. This is the image
One color image is developed per rotation of the formation body 201
This is because the image forming process
Developing units 205 to 207 are selected in synchronization with the rotation of the image forming body 201.
Color signal corresponding to the selected developing device
The selection is made in the color selection circuit 160. Terminals 170 are supplied with selection signals G1 to G3 corresponding to color signals.
It is. The selection signals G1 to G3 are recorded in three colors as described later.
Recording, that is, the normal recording mode,
Color signal to be output, depending on the
Is used to select the
From the rule circuit 80. In addition, color separation which separates a color original into three color signals
The process is executed for each rotation of the image forming body 201. Color separation described above (color separation from two colors to three color signals)
Is performed based on the following idea. Fig. 11 shows the spectral reflection characteristics of the color chart of the color components.
FIG. A is an achromatic spectral reflection.
FIG. B shows the blue spectral reflection characteristic, and FIG.
Indicates red spectral reflection characteristics. The horizontal axis is the wavelength (n
m) and the vertical axis indicates relative sensitivity (%). Now, let the level of the red signal R normalized by white be VR and shear.
When the level of the signal Cy is VC, these signals VR and VC are
By creating a coordinate system from
Color separation of red, blue and black based on
Wear. The following points need to be considered when determining coordinate axes
There is. I. In order to be able to express halftones,
Of the reflectance (reflection density) of the document 11 corresponding to the luminance signal of the
Incorporate concepts. II. Concept of color difference (including hue and saturation) such as red and cyan
Incorporate Therefore, luminance signal information (for example, a 5-bit digital
Signal) and color difference signal information (similarly, a 5-bit digital signal).
For example, the following may be used. Luminance signal information = VR + VC (1) where 0 ≦ VR ≦ 1.0 (2) 0 ≦ VC ≦ 1.0 (3) 0 ≦ VR + VC ≦ 2.0 (4) The sum of VR and VC (VR + VC) starts from the black level (= 0) White level
(= 2.0), all colors range from 0 to 2.0
Exists. Color difference signal information = VR / (VR + VC) or VC / (VR + VC) (5) In case of achromatic color, it is included in the whole level (VR + VC)
Red level VR and cyan level VC are constant. Obedience
VR / (VR + VC) = VC / (VR + VC) = 0.5 (6) On the other hand, in the case of a chromatic color, 0.5 <VR / (VR + VC) ≦ 1.0 for a red-based color (7) 0 ≦ VC / (VR + VC) <0.5 (8) For a cyan-based color, 0 ≦ VR / (VR + VC) ) <0.5 (9) 0.5 <VC / (VR + VC) ≦ 1.0 (10) Therefore, (VR + VC) and VR / (VR + VC) are also used as coordinate axes.
Or a coordinate system with (VR + VC) and VC / (VR + VC) as two axes
, The chromatic color (red
System and cyan system), and achromatic colors can be clearly separated.
You. FIG. 12 shows the luminance signal component (VR + VC) on the vertical axis,
When the color difference signal component VC / (VR + VC) is taken on the horizontal axis
Indicates a coordinate system. If VC / (VR + VC) is used as the color difference signal component, 0.5
Smaller areas are reddish R, areas larger than 0.5 are cyanous C
becomes y. Color difference signal information = around 0.5 and little luminance signal information
The achromatic color exists in each of the non-existent areas. FIG. 13 shows the color division according to such a color separation method.
A specific example of the color separation map is shown below. Color separation map is ROM
Tables are used and the example shown is divided into 32x32 blocks.
Here are some examples: Therefore, this ROM table
For the number of address bits, the row address is 5 bits
And column address are used in 5 bits. This ROM table
In the file, there is a quantized density obtained from the reflection density of the original.
The degree correspondence value is stored. FIG. 4 shows colors for realizing such color separation.
FIG. 3 is a system diagram illustrating an example of a separation circuit 150 and a color selection circuit 160.
You. Terminals 150a and 150b have a red signal R before color separation into three colors.
And the cyan signal Cy are supplied to the arithmetic processing circuit 151.
Thus, processes such as gradation conversion and gamma correction are performed. Arithmetic processing
The subsequent data is (VR + V) for obtaining the luminance signal data.
Address to the memory 152 where the calculation result of C) is stored
Color difference signal data VC / (VR
+ VC) to the memory 153 where the operation result is stored
It is used as a response signal. Outputs of these memories 152 and 153 are stored in memories 154 to 15 to be described later.
It is used as the address signal of 6. Memory 154-156
The data of the color separation map shown in Fig. 13 is stored for each color.
The data table used is used. Memory 154 is black signal B
The memory 155 is for K, and the memory 155 is for red signal R.
Is for the green signal B. As is clear from the color separation map shown in FIG.
By detecting the levels of the signal R and the cyan signal Cy,
From the color information signal of the color original
Three color signals R, B, and BK can be separated and output
You. Predetermined color signals read from respective memories 154 to 156
Are supplied to the color selection circuit 160. The color selection circuit 160 has buffer circuits 161 to 163, respectively.
Color signals obtained from each are supplied to AND gates 165-167
Then, only necessary color signals are selectively output. That out
Power is supplied to the image processing circuit 2 via the OR gate 168
You. These AND gates and OR gates 165 to 168 do not
In this case, 4-bit data is input. The AND gates 165 to 167 have the gate signals G1 to G3 described above.
Is supplied. Gate signals G1 to G3 are system control
From the control circuit 80 via the I / O port 170. The gate signals G1 to G3 correspond to the separated color signals, respectively.
Therefore, in the normal color recording mode, the rotation of the image forming body 201 is
The gate signals G1 to G3 of three phases synchronized with the inversion are formed.
5 Figures GI). At the same time, the developing devices 205 to 207 are also
To E are synchronized with the rotation of the image forming body 201.
Thus, it is supplied to each of the developing devices 205 to 207. As a result, exposure processes I to III for each color (FIG.
With F), the exposure and development processing steps are sequentially performed. On the other hand, in the color specification recording mode,
This is a single image forming process. Therefore, specify
The three selection signals G1 to G3 are in phase regardless of the
(FIGS. 6G-I). In the example shown in FIG.
It is a case where it is specified. Thereby, the image processing circuit 2
Are supplied in a state where all the color signals are synthesized. At the same time, only the development via 206 is
Is supplied (D in the same figure), and this is in the operating state. Obedience
Therefore, as a developing device, the current containing red toner (developer)
Since only the imager 206 is driven, the color original 5
Regardless of the color information in 2, the image is recorded in red.
It is. If you specify another color (black or blue), the image
Since the forming process is the same, detailed description thereof is omitted.
You. FIG. 7 is a block diagram showing an example of the image processing circuit 2.
You. In this example, 0.5% to 2.0 times 1.5% (1/64
Can be scaled in steps)
This is the case. Here, in principle, in the present invention, the enlargement processing is performed on the image data.
Data, and the reduction process compensates for thinning out image data.
This is an interim process. Then, enlargement in the main scanning direction shown in FIG.
・ Reduction is performed by electrical signal processing and enlargement in the sub-scanning direction
・ Reduction processing is a state where the exposure time of the photoelectric conversion element is fixed.
To change the moving speed of the photoelectric conversion element or image information.
I am trying to do it. If the moving speed in the sub-scanning direction is reduced, the original image will be enlarged.
Faster, it will shrink. In FIG. 7, a timing signal generating circuit 10
Signal for controlling the processing timing of the entire logic circuit 2
Issue, etc.
Similarly, the synchronous clock (CLK) and horizontal effective area signal
Signal (H-VALID), vertical effective area signal (V-VALID) and horizontal
A period signal (H-SYNC) is supplied. From the timing signal generation circuit 10,
In addition to the signal, process the magnification up to 2 times in real time
Clock with a frequency twice the frequency of the synchronous clock CLK.
Output, such as CKL2. Has 16 gradation levels sent from the color selection circuit 160
The image data is cascaded through the switching circuit 25.
Is supplied to the two latch circuits 11 and 12 and has a 4-bit configuration.
Image data D of two adjacent pixels in the image data of
1, D0 are latched at the timing of the synchronous clock. The switching circuit 25 should read as shown in FIG.
When setting an image area, image information outside the set area
Is used to truncate. for that reason,
"0" data outside the specified area (data when the image is white)
Switching circuit 25 is controlled so that
You. The control signal for the switching circuit 25 is
The timing signal is generated by the timing signal generation circuit 10.
The read signal supplied from the I / O port 26
Of course, it is controlled based on the
You. The image data D0 and D1 latched by the latch circuits 11 and 12 are
As address data for the memory 13 for interpolation data
used. The interpolation memory 13 is referenced from two adjacent image data.
New image data (hereinafter referred to as interpolation data)
Data table) is stored,
ROM etc. are used. The address data of the interpolation memory 13 is
The data selection signal SD is used in addition to the pair of latch data D0 and D1.
Used. The data selection signal SD is based on a pair of latch data D0 and D1.
Which data in the data table group selected by
Address to determine whether to use as interpolation data
Used as data. The data selection signal SD is enlarged or reduced as described later.
Is determined by the set magnification. FIG. 14 shows the relationship between the latch data D0 and D1 and the data selection signal SD.
This shows an example of the interpolation data S selected.
You. In the embodiment, the data obtained by linearly interpolating the data of D0 and D1 is
Interpolated data. In FIG. 14, S is output at 16 gradation levels.
Interpolation data (4 bits) used as latch data
Image data D0 and D1 have 16 gradation levels
Therefore, as interpolation data S, 16 × 16 = 256 kinds
Contains a data block. The figure shows each step when D0 = 0 and D1 = F.
Theoretical value (5 decimal places) by linear interpolation
The value of the interpolated interpolation data S is changed between the positive slope and the negative slope.
Each case will be described. Actually, the interpolation data S is written in a form as shown in FIG.
Remembered. However, this data is D0 = 4, D1 = 0 ~
This is an example in the case of F. In FIG. 15, ADRS is the base address.
Then, when D0 = 4, if D1 takes a level from 0 to F,
Data selection signal SD (from 0 to F arranged in the horizontal direction).
The relationship between the output data and the output interpolation data S
You. Address data ADRS and horizontal axis data select signal SD value
Is the actual address to the interpolation memory 13 and
Become. The interpolation data S output from the interpolation memory 13 is latched
Latched at road 14. On the other hand, 16 is the interpolation data in which the data selection signal SD is stored.
Selection memory. This also uses a data table,
Used as address to select interpolation data
Data (data selection signal SD) is stored. FIG. 16 shows the data selection signal SD used for image enlargement.
Show some. The example data is for a case where the enlargement ratio M is 124/64.
That is, the magnification can be set at an interval of 1/64.
In the figure, * indicates invalid data. In this way, the magnification can be set at 1/64 intervals.
Then, as shown in FIG. 16, the repetition cycle becomes 64.
You. If the enlargement ratio is 124/64, sample
Since the interval is 64/124 (= 0.51613), the repetition period
Sampling position (theoretical value) for
The relationship with the data selection signal SD to be
Be in charge. In the data selection signal SD at the repetition period “0”,
For the former data (0), the sampling position is (0.0000
0) is the data selection signal SD, the latter data
(8) is the data when the sampling position is (0.51613).
Data selection signal SD. These pairs of data select signals SD
It depends on the value of the repetition period. When the repetition period is 15, 32 and 48,
The value of the data selection signal SD of the user does not exist. This is the
The period indicates that only one piece of data exists.
You. These data are actually stored as shown in Fig. 17.
It is stored in the interpolation data selection memory 16. Fig. 17
The base address ADRS (vertical axis) and the number of steps (horizontal)
Axis) and the data selection signal SD referenced by
The data on the right side is the write clock
Troll data (processing timing signal TD)
Show. When the processing timing signal TD is “1”, it is in a writable state
(Write enable), and when "0", write prohibition
State. Therefore, data “00” in the figure is invalid data.
Data. Fig. 18 shows the interpolation data selection signal SD used for image reduction.
2 shows a part of the data table. Illustrative data is reduction rate
This is the case where M is set to 33/64. In the figure, * mark is thinning data
Data. This data selection signal is also in the state shown in FIG.
Stored in memory. Now, the upper 7 bits of the interpolation data selection memory 16 described above
As shown in FIG. 7, I / O
Magnification signal set on operation / display unit 75 via port 27
Are supplied as address data. The lower 7 bits
The output terminals of the counter circuit 15 are connected to the dress terminals A0 to A6.
Are supplied as address data. Because of that,
The synchronous circuit CLK2 is supplied to the data circuit 15. Interpolation data selection signal SD from interpolation data selection memory 16
In addition, a processing timing signal TD is output. The processing timing signal TD has the interpolation data as described above.
“1” when it exists, and when it does not exist and data
When subtracting, it is selected as "0". The data selection signal SD and the processing timing signal TD
Latched by the switch circuit 17. Latch timing is synchronous clock.
Clock CLK2. The processing timing signal TD is latched by the latch circuit 14.
For controlling the timing of the interpolation data S to be performed
Therefore, the processing timing signal TD is once latched.
Route 18 and is delayed by the access time of the interpolation memory 13.
Postponed. Delayed by a predetermined time (one cycle of synchronous clock CLK2)
The processing timing signal TD input to the gate circuit 19
Supplied as a signal. The gate circuit 19 has a synchronous clock.
Clock CLK2 is supplied and the processing timing signal TD is "1"
It is controlled to be open, closed when “0”, and closed when “1”.
Only when the clock is output. The write clock output from the gate circuit 19 is latched.
Used as a latch pulse for the circuit 14, the interpolation memory 13
Only valid data among interpolation data S output from
Latch. Write clock is output buffer circuit in the subsequent stage
Also used as 90 clock for writing. The main configuration of the image processing circuit 2 has been described above.
However, the output data obtained from the image processing circuit 2 is once binary.
After that, the output buffer circuit 90 (details will be described later)
Is supplied to the output device 65 via the. An example of a circuit configuration for the binarization processing is again referred to FIG.
It will be described in the light of the above. In the figure, a threshold table 69 stores a write clock.
Counts the main scanning counter 20 and the horizontal sync signal.
Sub-scanning counter 21 and the counters 20 and 21
Dither mat to output dither threshold based on count value
Rix 22. Then, in the binarization circuit 23, the output from the latch circuit 14 is output.
The input image data is output from the dither matrix 22.
The threshold value is compared with the threshold value and binarized for each pixel. Next, the image processing operation of the image processing circuit 2 described above will be described.
First, the enlargement processing operation will be described in detail with reference to FIG.
explain. For convenience of explanation, enlargement ratio M is 124/64 (= 1.94)
Figure 20 shows the relationship between the original data and the interpolated data
Is an analog illustration, where D is the original
S indicates the output data after interpolation. Relationship between image information level and interpolated data at this time
Is as shown in FIG. Also, at the time of interpolation at this time
Between the sampling pitch and the data selection signal SD
The person in charge is as shown in FIG. The timing chart of the signal in each part during this interpolation processing
The seat is as shown in FIG. Therefore, the original image output from the color selection circuit 160 is
Image data into D0 (0) D1 (F) D2 (F) D3
(0) D4 (0) (The figures in parentheses indicate the gradation level of each image data.
Is shown). Latch circuit in synchronization with synchronous clock
11 outputs D1 (F), and latch circuit 12 outputs D0 (0).
Is forced. On the other hand, the magnification signal set externally and the output of the counter circuit 15 are output.
With reference to the data table shown in FIG.
The data selection signals SD are 0,8: 0,8; 1,9; 1,9;
21E) is output, and as the processing timing signal TD,
1, 1, 1,... (F in the figure) are output. From the interpolation memory 13, image data D0 and D1 and data selection
The interpolation data table is referenced by the selection signal SD.
As a result, necessary interpolation data S (G in the figure) is output. That is, between image data D0 (0) and D1 (F),
Since the data selection signals SD are 0 and 8, interpolation data
0 and 8 are output as data S0 and S1. The data selection between image data D1 (F) and D2 (F)
Since the selection signals SD are 0 and 8, the interpolation data S2 and S3
Are output as F and F. With image data D2 (F)
Between D3 (0), the data selection signal SD is 1 and 9
Therefore, E and 7 are output as interpolation data S4 and S5.
Is done. Selection between image data D3 (0) and D4 (0)
Since the selection signals SD are 1 and 9, the interpolation data S6 and S7
Are output as 0 and 0. The following image data D5, D6, ...
The reading of the interpolation data S is performed in the same manner as described above. Therefore, if the interpolated data is represented by an x mark,
As shown in the figure, a predetermined
Image data with bells may be interpolated and output
I understand. In this way, the actual image data D0 to D4 are supplemented.
The interpolation data S0 to S7 are sequentially read out by the
The interpolation data S is sequentially transmitted to the latch circuit 14 (FIG.
I). On the other hand, the processing timing signal output from the latch circuit 17
The signal TD is delayed by the time t (see FIG. 21) by the latch circuit 18.
However, this delay time t is used for interpolation data as described above.
Is the time required to access data in memory 13
Time required to read out the interpolation data S by the switch circuit 14.
is there. The gate circuit 19 receives the processing timing signal from the latch circuit 18.
Signal TD controls its on / off,
Latch operation is performed by latch circuit 14 only when path 19 is on.
Otherwise, no latch operation is performed. Next, the reduction process will be described. Fig. 22 shows the image signal in the case of reduction processing in analog form.
The image data D0, D1, D2, D3,.
, The interpolation data S0, S1, ...
You. Figure 23 shows the timing chart of the signals at that time.
And the original image data D used at that time.
FIG. 16 shows the relationship between the data S and the data selection signal SD.
The person in charge is as shown in FIG. Note that the example
The reduction ratio M is 33/64 (= 0.52), and the floor of the image data
The key level is the same as in the above-described enlargement processing. Two adjacent image data from the latch circuits 11 and 12
(For example, image data D1 and D0) are complemented as address signals.
Is supplied to the memory 13 and is externally set for reduction.
(33/64) is supplied to the interpolation data selection memory 16, and
Further, the synchronous clock CLK2 is counted by the counter circuit 15.
This is the same as the case of the above-described enlargement processing. As is clear from FIGS. 18 and 19, the selection memory
From 16 the data selection signal SD is 0. *; F, *; *, *;
E, 0;…… is output as the processing timing signal TD
Are output as 1,0,1,0,0,0,1, ... However, * is nothing
0 data in the interpolation data selection memory 16
Data is stored. Therefore, the memory 13 for interpolation data
Such interpolation data S is read. That is, between image data D0 (0) and D1 (F),
Is the interpolation data because the data selection signal SD is 0 and *.
As the data S (= S0), only 0 is output. The data selection between image data D1 (F) and D2 (F)
Since the selection signals SD are F and *, as interpolation data S1
Outputs F. Between image data D2 (F) and D3 (0)
Between the data selection signals SD are both *,
No interpolation data S is output. Image data D3 (0)
And D4 (0), the selection data SD must be E and *.
Thus, only 0 is output as the interpolation data S2. The following image data D4, D5, ...
The reading of the interpolation data S is performed in the same manner as described above. In this way, the actual image data D0, D1,.
Data is obtained by the interpolation method.
The data S0, S1,... Are sequentially read out and the interpolation data is read out.
The data S is sequentially transferred to the latch circuit 14. On the other hand, the processing timing signal TD is 0,1,0,0,0,1,.
(F in the same figure), the write output from the gate circuit 19
The clock signal is as shown in FIG.
Data is thinned out and interpolation data S0., S1, ...
(Fig. I). As described above, when the image is reduced, the original image information
New image data between the original pixels of
And thin out some of the original pixel image data.
Or output the value as it is,
These output image data are generally referred to as interpolation data. In the above embodiment, changing the magnification for enlargement / reduction
For example, the data output from the selection memory 16 for interpolation data
The selection signal SD changes and the memory 13 for interpolation data responds to it.
And the corresponding interpolation data S is output.
It should be clear. Now, enlargement / reduction processing is performed and binarization processing is performed.
The supplied image data is supplied to the output buffer circuit 90.
In the output buffer circuit 90, the external
Provided in the output buffer circuit 90 based on the specified data
Writing or reading data to or from a line memory
The start address is controlled. Therefore, this output buffer circuit 90 is mainly
Is responsible for data processing in the main scanning direction shown in
Become. Now, first, write or read start address
Figures 24 and 25 show the reasons for controlling according to the specified magnification.
This will be described with reference to the drawings. For example, the maximum image reading size of CCD56,57 is B4 size.
If the resolution is 16 dots / mm, one line
The image data amount per minute is 4096 bits. Up to 2x magnification
Considering that, as a line memory for storing image data,
Line memo with 8192 bits capacity as shown in Fig. 24
Prepare a file. The recorded result is based on the center (2048th bit).
Image data is written or read so that
Or Therefore, when reducing the image, for example, when reducing the image
In this case, the write start address of the line memory is 4096
Address equal to 1/4 of the bit (address 1024)
Will be set to
Image data is written to the line memory as shown in Fig. 24A.
Will be. On the other hand, the read start address is 0 address.
Is set to Therefore, as shown in FIG.
An image is recorded. This means that from 0 address to 1023 address,
Since the data is “0”, it is regarded as white during that time and recorded.
Reduced image data recorded on paper, starting from 1024 addresses
This is because the recording based on. For example, when the reduction ratio is 32/64, the reduced image data is 1
Written from address 024. Similarly with a reduction ratio of 33/64
Is written from address 992 and the reduction ratio is 34/64
Will be written from the 960 address. In this way, the image data is written so that the result is in the center.
If the reading is based on the 0 address, the recording paper 53
An image is recorded based on the center line l. Therefore, the write start address at the time of reduction is
Is set as follows. Write start address = (4096-4096 x reduction ratio) / 2 When the image is enlarged, the image data increases, so
Conversely, the read start address is controlled. If the maximum magnification is twice, the image data at that time will be equal
The image data is twice as large as the image data at the time of double. In that case, the area of the recorded image is quadrupled,
For example, if you try to enlarge a B4 size document twice,
If the maximum size of the recording paper is up to B4 size, the enlarged image
Cannot be recorded on the recording paper. Considering this, the maximum size of the recording paper
The processing result of the central part of the document
If you set the limit, you can get a natural enlarged image
You. Therefore, when the image is enlarged, as shown in FIG.
1/2 data of the image data amount (the position of the center line l of the enlarged image)
2048 bits before and after 2096 bits in total)
Will be read out. Therefore, when the enlargement ratio is 128/64,
Data from the first data to the 2047th bit data
Is ignored and the 2048th bit data is transferred to the line memory.
Read starts, which results in a total of 4096 bit images.
The image data will be read. On the other hand, the write start address is
Is set. Similarly, when the magnification is 127/64,
Readout starts, and when the magnification is 124/64.
Starts reading from the 1984th bit.
A total of 4096 bits of image data will be read. If another magnification is set, the reading according to that magnification is
The image data from the start address is selected.
Needless to say. Therefore, the read start address at the time of enlargement
Is set as follows. Read start address = (4096 x magnification-4096) / 2
The start address is set as shown in FIG.
It is. Writing above when the image is processed based on the center
This is an example of setting a read or read start address. Then, read the image data only in the specified area, and
Record the enlarged / reduced image at the specified recording position
That is necessary for the so-called trimming process.
An example of controlling the read start address will be described below.
You. FIG. 27 is an explanatory diagram of recording position designation, and FIG.
FIG. 4 is an explanatory diagram when an image is enlarged for convenience,
Needless to say, it can be applied to small cases. First, the image area to be read is n1-n4,
The recorded image areas of the obtained results are denoted by N1 to N4, and the image areas n1 to n4
Coordinates located on the diagonal of are (x1, y1), (x2, y2)
And Similarly, the positions on the diagonal lines of the recording image areas N1 to N4
The minimum coordinate among the coordinates to be set is (x3, y3). Ma
Reference points in the read image area and the recording image area
(The end of manuscript 52, which means (x, y) = (0,0))
Main scanning direction (horizontal scanning direction) and sub-scanning direction (vertical
The number of data up to the coordinates described above in the direct scanning direction)
As shown in the figure, the numbers of lines are I0, I1, L0, and L1. If image areas n1 to n4 are specified, the input image
The image data is specified by the switch switching circuit 25 shown in FIG.
Timing so that the data outside the area becomes 0 (white information)
It is controlled by the generator 10. FIGS. 27A and C are examples of I1> I0, and FIGS.
This is an example where I1 <I0. The description starts from the case where I1> I0. When the recording density is 16 dots / mm as described above, I0,
I1 becomes I0 = 16 × 1 and I1 = 16 × 3. Here, if the designated magnification is m, the image of I0
The image data increases to m · I0. On the other hand, I1
Therefore, if these relationships are illustrated, as shown in FIG.
Swell. Also, when trying to record the image area n1, I0
The data is 0 data (white information) as described above. same
In this way, no data of I1 in the recording area N1 is recorded.
0 data. In the example shown in FIG. 28, since I1> m · I0,
Write the enlarged image data directly to the line memory,
When this is read, it reaches the horizontal recording start point x3.
Before reaching, the enlarged image data m in the original image area n1
・ (X2-x1) is recorded and the specified recording start point
It is recorded out of place. To avoid this, write the enlarged image data
It is necessary to control the starting point of writing to memory. sand
In other words, in such a case, as shown in FIG. 29, I1
The difference from m · I0 is the amount of deviation of the recording start point.
The enlarged image data from the position A0 where
Just write it. In this way, the address where the specified image data is written
The response A1 is as shown in FIG. Up to address A1
The number of data is equivalent to I1, which is stored in the recording coordinate system without
This corresponds to the horizontal coordinate x3 in FIG. Therefore, when I1> I0 and I1> m · I0
Is to write the enlarged image data from the address A0 = I1-m.I0 and read it.
The reading is from the 0 address. Also, as described later
During the period when no enlargement / reduction processing is performed,
The line memory is cleared by 0 data (white information)
Therefore, from address 0 to address A0,
This means that "0" data has been written. When I1 <I0 and m · I0> I1, FIGS. 30 and 31
As can be seen from FIG.
Read address,
Reads image data from the address corresponding to A0 = m.I0-I1. In this way, even if m · I0> I1,
That the image is correctly recorded from the specified horizontal coordinate point x3
Become. Thus, writing or reading to or from line memory
Image recording by setting the start address
The position can be moved horizontally. Now, a predetermined image area in the document is selectively recorded.
Specify in real time in so-called trimming recording
When trying to achieve image processing that can record an area
Movement of the image recording position in the sub-scanning direction
Start reading or output device of image reading device 50
65 operation start time, etc.
It needs to be realized by controlling the timing. That is, as shown in FIGS. 27A and 27B, in the sub-scanning direction.
The coordinates (Y coordinates) of the image areas N1 and N2 in the original image
When the area is larger than the Y coordinate position of the area n1, n2, the image is read.
The recording timing and the recording timing
In spite of all image data being read,
At that time, the beam of the output device 65 is still at the recording position (y
3) has not reached. Therefore, the image reading timing and the recording timing
If you select
You will not be able to record. In the case of FIGS. 27C and D, the data of the original image areas n1 and n2 are
The inconvenience of reaching the image recording position before scanning
is there. Therefore, when there is a positional relationship as shown in FIGS. 27A and B,
The recording start timing of the output device 65 at a predetermined time.
You only have to be quick for a while. That is, as shown in FIG. ₁ If the recording start timing is advanced by -mL0 = T0,
At the time when picking is started (reference point p), the output device 65
The recording beam is L ₁ -Scanning at time point r of -mL0 = T0
And Therefore, reading of the image is started from this time r.
If so, the point in time q at which the original image area n1 is read
And the image recording start time (y3) completely match. In other words, in the case of normal image recording, the
Image reading timing and image recording timing
Should be selected. However, in the case of trimming recording
In the relationship shown in Fig. 35,
And the image recording timing,
For the first time, real-time recording is possible. T indicates the maximum image reading width (sub-scanning direction).
Specifically, the recording density is set to 16dos per line.
When ts / mm, T = maximum reading width × 16 × 1 line scanning time
You. At T0, turn on the lamp for document irradiation, and then
Includes the time T1 required to correct the arding
I have. In the case of FIGS. 27C and D, as shown in FIGS. 33 and 36.
In addition, by increasing the image reading timing by T0
Enables real-time trimming recording
That is easy to understand. In addition to selecting the operation timing as described above,
By selecting the write and read addresses,
Enlargement / reduction processing at a preset recording position (x3, y3)
That recorded images N1 to N4 can be recorded correctly
Become. Such determination of the timing is left to the arithmetic processing in the CPU.
I can do it. When the image reading device 50 finishes reading,
From the time to return to the original position, that is, the return time,
In the case of FIGS. 27A and B, return time = T−T ₀ = T- (L ₁ −mL ₀ ) × 16 × 1 line scanning time. On the other hand, in the case of FIGS. 27C and D, the return time = T is selected. FIG. 27 shows an example in which the image is enlarged.
The above operation moves only the recording position by the same magnification processing (m = 1.0)
Recorded or reduced (m <1.0)
Needless to say, it can also be applied when recording images on
No. By the way, FIG. 37 et seq.
Realizes image recording operation by specifying recording or recording position
FIG. 2 is a circuit diagram showing an example for the above. FIG. 37 shows an example of the output buffer circuit 90. The output buffer circuit 90 has a pair of line memories 100 and 101.
Are provided, each of which is supplied with one line of image data.
It is. One line memory 100, 101 is provided for one line.
Image data by alternately supplying image data for
Read and read processing in real time
That's why. Line memories 100 and 101 are 819 as described above.
One with a capacity of 2 bits is used. Line when recording an image based on the center
Writing and reading to and from the memories 100 and 101 are as follows.
Is controlled. First, when writing data to the line memory, the image processing
The write clock generated in the logic circuit 2 is used.
At the time of reading, the read clock for the output device 65 is
These clocks are used for clock selection
The respective address via the first and second switches 102 and 103
It is supplied to counters 104 and 105. The first and second switches 102 and 103 are connected to one line memo.
When the memory is in write mode, the other line memory
Complementary control is performed so as to be in the overflow mode. That
Switch control from control circuit 107
The output horizontal period control signal (Fig. 38C)
Used. Each address counter 104, 105 has a line
Write start address and read for memory 100, 101
Each address data for determining the address is the third and
The power is supplied via the fourth switches 108 and 109. The third and fourth switches 108 and 109 are also connected to one address.
When the address counter is in the write mode, the other address
Complementary so that the dress counter is in read mode
Controlled by these switches 108 and 109
The control signal with the horizontal period as shown in Fig. 38C
No. is supplied. The write start address or read start address is
Address counter in synchronization with the horizontal synchronization signal (Fig. 38A)
Preset to 104 or 105. Generated by CPU80
The above write or read address is the I / O port
Are supplied to switches 108 and 109 via ports 130 and 131. The output from the line memories 100 and 101 is supplied to the fifth switch 110.
After selecting one of them, the output device 65 described above is used.
And an image memory (not shown). Fifth sui
Switch 110 is used to select image data in the readout mode.
Control signal shown in FIG. 38C.
Are used in reverse phase. Now, the data supply lines of the pair of line memories 100 and 101
A sixth switch 140 is provided on the
Data and 0 data (corresponding to white information) are selected. this
Is the data to clear the line memories 100 and 101
Is selected when the original is not being scanned
You. In the recording position specification mode, the read image area is
The coordinates (x1, y1) and (x2, y2) of the input coordinate data
In addition, the coordinates (x3, y3) that specify the recording position and the specified magnification
m is input from the operation / display unit 75. Input of these data is performed by the operator as described above.
If you can enter the key directly,
Place the original 52 on the inting device and point directly at the position.
And the CPU 80 reads the coordinates.
Good. Even with key input, with a predetermined pitch
Insert the original 52 into the transparent holder with vertical and horizontal ruled lines
May be used to specify each coordinate. Such a transparent holder
Allows you to quickly read the coordinates
Can be. An address is calculated from each of the input data described above (address
ROM table in which the address is stored may be used),
Write and read addresses to in-memory 100, 101
Selected as predetermined. At the same time, the speed control data
Is calculated and attached to the image reading device 50.
Supply to the drive motor
Scanning speed and image reading
A rate signal is provided. The output device 65 also has recording corresponding to the specified magnification and recording position.
A start signal will be supplied. By the way, in the above, the image is read with reference to the center of the original.
The image is recorded based on the center of the recording paper.
However, the present invention is applied to other image processing apparatuses.
The present invention can also be applied to an image processing device. First, both image reading and image recording are performed on originals (records).
Is processed based on one side of the recording paper)
Indicates the image reading start position of the CCD56,57 and the recording start position
(In the case of laser printer, start recording beam of laser beam
Position) is the same, so that the present invention can be applied without any problem.
Wear. Second, image reading is performed based on the center line of the original.
In other words, image recording is processed based on one side of the recording paper.
In other types of image processing devices, the output buffer circuit 90
The write and start addresses are as follows: In this case, the write start address for line memories 100 and 101 is
Address is always 0 address. In response to this,
The start address cannot be determined only by the magnification signal.
No. It depends on the size of the document. Therefore, in this type of image processing apparatus, the document
The read start address is determined from the signal indicating the noise and the magnification.
Is determined. As shown in FIG. 39, the size of the original 52 to be read is
A4 size is shown below. As mentioned above, when 16 dots / mm,
The number of bits of the axis is 210mm x 16dots / mm = 3360 bits, so the maximum read document size is B4
And the value obtained by multiplying the width Y in FIG.
This is the read start address for the memory. Therefore, the read start address at the time of equal magnification is (4096−3360) / 2 = 368 bits. Write and start address values at any magnification
See Figure 40. However, the document size is for A4 size. Third, as shown in FIG. 41, image reading is performed on one side.
The image is recorded based on the center line l of the recording paper.
In an image processing device of the type that is processed in
The write and start addresses for the buffer circuit 90 are as follows:
Is determined. In this case, the maximum number of bits for A4 format (3360 bits)
Write start address from the maximum number of bits of B4 size (4096 bits)
Les is determined. That is, write start address = (4096−3360 × magnification) / 2. At this time, the read start address is 0 address.
It is. When the write start address becomes negative (at enlargement),
That value becomes the value of the read start address. Therefore,
In this case, the write start address is the 0 address. Write and read start address at any magnification
Are shown in FIG. Thus, the write or read start address is
Change according to the reading or writing reference position of the manuscript
You can also. Writing to line memories 100 and 101
Start address should be changed according to paper size
It may be. In the embodiment described above, the present invention is applied to a simple color
ー Applied to copiers, but can record color images in many colors
Can be specified when applying to color copiers
Needless to say, the number of colors increases. Also, in the above description, the enlargement / reduction ratio is from 128/64 to 33/64.
Under conditions that can be selected in 1/64 increments
Now, the synchronous clock obtained by the timing generator 10 is
Clock CLK2 is twice the frequency of the reference synchronization clock.
Are determined by the maximum magnification. For example, if the maximum magnification is set to 3 times,
The frequency of the synchronous clock CLK2 is three times the reference synchronous clock.
It is set to the frequency. Therefore, the synchronous clock
CLK2 frequency is changed according to the maximum magnification used.
You. The memories 13 and 16 may use RAM instead of ROM.
The memory 13 may use an arithmetic circuit instead. [Effects of the Invention] As described above, in the present invention, a predetermined image area
Only when moving only to the specified position
Recording start timing and output device
Select the recording start timing of the
And can realize real-time processing.
You. Therefore, according to the present invention, a large-scale memory device can be used.
Trimming process can be easily performed without the need.
Becomes Further, according to the present invention, the address system of the line memory is used.
Control is either write or read.
The circuit configuration and control for specifying the recording position are simpler.
Has the effect of becoming Further, according to the present invention, in the sub-scanning direction of the image reading means.
The position of the specified area coordinates in is the position of the coordinates of the original image
When the image reading timing is larger than
It is faster than the output timing by a predetermined time, and
Returning the image reading means based on the image reading timing
Signal in the sub-scanning direction of the image reading means.
The position of the specified area coordinates in the
Output timing is smaller than
Output time is faster than the
The return signal of the image reading means based on the
It is characterized by being always fast
Return signal of the image reading device
The scanning time increases due to the trimming process.
Processing time can be reduced.
You.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a system diagram showing an outline of an image processing apparatus which can be enlarged and reduced according to the present invention, FIG. 2 is a system diagram showing an example of an image reading device, and FIG. Waveform diagram for
4 is a system diagram showing an example of a color separation circuit and a color selection circuit, FIGS. 5 and 6 are explanatory diagrams showing an example of an image forming process, and FIG. 7 is a system diagram showing an example of an image processing circuit. , FIG. 8 is a block diagram showing an example of a simplified electrophotographic color copier, FIG. 9 is a block diagram showing an example of a beam scanner, FIG. 10 is a block diagram showing an example of a developing device, FIG. And the first
FIG. 12 is a diagram for explaining color separation, FIG. 13 is a diagram showing an example of a color separation map, FIG. 14 is a diagram showing an example of interpolation data used at the time of image enlargement, and FIG. 15 is used at that time FIG. 16 is a diagram showing an example of interpolation data, FIG. 16 is a diagram showing an example of selection data used at the time of image enlargement, FIG. 17 is a diagram showing the contents of a data table of a data selection signal and a processing timing signal at that time, and FIG. FIG. 19 is a diagram showing an example of a data selection signal used at the time of image reduction, FIG. 19 is a diagram showing the contents of a data table of the data selection signal and the processing timing signal at that time, and FIG. FIG. 21 is a timing chart at that time, FIG. 22 is a signal waveform chart for explaining the image reduction processing operation, FIG. 23 is a timing chart at that time, and FIG. 24 is a description of the line memory. Fig. 25 Illustration of recorded image, No. 26
FIGS. 40 and 42 are diagrams each showing an example of a write start address and the like, FIG. 27 is an explanatory diagram of recording position designation,
FIG. 31 is a diagram for explaining the operation thereof, FIGS. 32 to 36 are explanatory diagrams of a trimming process which is common to the description of the present invention, FIG. 37 is a system diagram showing an example of an output buffer circuit, and FIG. FIG. 39 and FIG. 41 are diagrams showing other examples of image reading and image recording, and FIG. 43 shows an example of a main part of a conventional scalable image processing apparatus. System diagram, FIG. 44 is a waveform diagram for explaining the operation, FIG. 45 is an explanatory diagram of an image reading system, FIG. 46 is a diagram showing an example of image recording, FIG. 47 is an image recording by designating a recording position FIG. 2 ... Image processing circuit 10 ... Timing signal generation circuit 13 ... Interpolation data memory 16 ... Interpolation data selection memory 23 ... Binarization circuit 50 ... Image reading devices 56 and 57 ... Image reading means (CCD) 65 Output device 70 Sequence control circuit 75 Operation / display unit 90 Output buffer circuit D Image data S Interpolation data SD Data selection signal CLK2 Synchronous clock TD Processing timing Signal PE: Control signal

Claims (1)

(57) [Claims] Reading means for reading the original image, based on the original image read by the reading means,
Output means for outputting image data, forming an electrostatic image corresponding to the image data on an image forming body having a photoconductive photosensitive layer on the image data output by the output means, and developing the electrostatic image. An image processing apparatus configured to record an image on a recording sheet, comprising: a processing area specifying unit; and an output unit configured to output, when a position of the specified area coordinate in the sub-scanning direction of the output unit is larger than a coordinate position of the original image. When the timing is advanced by a predetermined time from the reading timing, and the position of the designated area coordinates in the sub-scanning direction of the output unit is smaller than the position of the coordinates of the original image, the reading timing is set to a predetermined time relative to the output timing. Timing control means for performing control so as to be accelerated by time, and the position of the designated area coordinate in the sub-scanning direction of the output means being the position of the original image. When the position is larger than the position of the mark, the return time of the reading unit is selected from the relationship between the output timing and the reading timing, and the position of the designated area coordinate in the sub-scanning direction of the output unit is smaller than the position of the coordinate of the original image. And a return time selecting means for selecting a predetermined time as the return time regardless of the output timing.