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JP2720853B2 - Manufacturing method of printed wiring board - Google Patents

Manufacturing method of printed wiring board

Info

Publication number
JP2720853B2
JP2720853B2 JP7286741A JP28674195A JP2720853B2 JP 2720853 B2 JP2720853 B2 JP 2720853B2 JP 7286741 A JP7286741 A JP 7286741A JP 28674195 A JP28674195 A JP 28674195A JP 2720853 B2 JP2720853 B2 JP 2720853B2
Authority
JP
Japan
Prior art keywords
conductive paste
copper
printed wiring
wiring board
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP7286741A
Other languages
Japanese (ja)
Other versions
JPH09102675A (en
Inventor
広徳 大田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP7286741A priority Critical patent/JP2720853B2/en
Publication of JPH09102675A publication Critical patent/JPH09102675A/en
Application granted granted Critical
Publication of JP2720853B2 publication Critical patent/JP2720853B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は印刷配線板の製造方
法に関し、特にスルーホールを有する印刷配線板の製造
方法に関する。
The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board having through holes.

【0002】[0002]

【従来の技術】電子機器の小型軽量化、高性能化、高速
化、及び低価格化に伴い、印刷配線板も配線の高密度化
かつ低コスト化が要求されている。
2. Description of the Related Art As electronic devices have become smaller, lighter, have higher performance, have higher speed, and have lower prices, printed wiring boards have also been required to have higher density wiring and lower cost.

【0003】これらの要求を満足させるための従来の印
刷配線板の製造方法の一つとして、スルーホール穴埋め
基板がある。これは、銅張積層板に穴あけをした後、穴
の中に導電性ペーストを埋め込む方法であり、ランドレ
ス形成(ランドがない)が可能であるという利点があ
る。
One of the conventional methods for manufacturing a printed wiring board for satisfying these requirements is a through-hole-filled substrate. This is a method in which a conductive paste is buried in a hole after drilling a hole in a copper-clad laminate, and has an advantage that landless formation (no land) is possible.

【0004】しかしながら、上記従来の方法では接続信
頼性が充分でないという問題点がある。
However, there is a problem that the connection reliability is not sufficient in the above conventional method.

【0005】そこで、この問題点を解消するために、例
えば特開昭62−193197号公報には、表裏両面に
導体パターンが形成されかつ両面接続用のスルーホール
と搭載部品挿入用スルーホールをともに有するプリント
配線板を製造するにあたり、まず銅張積層板の所定の位
置に両面接続用の孔を穿設してこの両面接続用孔に導電
性ペーストを充填し、次いで搭載部品挿入用の孔を設け
た後に全体に銅めっきを施し、しかる後にエッチングに
より不要部分を除去して導体パターンを形成するスルー
ホールプリント配線板の製造方法が提案されている。
To solve this problem, for example, Japanese Unexamined Patent Publication (Kokai) No. 62-193197 discloses that a conductor pattern is formed on both front and back surfaces, and a through hole for connecting both surfaces and a through hole for mounting components are both provided. In manufacturing a printed wiring board having, first, a hole for double-sided connection is drilled at a predetermined position of the copper-clad laminate, and the double-sided connection hole is filled with a conductive paste. There has been proposed a method of manufacturing a through-hole printed wiring board in which copper plating is applied to the entirety after being provided, and then unnecessary portions are removed by etching to form a conductor pattern.

【0006】上記特開昭62−193197号公報に記
載の印刷配線板の製造方法について、図面を参照して以
下に詳細に説明する。図3(a)から図3(e)は、上
記特開昭62−193197号公報に記載の印刷配線板
の製造方法を工程順に示す断面図である。
A method for manufacturing a printed wiring board described in the above-mentioned Japanese Patent Application Laid-Open No. 62-193197 will be described below in detail with reference to the drawings. 3 (a) to 3 (e) are cross-sectional views showing a method of manufacturing a printed wiring board described in Japanese Patent Application Laid-Open No. 62-193197 in the order of steps.

【0007】上記特開昭62−193197号公報に記
載の方法によれば、表裏両面に導体パターンが形成され
かつ両面接続用スルーホールと搭載部品挿入用スルーホ
ールをともに有するプリント配線板を製造するにあた
り、まず絶縁基板1−2の両面を銅箔1−1で覆われて
なる銅張積層板1を用意し(図3(a)参照)、銅張積
層板1の所定の位置に両面接続用の穴を開け(図3
(b)参照)、この両面接続用の穴の中に導電性ペース
ト2を充填し(図3(c)参照)、次いで搭載部品挿入
用の穴を設けた後に全体に銅めっき3を施し(図3
(d)参照)、その後エッチングにより不要部分を溶解
除去して導体パターンを形成する(図3(e)参照)。
According to the method described in JP-A-62-193197, a printed wiring board having conductor patterns formed on both front and back surfaces and having both through-holes for connecting both sides and through-holes for inserting mounting components is manufactured. First, a copper-clad laminate 1 in which both surfaces of an insulating substrate 1-2 are covered with a copper foil 1-1 is prepared (see FIG. 3A), and both sides are connected to a predetermined position of the copper-clad laminate 1. Holes (Fig. 3
(B)), the conductive paste 2 is filled into the holes for both-side connection (see FIG. 3 (c)), and after the holes for inserting the mounted components are provided, the whole is plated with copper (3). FIG.
Then, unnecessary portions are dissolved and removed by etching to form a conductor pattern (see FIG. 3E).

【0008】[0008]

【発明が解決しようとする課題】しかしながら、上記特
開昭62−193197号公報に記載の印刷配線板の製
造方法においては、導電性ペーストと外層の導体パター
ンとの接続を完全なものとするために、銅めっきが必要
であり、そのため外層銅体厚が厚くなり、ファインパタ
ーン(微細パターン)の形成に限界がある。
However, in the method of manufacturing a printed wiring board described in Japanese Patent Application Laid-Open No. 62-193197, the connection between the conductive paste and the outer conductor pattern is completed. In addition, copper plating is required, which results in an increase in the thickness of the outer copper body, which limits the formation of a fine pattern (fine pattern).

【0009】例えば、35μm銅箔に20μmのめっき
(銅めっき)を施すと、全体の銅体厚が55μmとな
り、回路幅/回路間隙(即ち導体パターン幅/導体間
隙)で50μm/50μmの歩留まりは約20〜30%
以下となる。
For example, when a 20 μm plating (copper plating) is applied to a 35 μm copper foil, the overall copper thickness becomes 55 μm, and the yield of 50 μm / 50 μm in circuit width / circuit gap (ie, conductor pattern width / conductor gap) is as follows. About 20-30%
It is as follows.

【0010】さらに、上記特開昭62−193197号
公報に記載の印刷配線板の製造方法においては、銅めっ
きが必要とされ、そのための設備及び工数が必要とな
る。
Further, in the method of manufacturing a printed wiring board described in Japanese Patent Application Laid-Open No. Sho 62-193197, copper plating is required, and equipment and man-hours for the plating are required.

【0011】従って、本発明の目的は、上記従来技術の
問題点を解消し、接続信頼性を向上し、安価で高密度配
線が可能な印刷配線板の製造方法を提供することにあ
る。
Accordingly, it is an object of the present invention to provide a method of manufacturing a printed wiring board which solves the above-mentioned problems of the prior art, improves connection reliability, and enables inexpensive and high-density wiring.

【0012】[0012]

【課題を解決するための手段】前記目的を達成するた
め、本発明は、銅張積層板を用意し、この所望の箇所に
穴を穿設する工程と、この銅張積層板の穿設された穴の
箇所に導電性ペーストを埋め込む工程と、次いでエッチ
ングにより不要部分を溶解除去して導体パターンを形成
する工程と、その後導体パターンの導電性ペーストを埋
め込んだ穴表面に選択的に置換型無電解めっきではんだ
層を形成する工程と、このはんだ層をヒュージングする
工程と、を備えたことを特徴とする。
According to the present invention, there is provided a copper-clad laminate, comprising the steps of: preparing a copper-clad laminate; drilling a hole at a desired position; burying a conductive paste at a location of the holes were then forming a conductive pattern by dissolving and removing unnecessary portions by etching, Mu then selectively substituted in the embedded hole surface with a conductive paste of the conductor pattern The method includes a step of forming a solder layer by electrolytic plating and a step of fusing the solder layer.

【0013】[0013]

【作用】本発明においては、外層に銅めっきを行わない
ために、銅体厚が薄く、ファインパターンの形成が可能
であり、導電性ペーストを穴に充填してスルーホールを
形成した後、その上に選択的にはんだ層を形成し、ヒュ
ージングすることにより導体パターンとの接続を得てい
るため両面の接続信頼性が確保される。
In the present invention, since the outer layer is not plated with copper, the thickness of the copper body is thin and a fine pattern can be formed. A connection with the conductor pattern is obtained by selectively forming a solder layer thereon and fusing, so that the connection reliability of both surfaces is ensured.

【0014】本発明において、導電性ペーストとして
は、好ましくは銅や銀等のペーストが用いられる。
In the present invention, a paste such as copper or silver is preferably used as the conductive paste.

【0015】また、はんだ層を形成する方法としては、
好ましくは置換型の無電解はんだめっきを用いる。置換
型の無電解はんだめっきを用いることで、穴ランドの銅
表面と穴表面の導電性ペーストがはんだ層で置換され、
ヒュージングで穴ランドと穴表面のはんだ層が一体化
し、接続信頼性が向上する。
As a method of forming a solder layer,
Preferably, substitution type electroless solder plating is used. By using the substitution type electroless solder plating, the conductive paste on the copper surface of the hole land and the hole surface is replaced with a solder layer,
By fusing, the hole land and the solder layer on the hole surface are integrated, and connection reliability is improved.

【0016】[0016]

【発明の実施の形態】本発明の実施の形態を図面を参照
して以下に説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0017】図1(a)から図1(f)は本発明の第1
の実施の形態に係る印刷配線板の製造方法を工程順に示
す断面図である。
FIGS. 1A to 1F show a first embodiment of the present invention.
FIG. 7 is a cross-sectional view illustrating a method of manufacturing a printed wiring board according to the embodiment in the order of steps.

【0018】まず、銅箔厚9〜35μm、板厚0.1〜
1.6mmの銅張積層板1を用意し(図1(a)参
照)、所望の箇所に所定のN/C穴あけ機によりキリ径
0.1〜1.0mmの穴を穿設し(図1(b)参照)、
所望の箇所に銅又は銀等の導電性ペースト2を塗り込め
るマスクを予め作成し、これを用いてスクリーン印刷機
により穿設された穴の部分へ導電性ペースト2を埋め込
み、100〜200℃の温度で乾燥させた後、ベルトサ
ンダー又はバフ研磨機等で表面を研磨し平滑にする(図
1(c)参照)。
First, a copper foil thickness of 9 to 35 μm and a plate thickness of 0.1 to
A 1.6 mm copper-clad laminate 1 is prepared (see FIG. 1 (a)), and a hole having a drill diameter of 0.1 to 1.0 mm is formed in a desired location by a predetermined N / C drilling machine (see FIG. 1). 1 (b)),
A mask that can be coated with a conductive paste 2 such as copper or silver at a desired position is prepared in advance, and the conductive paste 2 is buried in a hole portion formed by a screen printing machine using the mask. After drying at a temperature, the surface is polished and smoothed with a belt sander or a buffing machine (see FIG. 1 (c)).

【0019】穴への導電性のペーストの埋め込み法は、
スクリーン印刷の他のロールコーター等の方法を用いて
もよい。
The method of embedding the conductive paste in the holes is as follows.
A method such as a roll coater other than screen printing may be used.

【0020】次に、写真法またはスクリーン印刷法でエ
ッチングレジストを塗布した後、図1(d)に示すよう
に、エッチングにより銅箔の不要部分を溶解除去し、導
体パターン6を形成した後に、エッチングレジストを剥
離する。
Next, after an etching resist is applied by a photographic method or a screen printing method, as shown in FIG. 1D, an unnecessary portion of the copper foil is dissolved and removed by etching to form a conductor pattern 6. The etching resist is stripped.

【0021】エッチング方法としては、コンベア装置を
用い、塩化銅溶液または塩化鉄溶液を使用し、約40〜
60℃の温度で1〜3分程度で処理する。
As the etching method, a conveyor device is used, and a copper chloride solution or an iron chloride solution is used.
The treatment is performed at a temperature of 60 ° C. for about 1 to 3 minutes.

【0022】次に、脱脂、ソフトエッチングの前処理を
施してから、無電解はんだめっき処理を行い、導体パタ
ーン6の表面及び導電性ペースト2とランド上に3〜2
0μm厚のはんだめっきを析出させ、はんだ層4を形成
する(図1(e)参照)。
Next, after performing a pretreatment of degreasing and soft etching, an electroless solder plating process is performed, and 3 to 2 are applied to the surface of the conductive pattern 6 and the conductive paste 2 and the land.
A solder plating having a thickness of 0 μm is deposited to form a solder layer 4 (see FIG. 1E).

【0023】次に、ヒュージング(融解)を行うことに
より、導電性ペースト2とランドの接続を確保すること
により印刷配線板が得られる(図1(f)参照)。
Next, the printed wiring board is obtained by fusing (fusing) to secure the connection between the conductive paste 2 and the land (see FIG. 1 (f)).

【0024】本実施形態においては、銅体厚が銅箔分し
かないため、回路幅/間隙幅で50/50μmが容易に
形成可能となる。
In this embodiment, since the thickness of the copper body is only the thickness of the copper foil, a circuit width / gap width of 50/50 μm can be easily formed.

【0025】なお、本実施形態においては、上記ヒュー
ジング工程の後、所望の部位を不図示のソルダーレジス
トで被覆して印刷配線板を作製してもよいことは勿論で
ある。
In the present embodiment, after the fusing step, a desired portion may be covered with a solder resist (not shown) to form a printed wiring board.

【0026】図2(a)から図2(g)は、本発明の第
2の実施の形態に係る印刷配線板の製造方法を工程順に
示す断面図である。
FIGS. 2A to 2G are sectional views showing a method of manufacturing a printed wiring board according to a second embodiment of the present invention in the order of steps.

【0027】本実施形態において、使用材料、共通の工
程は前記第1の実施形態と同様に行う。まず、銅張積層
板1を用意し(図2(a)参照)、所望の箇所にN/C
穴あけ機により、穴を穿設し(図2(b)参照)、所望
の箇所に導電性ペースト2を塗り込めるマスクを予め作
成し、これを用いてスクリーン印刷機により穿設された
穴の部分へ導電性ペースト2を埋め込み、表面を研磨し
平滑にする(図2(c)参照)。
In this embodiment, the materials used and common steps are performed in the same manner as in the first embodiment. First, a copper-clad laminate 1 is prepared (see FIG. 2A), and N / C
Holes are drilled by a drilling machine (see FIG. 2 (b)), a mask is formed in advance to allow the conductive paste 2 to be applied to a desired location, and using this, a portion of the hole drilled by a screen printing machine is used. Then, the conductive paste 2 is embedded in the substrate, and the surface is polished and smoothed (see FIG. 2C).

【0028】次に、写真法またはスクリーン印刷法でエ
ッチングレジストを塗布した後、図2(d)に示すよう
に、エッチングにより銅箔の不要部分を溶解除去し、導
体パターンを形成した後エッチングレジストを剥離す
る。
Next, after an etching resist is applied by a photographic method or a screen printing method, an unnecessary portion of the copper foil is dissolved and removed by etching as shown in FIG. Is peeled off.

【0029】次に、搭載部品を実装するパッド部(不図
示)及び導電性ペースト2を充填した穴とそのランド部
を窓状に抜いたソルダーレジスト5を形成し(図2
(e)参照)、次いで無電解はんだめっきの前処理、及
び無電解はんだめっき処理を行い、パッド部及び導電性
ペースト2とランド上にはんだめっきを析出させ、はん
だ層4を形成する(図2(f)参照)。
Next, a pad portion (not shown) for mounting the mounted component, a hole filled with the conductive paste 2 and a solder resist 5 having its land portion removed like a window are formed (FIG. 2).
(See (e)), and then a pretreatment of electroless solder plating and an electroless solder plating process are performed to deposit solder plating on the pad portion, the conductive paste 2 and the land, thereby forming a solder layer 4 (FIG. 2). (F)).

【0030】次に、ヒュージングを行うことにより、導
電性ペースト2とランドの接続を確保し(図2
(g))、これにより印刷配線板が作製される。上記の
ように本実施形態においては、はんだが必要な部分、す
なわち導電性ペースト2を埋め込んだ部分とパッド部分
等に対してのみ無電解めっきにより選択的にはんだを供
給して印刷配線板を作製している。
Next, the connection between the conductive paste 2 and the land is secured by fusing (FIG. 2).
(G)), thereby producing a printed wiring board. As described above, in this embodiment, the printed wiring board is manufactured by selectively supplying the solder by electroless plating only to the portion requiring solder, that is, the portion in which the conductive paste 2 is embedded and the pad portion. doing.

【0031】ファインパターン形成について、前記従来
技術では例えば35μm銅箔に20μmのめっきを施す
と全体銅体厚が55μmとなり、回路幅/回路間隙で5
0μm/50μmの歩留まりが例えば約20〜30%以
下になるのに対して、本実施形態では、銅箔厚は35μ
mしかなく、その結果、同じ回路幅/回路間隙(50μ
m/50μm)で約70〜80%の歩留まりが得られ
た。
With respect to the formation of a fine pattern, in the prior art, for example, when a 20 μm plating is applied to a 35 μm copper foil, the entire copper body thickness becomes 55 μm, and the circuit width / circuit gap is 5 μm.
While the yield of 0 μm / 50 μm is, for example, about 20 to 30% or less, in the present embodiment, the copper foil thickness is 35 μm.
m, resulting in the same circuit width / circuit gap (50 μm).
m / 50 μm), a yield of about 70-80% was obtained.

【0032】[0032]

【発明の効果】以上説明したように、導体パターンと穴
埋めされた導電性ペーストの接続信頼性を得るために、
従来技術では銅めっきを行っているのに対し、本発明に
係る印刷配線板の製造方法においては、無電解はんだめ
っきによりはんだ層を形成して、ヒュージングすること
により接続信頼性を確保しているため、表層導体厚が薄
くでき、ファインパターンの形成が可能であり、さらに
触媒処理及び銅めっき処理の設備及び工数が不要とな
り、高密度配線が可能で安価な印刷配線板が得られる効
果がある。
As described above, in order to obtain the connection reliability between the conductive pattern and the filled conductive paste,
Whereas in the prior art, copper plating is performed, whereas in the method for manufacturing a printed wiring board according to the present invention, a solder layer is formed by electroless solder plating, and connection reliability is secured by fusing. Therefore, the thickness of the surface conductor can be reduced, a fine pattern can be formed, and equipment and man-hours for catalyst treatment and copper plating treatment are not required, and an effect of obtaining a high-density wiring and an inexpensive printed wiring board can be obtained. is there.

【0033】ファインパターン形成性について、前記従
来技術では例えば35μm銅箔に20μmのめっきを施
すと全体銅体厚が55μmとなり、回路幅/回路間隙で
50μm/50μmの歩留まりが20〜30%以下にな
るのに対し、本発明では、銅箔厚が35μmしかなく同
じ回路幅/回路間隙で歩留まりが約70〜80%にも達
するという効果を有する。
With respect to the fine pattern formability, in the prior art, for example, when a 35 .mu.m copper foil is plated with 20 .mu.m, the total copper body thickness becomes 55 .mu.m, and the yield of 50 .mu.m / 50 .mu.m in circuit width / circuit gap becomes 20 to 30% or less. In contrast, the present invention has an effect that the copper foil thickness is only 35 μm and the yield reaches about 70 to 80% with the same circuit width / circuit gap.

【0034】また、銅めっきのプロセスは、一般的に、
脱脂、ソフトエッチング、触媒付与、無電解銅めっき、
電気銅めっきとなるが、無電解はんだめっきプロセス
は、脱脂、ソフトエッチング、無電解はんだめっきとな
り、本発明によれば、工程数の低減が可能とされ、よっ
て設備費用、作業工数を削減することができるという効
果を有する。
The copper plating process is generally performed by
Degreasing, soft etching, catalyst application, electroless copper plating,
Electroless copper plating will be used, but the electroless solder plating process will be degreasing, soft etching, and electroless solder plating. According to the present invention, the number of steps can be reduced, thus reducing equipment costs and man-hours. It has the effect that can be done.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施形態に係る印刷配線板の製
造方法を工程順に示す断面図である。(a)は銅張積層
板を示す断面図、(b)は穴あけをした状態を示す断面
図、(c)は穴に導電性ペーストを充填した状態を示す
断面図、(d)は導体パターンを形成した後の状態を示
す断面図、(e)は無電解はんだめっき処理後の状態を
示す断面図、(f)はヒュージングを行った後の状態を
示す断面図である。
FIG. 1 is a sectional view illustrating a method for manufacturing a printed wiring board according to a first embodiment of the present invention in the order of steps. (A) is a cross-sectional view showing a copper-clad laminate, (b) is a cross-sectional view showing a state where holes are drilled, (c) is a cross-sectional view showing a state where holes are filled with a conductive paste, and (d) is a conductor pattern. FIG. 4E is a cross-sectional view showing a state after the formation of the electroless solder plating, FIG. 4E is a cross-sectional view showing a state after the electroless solder plating, and FIG.

【図2】本発明の第2の実施形態に係る印刷配線板の製
造方法を工程順に示す断面図である。(a)は銅張積層
板を示す断面図、(b)は穴あけをした状態を示す断面
図、(c)は穴に導電性ペーストを充填した状態を示す
断面図、(d)は導体パターンを形成した後の状態を示
す断面図、(e)はソルダーレジストを形成した後の状
態を示す断面図である。(f)は無電解はんだめっき処
理後の状態を示す断面図、(g)はヒュージングを行っ
た後の状態を示す断面図である。
FIG. 2 is a sectional view illustrating a method for manufacturing a printed wiring board according to a second embodiment of the present invention in the order of steps. (A) is a cross-sectional view showing a copper-clad laminate, (b) is a cross-sectional view showing a state where holes are drilled, (c) is a cross-sectional view showing a state where holes are filled with a conductive paste, and (d) is a conductor pattern. FIG. 4E is a cross-sectional view showing a state after forming a solder resist, and FIG. 4E is a cross-sectional view showing a state after forming a solder resist. (F) is a sectional view showing a state after electroless solder plating, and (g) is a sectional view showing a state after fusing.

【図3】特開昭62−193197号公報に記載の印刷
配線板の製造方法を工程順に示す断面図である。(a)
は銅張積層板を示す断面図、(b)は穴あけをした状態
を示す断面図、(c)は穴に導電性ペーストを充填した
状態を示す断面図、(d)は銅めっきを施した状態を示
す断面図、(e)は導体パターンを形成した後の状態を
示す断面図である。
FIG. 3 is a cross-sectional view illustrating a method of manufacturing a printed wiring board described in JP-A-62-193197 in the order of steps. (A)
Is a cross-sectional view showing a copper-clad laminate, (b) is a cross-sectional view showing a state where holes are drilled, (c) is a cross-sectional view showing a state where holes are filled with a conductive paste, and (d) is plated with copper. FIG. 4E is a cross-sectional view showing a state, and FIG. 4E is a cross-sectional view showing a state after a conductor pattern is formed.

【符号の説明】[Explanation of symbols]

1 銅張積層板 2 導電性ペースト 3 銅めっき 4 はんだ層 5 ソルダーレジスト DESCRIPTION OF SYMBOLS 1 Copper-clad laminate 2 Conductive paste 3 Copper plating 4 Solder layer 5 Solder resist

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】(a)銅張積層板の所望の箇所に穴を穿設す
る工程と、 (b)前記銅張積層板の穿設された穴の箇所に導電性ペー
ストを埋め込む工程と、 (c)次いで前記銅張積層板をエッチングにより不要部分
を溶解除去して導体パターンを形成する工程と、 (d)前記導体パターンの前記導電性ペーストを埋め込ん
だ穴表面に選択的に置換型無電解めっきではんだ層を形
成する工程と、 (e)前記はんだ層をヒュージングする工程と、 を含むことを特徴とする印刷配線板の製造方法。
1. A step of: (a) drilling a hole in a desired location of a copper clad laminate; and (b) a step of embedding a conductive paste in a location of the drilled hole of the copper clad laminate. (c) then forming a conductor pattern by dissolving and removing unnecessary portions by etching the copper clad laminate, Mu optionally substituted in (d) of the conductive paste embedded bore surface of the conductor pattern A method for manufacturing a printed wiring board, comprising: a step of forming a solder layer by electrolytic plating; and (e) a step of fusing the solder layer.
【請求項2】銅張積層板に穿設された両面接続用の穴に
導電性ペーストを充填し、少なくとも該導電性ペースト
が充填された穴表面とそのランド部に置換型無電解めっ
きにてはんだ層を形成し、該はんだ層をヒュージングす
ることにより前記導電性ペーストと前記ランド部との接
続を行うようにしたことを特徴とする印刷配線板の製造
方法。
2. A hole filled with a conductive paste for duplex drilled in the copper-clad laminate connection at substitutional electroless plating at least a conductive paste filled holes surfaces thereof a land portion A method for manufacturing a printed wiring board, comprising: forming a solder layer; and fusing the solder layer to connect the conductive paste and the land.
【請求項3】前記置換型無電解めっきにて前記はんだ層
の形成が選択的に行われることを特徴とする請求項2記
載の印刷配線板の製造方法。
3. A process according to claim 2 printed wiring board, wherein the formation of the solder layer in said substituted electroless plating is selectively performed.
JP7286741A 1995-10-06 1995-10-06 Manufacturing method of printed wiring board Expired - Fee Related JP2720853B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7286741A JP2720853B2 (en) 1995-10-06 1995-10-06 Manufacturing method of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7286741A JP2720853B2 (en) 1995-10-06 1995-10-06 Manufacturing method of printed wiring board

Publications (2)

Publication Number Publication Date
JPH09102675A JPH09102675A (en) 1997-04-15
JP2720853B2 true JP2720853B2 (en) 1998-03-04

Family

ID=17708433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7286741A Expired - Fee Related JP2720853B2 (en) 1995-10-06 1995-10-06 Manufacturing method of printed wiring board

Country Status (1)

Country Link
JP (1) JP2720853B2 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05175649A (en) * 1991-12-25 1993-07-13 Tokuyama Soda Co Ltd Manufacture of circuit board
JPH0669635A (en) * 1992-08-18 1994-03-11 Cmk Corp Method for manufacturing printed wiring board
JPH06350249A (en) * 1993-06-04 1994-12-22 Sumitomo Bakelite Co Ltd Production of printed circuit board

Also Published As

Publication number Publication date
JPH09102675A (en) 1997-04-15

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