JP2680399B2 - Decryption device - Google Patents

Description

The present invention relates to an SSR (Secondary Surveillance Radar) or the like which is incorporated in an ATCRBS ground system or the like, and which transmits and receives a signal that is encoded by pseudo-random breakdown and spread in frequency. , A decoding device for decoding a pseudo-random code from a received signal.

[Prior Art] Modern military systems are in a so-called electronic warfare environment in which electromagnetic waves, light, etc. used are detected and used in reverse. Under such an electronic warfare environment, it is premised on activities to reduce the effectiveness or ineffectiveness of the military system used by the other party. In order to maintain its effectiveness, own military system such as SSR, which is often used in the activity concerned, is technology that prevents detection of its own transmitted signal by various receivers of the other party, so-called LPI (Low Probabillity of Intercept) Is being promoted. In the LPI conversion, a pseudo-random coding (hereinafter, referred to as a pseudo-random coding for frequency-spreading a transmission signal coded with a pseudo-random sequence such as a M-sequence or a quadratic residue sequence (hereinafter referred to as a PN sequence)
Technical means regarding PN coding) are well known.

In PN-encoded SSRs (hereinafter referred to as PN-coded radars), for example, in order to obtain three-dimensional position information of a target such as an aircraft (hereinafter referred to as a target), desired frequency-spread signals reflected from the target are obtained. The signal processing means for decoding the PN code from the wave to restore the original signal bandwidth is adopted. In the above decoding, a PN sequence having a correlation with a PN code of a desired wave is self-formed and a signal processing of square modulation is performed.

Here, the autocorrelation function φ (t) of the PN sequence is represented by the following formula (1), where n is the number of code bits of the PN sequence and T _b is the code bit length: (MN−1) ≦ t ≦ (MN + 1) M = 0, 1, 2, 3, ... Other cases A sharp shape similar to the δ-function disclosed in FIG. 1 is obtained.

On the other hand, between the PN code signal of the desired wave and the PN sequence signal used for coding the transmission signal, there is a so-called reflection depending on the distance between the PN coded radar and the target (hereinafter referred to as the target distance). Since the target distance cannot be accurately detected before the decoding, it causes a time delay, and when it is decoded, it is synchronized with the PN code signal of the desired wave, that is, it has a correlation. A means for forming a PN sequence signal is needed.

FIG. 2 shows an example of a circuit configuration for decoding a PN-coded signal in SSR or the like.

In this example, first, the clock signal Ck is sent from the clock generator 2 to the code generator 4. The code generator 4 generates a reference PN sequence signal S ₁ in synchronization with the clock signal Ck and sends it to a transmitter (not shown) as a signal indicating a modulation code. At the same time, the reference PN sequence signal S ₁ is supplied to the code delay unit 6 together with the clock signal Ck. Assuming that the number of code bits of the PN sequence is n, the n number of PN sequence signals S _D1 , S _{D2 to} S _{Dn that} are synchronized with the clock signal Ck and are phase-shifted by one code bit are parallel from the code delay unit 6. Be derived to. The PN sequence signals S _D1 , S _{D2 to} S _Dn are n two-phase modulators D1, D.
2 to Dn are supplied as signals indicating the decoded code.

On the other hand, in a receiver (not shown), a received signal S ₄ formed by forming a desired wave into a predetermined signal is divided into n numbers and supplied to the square modulators D ₁ and D _{2 to} D _n , respectively. Here, in the n square modulators D ₁ and D _{2 to} D _n , the received signal S ₄ input to each of them is phase-shifted by 1 to n code bit lengths with respect to the reference PN sequence signal S ₁ . PN sequence signals S _D1 , S _{D2 to} S _Dn
Then, the signal processing of the two-phase modulation is performed. And a two-phase modulator
A desired wave is decoded by any of D ₁ , D _{2 to} D _n , and output signals S _M1 and S _{M2 to} S _Mn are derived.

In this way, among the PN sequence signals S _D1 , S _{D2 to} S _Dn ,
Any one of them has a time difference of 0 to a maximum 1/2 code bit length with respect to the PN signal of the received signal S ₄ with an arbitrary time delay, and correlation can be obtained.

[Problems to be Solved by the Invention] However, in the decoding device according to the above-mentioned conventional technique, there is a maximum synchronization deviation (t) of 1/2 code bit length between the code of the desired wave and the code for decoding. Occur, therefore φ (0) / φ
(T) loss, that is, 2n / (n at maximum for the desired wave
-1) loss occurs. The loss varies depending on the target distance, and the target is beyond the maximum detection distance of the PN coded radar, so that a situation where detection is possible intermittently occurs. Therefore, in signal processing and information processing, for example, the scale of the storage amount increases, or the algorithm becomes complicated, which causes a problem that improvement of the defect is desired. .

The present invention has been made in view of the above point, the loss accompanying the decoding of PN coding for the desired wave is reduced, and the loss is formed to a constant value irrelevant to the target distance, and the distance is longer than the maximum detection distance. It is an object of the present invention to provide a decoding device that reduces the possibility of detecting a target, thereby further improving the LPI property and reducing the signal related to target information analysis or the information processing scale.

[Means for Solving the Problems] In order to solve the above problems, the present invention relates to a decoding device of a radar signal processing system for deriving a signal obtained by decoding a pseudo random code from a received signal encoded by a pseudo random sequence. , A code delay signal transmitting means for transmitting a plurality of pseudo-random sequence signals that are phase-shifted by one code bit length from each other, and a plurality of decoders. And two decoding means for deriving an output signal decoded from each decoder.

[Operation] In the decoding device according to the present invention, each of the decoders forming the decoding means simultaneously supplies the same received signal and a decoding PN signal whose phase is shifted by one code bit length from each other to decode the received signal. Signal processing is performed and an output signal is sent out. As a result, the loss with respect to the desired wave due to the decoding of the PN coded signal is reduced, the loss is formed to a constant value, and the signal processing scale is reduced.

[Embodiment] Next, an embodiment of a decoding apparatus according to the present invention will be described in detail below with reference to the accompanying drawings.

FIG. 3 shows the overall structure, and FIG. 4 shows the decoder in detail.

The example shown in FIG. 3 has a clock generator 12 that is a timing generator that sends out a clock signal Cc, and a code generator 14 that is supplied with the clock signal Cc and sends out a reference PN sequence signal S _11. There is. The reference PN sequence signal S ₁₁ is supplied to a transmitter (not shown) as a signal indicating a modulation code. Further, the clock signal Cc and the reference PN sequence signal S ₁₁ are simultaneously supplied to the code delay unit 16. N shifted by one code bit length in synchronization with the clock signal Cc derived here
Received signal S including the desired wave from a receiver (not shown), to which the PN sequence signals C _D1 , C _D2 , C _D3 , C _{D4 to} C _Dn are supplied.
₁₄ is provided with decoders M ₁ , M ₂ , M _{3 to} M _n .

Here, the decoders M ₁ , M ₂ , M _{3 to} M _n will be described. The decoders M ₁ , M ₂ , and M _{3 to} M _n have the same configuration. The decoder M ₁ will be described with reference to FIG. 4, and the other description will be omitted.

The decoder M ₁ includes two-phase modulators 22a and 22b to which the PN sequence signals C _D1 and C _D2 and the received signal S ₁₄ are divided and supplied, and a modulation signal S _22a derived from the two-phase modulators 22a and 22b.
And an adder 24 to which S _22b is supplied.

With this configuration, the decoded output signals C _M1 , C _M2 , C _{M3 to} C _Mn are derived from the decoded rows M ₁ , M ₂ , M _{3 to} M _n .

Next, the operation of the embodiment configured as described above will be described.

First, the clock signal Cc is sent from the clock generator 12 to the code generator 14. The code generator 14 is the clock signal
A reference PN sequence signal S ₁₁ is generated in synchronization with Cc, and is supplied to a transmitter (not shown) as a signal indicating a modulation code. on the other hand,
The clock signal Cc is sent to the code delay unit 16. Here, when the number of code bits of the PN sequence is n, the code delay unit
Reference numeral 16 denotes n PN sequence signals C _D1 , C _D2 , C _D3 , and C _{D4 to} C _Dn that are phase-shifted by one code bit length in synchronization with the clock signal Cc, and simultaneously derive (n parallel output) the n PN sequence signals. Decoders M ₁ , M ₂ , M ₃ through
It is supplied to M _n as a decoded code signal. On the other hand, the received signal S ₁₄ including the desired wave is divided into n numbers, and the decoders M ₁ , M
₂ , M _{3 to} M _n , respectively.

Here, the code delay device 16 to the decoder M _1, the PN sequence signal C _D1 a first th output signal synchronized with the reference PN sequence signal S _11, 1 code with respect to the reference PN sequence signal S ₁₁ The PN series signal C _D2 , which is the second output signal having a bit length phase shift, is also supplied.

In addition, the decoder M ₂ supplies the reference PN sequence signal from the code delay unit 16.
2 for the PN sequence signal C _D2 , which is the second output signal that is phase-shifted by one code bit length with respect to S ₁₁ , and the reference PN sequence signal S ₁₁ .
The PN series signal C _D3 , which is the third output signal whose code bit length is phase- _shifted , is simultaneously supplied.

Further, in the decoder M ₃ , the PN sequence signal C _D3 and the reference PN sequence signal S ₁₁ which are the third output signal obtained by shifting the code length of the reference PN sequence signal S ₁₁ by 2 code bits are provided to the decoder M _3. On the other hand, the PN sequence signal C _D4, which is the fourth output signal having a phase shift of 3 code bits, is also transmitted.

In this way, the phases are sequentially shifted by one code bit length from each other.
The PN sequence signals C _D1 , C _D2 , C _D3 , C _{D4 to} C _Dn are supplied to the decoder M _n as codes for decoding, where the output signal C _M1 ,
C _M2 , C _{M3 to} C _Mn are derived.

Next, the decoding code of the desired wave is performed, and the output signals C _M1 , C _M2 ,
_Decoders M ₁ , M ₂ , M _{3 to} M _n that derive C _{M3 to} C _Mn will be described. The decoder M ₁ will be described with reference to FIG. 4, and the other decoders M ₂ , M _{3 to} M _n have similar operations, and a description thereof will be omitted.

Here, the received signal S ₁₄ is divided into two-phase modulator 22a and
Supplied to 22b. Further, the two-phase modulators 22a and 22b are supplied with the PN series signals C _D1 and C _D2 which are phase-shifted by one code bit length from each other, and are subjected to two-phase modulation. The modulated signals S _22a and S _22b obtained here are added in an adder 24 to derive an output signal C _M1 .

As will be readily understood from the description of such a decoder M ₁ ,
In the decoders M ₁ , M ₂ , M _{3 to} M _n , the mutual correlation functions are two-phase modulated with PN sequence signals C _D1 , C _D2 , C _D3 , C _{D4 to} C _{Dn in} which the phase is _shifted by one code bit length. By performing processing and further adding, a correlation function is equivalently formed as shown by the solid line in FIG. As shown in FIG. 5, the main lobe of this equivalent correlation function is uniform over one code bit length, and the correlation value is n / (n-1) according to the equation (1). In this way, the main lobe of the correlation function is 1
Since n pieces are formed for each code bit length, the loss with respect to the desired wave due to the combination of the PN coded signals is a constant value of n / (n-1), and the loss is reduced by 3 dB as compared with the conventional technique. Moreover, it can be formed to a constant value regardless of the target distance.

[Effects of the Invention] As described above, according to the encoding device of the present invention,
In a decoding device of a radar signal processing system for deriving a signal obtained by decoding a pseudo random code from a received signal encoded by a pseudo random sequence, a code delay for transmitting a plurality of pseudo random sequence signals phase-shifted by one code bit length from each other. And a decoding means for deriving an output signal decoded by simultaneously receiving the received signal and a plurality of pseudo-random sequence signals that are phase-shifted by one code bit length from each other. As a result, the following effects and advantages are provided.

(1) The loss for the desired wave due to the decoding of the PN coded signal can be suppressed to n / (n-1), and the loss can be set to a constant value.
Reduced. As a result, the LPI property is further improved.

(2) By forming the loss to a constant value that is irrelevant to the target distance, the possibility of detecting a target beyond the maximum detection distance is reduced, and the signal processing scale related to analysis of target information is reduced.

As described above, the present invention has been described with reference to the preferred embodiments. However, the present invention is not limited to these embodiments, and various improvements and design changes can be made without departing from the gist of the present invention. Of course.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram provided for explaining a conventional technique, FIG. 2 is an overall configuration diagram of a decoding device according to the conventional technique, and FIG. 3 is an overall configuration showing an embodiment of a decoding device according to the present invention. FIG. 4 is a block diagram showing the configuration of the decoder of the example shown in FIG. 3, and FIG. 5 is an explanatory diagram provided for explaining the operation of the decoder shown in FIG. 12 …… Clock generator, 14 …… Code generator 16 …… Code delayer 22a, 22b …… Two-phase modulator, 24 …… Adder Cc …… Clock signal C _{D1 to} C _Dn … PN sequence signal C _{M1 to} C _Mn …… Output signal, M _{1 to} M _n …… Decoder S ₁₁ …… Reference PN sequence signal, S ₁₄ …… Received signal S _22a , S _22b …… Modulation signal

Claims (3)

(57) [Claims] 1. In a decoding device of a radar signal processing system for deriving a signal obtained by decoding a pseudo random code from a received signal encoded by a pseudo random sequence, a plurality of pseudo random sequence signals phase-shifted by one code bit length from each other. And a plurality of decoders, each of which is supplied with the received signal and the two pseudo-random sequence signals that are phase-shifted by one code bit length from each other. A decoding device comprising: decoding means for deriving a decoded output signal; 2. The decoding device according to claim 1, wherein the pseudo-random sequence is an M sequence, a quadratic residue sequence, or a twin prime number sequence. 3. The decoding device according to claim 1, wherein the code delay signal sending means includes at least a clock generator and a code delay device, and the decoder further divides the received signal into two and one code bit length. It is characterized by comprising two two-phase modulators to which two phase-shifted pseudo-random sequence signals are supplied, and an adder for adding the modulation signals derived from the two two-phase modulators. Decoding device.