JP2672584B2 - Teletext receiver - Google Patents

Description

Description: [Object of the invention] (Field of industrial application) The present invention relates to a teletext receiver, and in particular, to a character adapted to efficiently process captured character data and display it on a display device. Regarding broadcast receivers.

(Prior Art) Teletext is used for a specific horizontal scanning period (vertical retrace period of a television signal) (10H to 21H and 27th of even field).
3H ~ 284H) is a system that repeatedly transmits various types of teletext programs in the form of digital signals. The receiving side is equipped with a buffer memory for capturing teletext data,
The signals thus sent are sequentially written in the buffer memory. Then, by specifying the program number of the desired program by the receiver using a means such as a keyboard, the specified program is retrieved from the buffer memory, and the data of the program that follows is transferred to the display memory. You can make a presentation.

FIG. 5 shows the configuration of a conventional teletext receiver.
FIG. 6 is a timing chart for explaining the operation. However, FIG. 6 (c) is an enlarged view of a part of the display timing signal of (b), and the signal of (d) is also shown at the same timing as (c).

In FIG. 5, a television composite video signal on which a character signal is superimposed is input to a terminal 1. The data gate generating circuit 2 includes the 10H to 21H and the 10th to 21H which are superimposing periods of the character signal from the television composite video signal input from the terminal 1.
A data gate pulse signal (see FIG. 6A) having a 12H width of 273H to 284H is generated for each field and supplied to the timing control circuit 3 and the switch circuit 7. The data extraction clock generation circuit 4 extracts the 2.86 MHz component from the 16-bit clock run-in signal included in the character signal superimposed on the television composite video signal from the terminal 1 and multiplies it by 5.73. A data clock signal is generated by creating a MHz reference signal and synchronizing it with a 5.73 MHz clock signal obtained by crystal oscillation, and supplies the data clock signal to the data write signal generation circuit 5 and the data sampling circuit 6. The data sampling circuit 6 samples the character signal by slicing the character signal portion with the reference signal obtained by integrating the clock run-in signal included in the character signal,
It is supplied to the buffer memory 8. The data write signal generation circuit 5 outputs the data write signal necessary for writing the character signal obtained by the data extraction circuit 6 to the buffer memory 8 as the data clock signal from the data extraction clock generation circuit 4. And is supplied to the switch circuit 7. When writing a character signal to the buffer memory 8, the switch circuit 7 is turned on by the data gate pulse signal generated by the data gate generating circuit 2, and the data writing signal from the data writing signal generating circuit 5 is transferred to the buffer memory. 8 is performed. The synchronizing signal reproducing / display clock generating circuit 10 obtains the synchronizing signal used for the screen display of the display 16 such as a CRT by synchronously separating the television composite video signal input from the terminal 1, and also the PLL (Phase Synchronous Loop). 5.73M, which is 364 times the horizontal sync signal
It obtains a display clock of Hz, and supplies these signals to the display timing signal generation circuit 11. The display timing signal generation circuit 11 generates a display timing signal (see FIG. 6 (b)) corresponding to the display period (for example, 204H) of the teletext displayed on the display 16, and supplies it to the switch circuit 12 and the timing control circuit 3. On the other hand, when the display timing signal is in a high (H) level period (see FIG. 6 (c)), a data read signal necessary for reading data from the pixel memory 13 and the color memory 14 is generated, It supplies the input terminal of the switch circuit 12 and supplies a blanking signal to the display 16. The timing control circuit 3 generates a signal for reading a character signal from the buffer memory 8 while the data gate pulse signal and the display timing signal are at a low (L) level, and the read signal is passed through the switch circuit 7. And supplies it to the buffer memory 8. As a result, the character signal stored in the buffer memory 8 is read out and supplied to the character signal decoding processing circuit 9. The character signal decoding processing circuit 9 receives the error correction processing and the control code processing of the character signal, and as a result, receives the character broadcast at the terminal.
Character processing is performed only when it is determined by the teletext storage setting signal input from 17 that the data is to be displayed on the display 16, pixel data is supplied to the pixel memory 13, and color data is supplied to the color memory 14. Further, the memory circuit control signal (see FIG. 6 (d)) obtained by the control code processing of the character signal decoding processing circuit 9 is applied to the switch circuit 12
The pixel data and the color data are stored in the pixel memory 13 and the color memory 14, respectively, by being supplied to the pixel memory 13 and the color memory 14 through. When the pixel data and the color data are read from the memories 13 and 14, the data read signal generated by the display timing signal generation circuit 11 during the period when the display timing signal (see FIG. 6C) is at the H level is used. Pixel memory via switch circuit 12
By supplying the data to the color memory 14, the pixel data and the color data are read from the pixel memory 13 and the color memory 14 and supplied to the screen data creating circuit 15. The pixel data creation circuit 15 creates R, G, B signals necessary for displaying on the display 16 from the pixel data and the color data, and supplies them to the display 16.

By the way, in the above-mentioned conventional teletext receiver, when the data gate pulse signal and the display timing signal shown in FIG. 6 are both in the L level period, the decoding processing of the text signal and the writing to the display memory must be performed. I have to.
Further, signal reading from the display memory must also be performed while the display timing signal is at H level. Therefore, as the display 16 used for displaying the teletext screen, since it is necessary to synchronize (timing) with the input television composite video signal, it is possible to display the current standard television signal. It was limited to designed displays.

(Problems to be Solved by the Invention) As described above, in the conventional teletext receiver, the period of decoding processing of the captured character data and writing / reading processing to / from the display memory is limited, and efficient display processing can be performed. In addition to the problem of not being present, there is a problem that it cannot be displayed on a display other than the display that displays the current standard television signal (for example, a display for high definition television).

Therefore, in order to solve the above-mentioned problems, the present invention enables the captured character data to be efficiently processed and displayed on a display, and can be displayed on a display for displaying a signal other than the current standard television signal. The purpose of the present invention is to provide a teletext receiver.

[Structure of the Invention] (Means for Solving the Problems) A teletext receiver according to the present invention receives a standard television signal on which a text signal is superimposed, and has a first aspect ratio higher than that of the standard television signal. A teletext receiver capable of displaying the character signal on a display having a large second aspect ratio, wherein the character signal is taken into a buffer memory from a standard television composite video signal on which the character signal is superimposed. Data capturing means, a character signal processing means for decoding the captured character signal and outputting a first control signal for writing into the memory and character data to be written, and the character signal processing means based on the standard television composite video signal. Synchronous signal reproducing / display clock generating means for generating a first synchronizing signal and a display clock signal for screen display corresponding to an aspect ratio of 1. , The second screen display corresponding to the second aspect ratio
Means for generating a sync signal and a display clock signal, the first sync signal and the display clock signal from the sync signal reproducing / display clock generating means, and the second sync signal and the display clock signal externally input. And a display timing signal generating means for generating a second control signal for memory reading based on a synchronization signal and a display clock signal from the first switching means, From a second switch means composed of a plurality of switch groups for respectively selecting and outputting either the first or second control signal, and from a plurality of memory groups capable of storing character data of a character broadcast program for one screen. At least one of the memory groups is supplied with a control signal from the second switch means.
One memory operates as a display memory, and the remaining memory operates as a memory, and based on the memory number for storage supplied from the character signal processing means, one of the second switch means for display. A memory switch for operating a memory switch other than the above to select a memory, and a memory that operates as a memory in the memory group.
Storage end detection means for detecting that data for the screen is stored, and a display mode selection for selecting a first display mode for displaying a plurality of teletext screens at a time as the display mode on the display. Means for generating a signal, and, in response to the display mode selection signal, generates a signal indicating a predetermined number of screen projection periods based on the second synchronization signal and the display clock signal from the first switch means. Display memory switching means, means for generating a screen selection signal for selecting a predetermined number of screens in the first display mode, generation of a display memory number and storage from the storage end detecting means. A control for updating the display memory number is performed based on an end detection signal, and in the first display mode, a predetermined number is input after the screen selection signal is input. And a switch control means for updating the display memory number based on a storage end detection signal from the storage end detection means while generating a predetermined number of display memory numbers corresponding to the screens, and supplied from the switch control means. Based on the display memory number, the second switch means is operated for display. In the first display mode, the second switch means is operated based on the display memory number supplied from the switch control means. A display memory selection unit for operating a predetermined switch of the two switch units to select a memory of the first group of the memory group for multi-screen display; and a switch control unit. Corresponding to the display memory number, the memory in which the data for one screen of the memory group is stored is selected, and the data in the memory is read. Be those, wherein in the first display mode, based on the display memory number supplied from said switch control means, from the memory of the first group of said memory group 1
Data for reading data from these memories by sequentially selecting memories storing screen data, and screen data for creating a display signal for displaying on the display from the read data Creating means, and a composite screen creating means for creating a signal for displaying a plurality of screens on the display by combining a predetermined number of screen data passed through the screen data creating means in the first display mode. It is equipped and configured.

Further, the composite screen creating means is provided with means for combining data input from the outside with the non-display area in the predetermined number of screen data from the screen data creating means to effectively use the non-display area. Is desirable.

(Operation) In the present invention, at least one memory of the plurality of memory groups constituting the memory means operates as a display memory, the remaining memory operates for storage, and one screen is stored in the storage memory. When the data is stored, the memory functions as a display memory, so that the memory can be effectively used and the display on the display can be performed in a short time.

Also, the memory with the display function is always at least 1.
Since there is one, the data in the memory can be read by a read signal input from the outside, and can be displayed on a display that displays a signal other than the current standard television signal, such as a high-definition display. Becomes

Further, among the memory means, a memory other than the memory operating for display operates for storage, so that the storage operation can be performed during the display display period.
Even if the number of teletext programs increases (because the same signal is transmitted periodically in the teletext), the capacity of the memory for storage and the buffer memory for taking in the text signals is increased to increase the number of text signals to 1 It is easy to reduce the apparent time for capturing the screen.

Furthermore, a plurality (for example, 4 pixels) may be displayed on a display having a second aspect ratio such as a display for high definition television.
The display mode selection signal for selecting the first display mode for displaying the teletext screen of the screen) at a time, and in response to this, based on the synchronization signal and the display clock signal for the second aspect ratio. , While providing display memory switching means for generating a signal indicating a predetermined number of screen display periods,
In the display mode of, while inputting a screen selection signal for selecting a predetermined number of screens, thereby generating a predetermined number of display memory numbers corresponding to the predetermined number of screens,
A switch control means having a function of updating the display memory number when the storage end detection signal is input from the storage end detection means is provided, and further, the display memory selection means supplies the switch memory means with the switch control means. Based on the predetermined number of display memory numbers corresponding to the predetermined number of screens, the memory of the first group of the memory group forming the memory means is selected for the multi-screen display, and the data reading means , A memory in which one screen of data is sequentially stored from a memory of a first group of the memory group based on a predetermined number of display memory numbers corresponding to a predetermined number of screens supplied from the switch control means. After selecting, reading the data from these memories, and using the screen data creation means as display signals (R, G, B signals), the composite screen creation means combines a predetermined number of screen data. It was set to be displayed in multiple screens on a display Te.

As a result, it is possible to display, on the display having the second aspect ratio, the text broadcast superimposed on the standard television signal on, for example, four screens, and display the text broadcasts of different pages on the respective screens.

Further, by providing a means for synthesizing the external input data in the synthesizing screen creating means, when a predetermined number of character screens are displayed on the display having the second aspect ratio, when an undisplayed area occurs on the screen, , External input data can be displayed in that part.

(Examples) Hereinafter, the present invention will be described based on examples shown in the drawings.

FIG. 1 is a block diagram showing a teletext receiver according to an embodiment of the present invention.

In this figure, the same components as those of the conventional example of FIG. 5 are designated by the same reference numerals. That is, the input terminal 1, the data gate generation circuit 2, the timing control circuit 3, the data extraction clock generation circuit 4, the data writing signal generation circuit 5, the data extraction circuit 6, of the television composite video signal on which the character signal is superimposed, Switch circuit 7, buffer memory 8, character signal decoding processing circuit
9, the synchronizing signal reproducing / display clock generating circuit 10, the display timing signal generating circuit 11, the screen data creating circuit 15, and the display 16 are the same as in the conventional example. In this embodiment, two sets of switch circuits 12 ₁ are used instead of the switch circuit 12 of the conventional example.
And using a switch circuit 12 _2, and the conventional example of the pixel memory 13,
Instead of the color memory 14, two sets of pixel memory 13 ₁ and color memory 14 ₁ and pixel memory 13 ₂ and color memory 14 ₂ are used. Along with this, a switch control circuit 18 having a screen switching signal input terminal 21, a switch circuit 19, and a selector 20 are provided. In addition, a switch circuit 24 having an external signal input terminal 22 and a switching signal input terminal 23, and a storage end memory detection circuit 25 are provided.

Explaining the configuration of the main part, the pixel data and the color data output from the character signal decoding processing circuit 9 are transmitted to the switch circuit 19 from the switch control circuit 18 to the switch circuit 19 in the same manner as in the conventional example. It is assumed that the data is supplied to the pixel memory 13 ₁ and the color memory 14 ₁ by switching to. At this time, the switch circuit 12 ₁ is switched to _one side (writing side) by the switching signal supplied from the switch control circuit 18, and the memory storage control signal generated from the character signal decoding processing circuit 9 is transferred to the pixel memory 13 ₁ and the color memory. It is supplied to the memory 14 _1. Thus, the pixel data and the color data of each pixel memory 13 ₁
It performs an operation of storing in the color memory 14 _1. In this state, the switch circuit 12 ₂ is switched to one side (read side) by the switching signal supplied from the switch control circuit 18, and the data read signal generated by the display timing signal generating circuit 11 is transferred to the pixel memory 13 ₂ and the color memory. It is supplied to the memory 14 _2. By this data read signal, the pixel data and color data already stored in the pixel memory 13 ₂ and the color memory 14 ₂ are read out, and via the selector 20 which receives the control of the switching signal from the switch control circuit 18. , And is supplied to the screen data creation circuit 15. The switch control circuit 18
The switching signal from the switch circuit 12 ₁ , switch circuit
Pixel memory 13 ₁ and color memory 14 ₁ by switching 12 ₂ , switch circuit 19 and selector 20 to the side opposite to the above.
The pixel data and color data already stored in the pixel data are supplied to the screen data creation circuit 15 through the selector 20, and the pixel data and color data from the character signal decoding processing circuit 9 are passed through the switch circuit 19 to the pixel memory 13 ₂ and color memory. It is stored in 14 ₂ .

Next, a circuit switching configuration by the switch control circuit 18 will be described.

The switch control circuit 18 is configured so that the polarity of the switching signal is inverted by the detection signal from the storage end memory detection circuit 25. The storage end memory detection circuit 25 determines whether all the data for one screen has been stored in the pixel memory 13 ₁ and the color memory 14 ₁ or the pixel memory 13 ₂ and the color memory 14 ₂ by a memory storage control signal from the character signal decoding processing circuit 9. Based on (by counting the number of pulses, etc.).
When the storage end memory detection circuit 25 detects the end of data storage for one screen, the switch control circuit 18 makes it possible to accept a screen switching signal input from a terminal 21, and the switching signal causes the switch circuits 12 ₁ , 12 _{2 to} receive. , 19 and selector 20 are switched. By this switching, for example, first the pixel memory
13 ₁ and a color memory 14 _first set of memory storage memory, also a set of memory pixel memory 13 ₂ and the color memory 14 ₂ is that operating as display memory, the next pixel memory 13 ₁ The function memory can be switched so that the memory of the pair of the color memory 14 ₁ and the color memory 14 ₁ operates as a display memory, and the memory of the pixel memory 13 ₂ and the color memory 14 ₂ operates as a storage memory. When this switching operation is carried out, the switch control circuit 18 informs the character signal decoding processing circuit 9 that the switching has been carried out, and as a result, the character signal decoding processing circuit 9 sets the character broadcasting storage setting inputted from the terminal 17. If the newly input teletext storage setting signal that enables the reception of a signal differs from the teletext storage settings stored in the pixel memory 13 ₁ and color memory 14 ₁ , the pixel memory 13 ₂ and color memory 14 ₂ Start storing character data. After that, the display operation of the pixel memory 13 ₁ and the color memory 14 ₁ and the storage operation of the pixel memory 13 ₂ and the color memory 14 ₂ are the same as those described above except that the memory functions are changed.

Next, the switch circuit 24 will be described. The switch circuit 24 switches between the sync signal and the display clock signal generated by the sync signal reproduction / display clock generation circuit 10 and the sync signal and the display clock signal externally input from the terminal 22 by the switching signal input from the terminal 23. It has a function of supplying to the display timing signal generation circuit 11. In this embodiment, the terminal
Even when the signal input to the display timing signal generation circuit 11 by the switching signal input from 23 is the synchronization signal and the display clock signal externally input from the terminal 22, the storage memory and the display memory are separated, Display 16
Even if it does not display the current standard television signal, a sync signal and a display clock signal according to the type of the display 16 are input from the terminal 22, and the display timing signal generation circuit 11 uses the pixel memory 13 based on these signals. By generating a read signal for reading the data stored in ₁ , ₁ , the color memory 14 ₁ or the pixel memory 13 ₂ , the color memory 14 ₂ , it is possible to display a teletext on the display 16.

FIG. 2 is a block diagram showing another embodiment of the present invention.

2 is different from the embodiment of FIG. 1 in that a large number (n sets) of pixel memories and color memories are provided. As a result, the switch circuits 12 ₁ and 12 _{2 in} FIG.
Also, n pieces are used, and instead of the switch circuit 19 of FIG. 1, a display memory selection circuit 26 and a storage memory selection circuit.
It is configured to use 27. Pixel memory 13 ₁ , 13 ₂ , ..., 13n
, And the color memories 14 ₁ , 14 ₂ , ..., 14n are composed of dual port RAMs having separate input / output terminals. The pixel data output from the character signal decoding processing circuit 9 is a pixel memory.
13 ₁ , 13 ₂ , ..., 13n are supplied to the color memory 14
It is designed to be supplied to ₁ , 14, ₂ ...
This is done by selecting a set. Further, data reading from the memory is also performed by selecting one set of another pixel memory and color memory.

The display memory selection circuit 26 decodes the display memory number supplied from the switch control circuit 18, and turns on one of the switch circuits 12 ₁ , 12 ₂ , ..., 12n by the decode signal,
A data read signal generated by the display timing signal generation circuit 11 is supplied to a pair of pixel memory and color memory. Further, the decode signal of the display memory number is the selector 20
, 13n and the color memories 14 ₁ , 14 ₂ , ..., 14n to which the data read signal is supplied from the pixel memory 13 ₁ , 13 ₂ ,. Is selected, the memory output is supplied to the screen data creating circuit 15 and displayed on the display 16.

Further, in order to store the pixel data and the color data output from the character signal decoding processing circuit 9 into the pixel memories 13 ₁ , 13 ₂ , ..., 13n and the color memories 14 ₁ , 14 ₂ ,. The storage memory numbers supplied from the processing circuit 9 to the storage end memory detection circuit 25 and the storage memory selection circuit 27 are decoded by the storage memory selection circuit 27, and the switch signals 12 ₁ , 12 ₂ , ... , 12n (the other one different from the case of selecting the display memory) is turned on, while the memory storage control signal (write signal) generated in the character signal decoding processing circuit 9 is switched to the switch circuit 12. ₁ , 12 ₂ , ..., 1
Pixel memories 13 ₁ , 13 ₂ , ..., 13n and color memories 14 ₁ , 14 ₂ , ..., 14n through the 2n switch circuits that are turned on.
Are stored by being selectively supplied to one of the memories. Further, in this storage operation, the storage end memory detection circuit 25 causes all the data for one screen to form one set of pixel memory 13i and color memory 14i (where i = 1 to n).
Is stored in the switch control circuit 18, and a detection signal is output to the switch control circuit 18 when the storage for one screen is completed. This detection signal causes the switch control circuit 18 to
The screen switching signal input from the device can be received and the display memory selection circuit 26 is supplied with the display memory number.
The other structure is exactly the same as that shown in FIG.

FIG. 3 is a block diagram showing still another embodiment. 2 is different from the embodiment shown in FIG. 2 in that a display (hereinafter referred to as a high-definition display) 33 for a high-definition television receiver is used in place of the display 16, and the screen of the high-definition display 33 is used. It is configured so that at least four screens of teletext can be displayed above.
Along with this, multiple modes of 4-screen display (see FIG. 4)
Display memory switching circuit 28 for selecting one mode of
A composite screen creation circuit for synthesizing data input from the outside in an undisplayed area in a 4-screen display
31 is provided.

FIG. 4 shows the screen structure of the high quality display 33 of FIG. The aspect ratio of the display screen for the current standard television is 3: 4, whereas the screen of the high definition display 33 has a display screen with the aspect ratio of 9:16, and the scanning line also has the aspect ratio of 2 of the current standard television signal. Since it is more than double, it is possible to project at least four screens of teletext as shown in FIG. This 4-screen display is (a)
Three display modes as shown in (c) to (c) are possible.

However, the synchronizing signal and the display clock signal for the high-quality display 33 are input to the terminal 22, and this signal is supplied to the display timing signal generating circuit 11 via the switch circuit 24. In the display timing signal generation circuit 11, the terminal 22
A signal for reading data is generated based on the signal from.
The display memory switching circuit 28 is one of FIGS. 4 (a) to 4 (c).
One of the display modes is selected by the signal input from the terminal 29, and the character broadcasts 1 to 4 shown in FIG. 4 are selected based on the synchronizing signal and the display clock signal supplied from the switch circuit 24.
A signal indicating the image projection period is generated and supplied to the switch control circuit 18. Switch control circuit 18 starts from terminal 30
13 _1, 13 _2, ..., 13n and the color memory 14 _1, 14 _2, ..., signal for selecting the four screens among the screen data stored in 14n is inputted, movies of the teletext 1-4 A display memory number is generated so that each of the output periods corresponds to four screen data. This update of the display memory number is performed only when there is a memory in which all the data for one screen is stored by the detection signal output from the storage end memory detection circuit 25. The composite screen creation circuit 31 combines the four screen data for display from the screen data creation circuit 15 and is externally input from the terminal 32 to an undisplayed area (see FIG. 4) in the four screen data. The data is synthesized and supplied to the high quality display 33. The data input to the terminal 32 may be data such as a teletext index number. Other configurations are the same as those shown in the embodiment of FIG.

[Effects of the Invention] As described above, according to the present invention, it is possible to efficiently perform the decoding process and the display process of the captured character data and display it on the display, and moreover, a display that displays a signal other than the current standard television signal. It is possible to realize a teletext receiver that can be displayed even for.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a teletext receiver according to an embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. FIG. 4 is a block diagram showing an embodiment, FIG. 4 is an explanatory diagram showing a screen of the high definition display in FIG. 3, and FIG. 5 is a block diagram showing a conventional teletext receiver.
FIG. 6 is a waveform diagram for explaining the operation of FIG. 1 ... Television composite video signal input terminal, 6 ... Data sampling circuit, 8 ... Buffer memory, 9 ... Character signal decoding processing circuit, 10 ... Synchronous signal reproduction / display clock generation circuit, 11 ... Display timing Signal generation circuit, 12 ₁ , 12 ₂ , ..., 12n ...... Switch circuit, 13 ₁ , 13 ₂ , ..., 13n ...... Pixel memory, 14 ₁ , 14 ₂ , ..., 14n ...... Color memory, 15 ...... Screen Data creation circuit, 16 ... Display, 18 ... Switch control circuit, 19,24 ... Switch circuit, 20 ... Selector, 25 ... Memory end memory detection circuit.

Claims (2)

(57) [Claims] 1. A standard television signal on which a character signal is superimposed is received, and the character signal is displayed on a display having a second aspect ratio larger than a first aspect ratio of the standard television signal. It is a possible teletext receiver, and is a data capturing means for capturing a character signal from a standard television composite video signal on which a character signal is superimposed into a buffer memory, and a data capturing means for decoding the captured character signal for writing to a memory. First
Character signal processing means for outputting the control signal and the character data to be written, and the first television based on the standard television composite video signal.
Sync signal reproducing / display clock generating means for generating a screen display first sync signal and a display clock signal corresponding to the second aspect ratio, and a screen display second sync signal corresponding to the second aspect ratio. And means for generating a display clock signal, and switching between the first synchronization signal and the display clock signal from the synchronization signal reproducing / display clock generating means and the second synchronization signal and the display clock signal which are externally input. First switching means for outputting the second control signal, and a display timing signal generating means for generating a second control signal for reading the memory based on the synchronization signal and the display clock signal from the first switching means, the first or Second switch means composed of a plurality of switch groups for respectively selecting and outputting one of the second control signals, and character data of a character broadcast program. Is composed of a plurality of memory groups capable of storing one screen, a control signal from the second switch means is supplied, and at least one memory of the memory groups operates as a display memory, and the remaining memory is Based on the memory means operating for storage and the storage memory number supplied from the character signal processing means, the storage switches other than the display of the second switch means are operated to store the storage memory. A memory selection unit for storage to be selected, a storage end detection unit for detecting that one screen of data is stored in a memory that operates for storage in the memory group, and a plurality of display modes on the display are provided. Means for generating a display mode selection signal for selecting a first display mode for displaying the teletext screen of the device at a time, and the display mode selection signal In response, display memory switching means for generating a signal indicating a predetermined number of screen projection periods based on the second synchronizing signal and the display clock signal from the first switch means, and the first display mode. , A means for generating a screen selection signal for selecting a predetermined number of screens, and a display memory number, and the display memory number is updated based on the storage end detection signal from the storage end detection means. In the first display mode, a predetermined number of display memory numbers corresponding to a predetermined number of screens are generated after the screen selection signal is input, and the storage end detection is performed. Switch control means for updating the display memory number based on a storage end detection signal from the means, and the second switch based on the display memory number supplied from the switch control means. The switch means is operated for display, and in the first display mode, a predetermined switch of the second switch means is operated based on the display memory number supplied from the switch control means. And a memory for display for selecting a memory of a first group of the memory group for displaying a plurality of screens, and a memory for display corresponding to a display memory number supplied from the switch controller. A memory for storing one screen of data in the group is selected and the data in the memory is read out. In the first display mode, the display memory number supplied from the switch control means is selected. 1 from the memories of the first group of the memory group
Data for reading data from these memories by sequentially selecting memories storing screen data, and screen data for creating a display signal for displaying on the display from the read data Creating means, and a composite screen creating means for creating a signal for displaying a plurality of screens on the display by combining a predetermined number of screen data passed through the screen data creating means in the first display mode. A teletext receiver characterized by being provided. 2. The teletext receiver according to claim 1, wherein the composite screen creating means combines data input from the outside with an undisplayed area in a predetermined number of screen data from the screen data creating means. A teletext receiver characterized by comprising means for