JP2661557B2 - Field effect type semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field effect type semiconductor device including a strained layer.

[0002]

2. Description of the Related Art Conventionally, a field effect type semiconductor device having an operation layer using a strained layer is known (see: Yoshi).
inobu Sugiyama et al. Jou
rnal of Crystal growth 11
5 (1991)). That is, a conventional field-effect semiconductor device will be described with reference to FIG.
(1,0,0) just substrate, 2 an InAlAs buffer layer, 3 an InGaAs active layer with an InAs composition ratio of 0.8, 4 an InAlAs spacer layer, 5 an N-type InAlA
s electron supply layer, 6 is an N-type InGaAs contact layer, 7
S is a source electrode, 7D is a drain electrode, and 7G is a gate electrode. In the field-effect semiconductor device of FIG.
The nGaAs layer 3 is distorted due to 2% lattice mismatch with respect to the InP substrate 1. If the nGaAs layer 3 is a thin layer having a thickness of 10 nm or less, good crystallinity can be obtained. High frequency characteristics of the transistor can be obtained.

[0003]

However, in the above-mentioned conventional field-effect type semiconductor device, the thickness of the InGaAs operation layer 3, which is a strained layer, is set to increase the carrier concentration by increasing the thickness of the operation layer. If the thickness is larger than 10 nm, dislocations occur and the mobility deteriorates. Similarly, for the purpose of increasing the carrier concentration by increasing the amount of discontinuity in the conduction band, the InA
If the s composition ratio is higher than 0.8, even if the thickness of the InGaAs active layer is 10 nm, dislocations occur and the mobility is deteriorated. Such deterioration of the mobility deteriorates the high-frequency characteristics of the field-effect semiconductor device.

It is an object of the present invention to provide a field effect type semiconductor device in which the operating layer is a strained layer, even if the operating layer is made thicker than the critical thickness in order to increase the carrier concentration, or the InAs of the operating layer is formed. An object of the present invention is to suppress the deterioration of the high-frequency characteristics of the field-effect semiconductor device even when dislocation occurs by further increasing the composition ratio.

[0005]

In order to solve the above-mentioned problems, the present invention relates to a method in which a surface is moved from a [1,0,0] direction to a [0,0,0] direction.
[0, -1,1] direction or [0, -1, -1] direction.
A tilted substrate inclined from about 8 ° to about 4 °, and a crystal layer including a strained layer formed on the tilted substrate, and the [0, -1, 1] direction or [0, 1, −1] direction.

[0006]

According to the above-described means, even if dislocations occur in the crystal layer, the crystal layer can be oriented in the [0, -1,1] direction or in the [0,1,1] direction.
In the -1] direction, carriers do not cross dislocations,
Therefore, there is no carrier scattering due to dislocation, and there is no decrease in mobility.

[0007]

FIG. 1 is a sectional view showing an embodiment of a field effect type semiconductor device according to the present invention. In FIG. 1, [1,
For example, 0.8 ° from the [0,0] direction to the [0,1,1] direction
An InAlAs buffer layer 2 ′ (for example, InAs composition ratio 0.52, film thickness 200 n) is formed on the tilted InP substrate 1 ′.
m), InGaAs active layer 3 ′ (for example, InAs composition ratio 0.8, film thickness 20 nm), InAlAs spacer layer 4 ′
(For example, InAs composition ratio 0.52, film thickness 4 nm), In
AlAs electron supply layer 5 '(for example, InAs composition ratio 0.5
2, thickness 15 nm), non-doped InAlAs contact layer 6 ′ (for example, InAs composition ratio 0.52, thickness 15 n)
m), and a source electrode 7 as an ohmic electrode is formed thereon so that a current flows in the [0, -1, 1] direction.
S ′, a drain electrode 7D ′, and a gate electrode 7G ′ as a Schottky electrode are formed. In addition, for example, 3 × 10 ¹⁸ / _Cm ³ of Si is added to the InAlAs electron supply layer 5 ′.

As described above, the I.sub.1 is placed on the substrate 1 'inclined at 0.8.degree. From the [1,0,0] direction to the [0,1,1] direction.
The InGaAs operation layer 3 'having an nAs composition ratio of 0.8
m, and the respective electrodes of the source, gate and drain are arranged so that current flows in the [0, -1, 1] direction, so that the critical film thickness for the InP substrate 1 'is 10 nm.
InGaAs active layer 3 ′ having an InAs composition ratio of 0.8
Is set to 20 nm, scattering due to dislocation does not occur. Therefore, the InGaAs operation layer 3 ′ having an InAs composition ratio of 0.8.
The high mobility of the semiconductor device can be effectively used, and a field-effect semiconductor device having excellent high-frequency characteristics can be obtained.

FIG. 2 is a partially enlarged view showing the vicinity of the hetero interface with the InGaAs active layer 3 'and the InAlAs spacer layer 4' in FIG. As shown in FIG. 2, an atomic layer step 31 generated by the tilted InP substrate 1 ′ and present on the crystal growth surface is used as a dislocation source that generates dislocations D1, D2,. That is, in the case of one atomic layer step, the interval between the atomic layer steps 31 generated by the inclined substrate 3 ′ is from 10 nm to 20 nm by setting the inclination angle to about 0.8 ° to about 2 °.
nm, and in the case of a two-atomic layer step, the tilt angle is about 1.
By setting the angle from 6 ° to about 4 °, the thickness becomes 10 nm to 20 nm. By intentionally generating dislocations D1, D2,... On the atomic layer step 31 under these conditions, the terrace 32
, Can be suppressed from occurring. That is, in order for the dislocations D1, D2,... To be stably present on the terrace 32, a length of about 20 nm or more is necessary, and when the dislocations D1, D2,. Is required, so that the probability of occurrence of dislocation crossing the atomic layer step 31 is low.
Further, the dislocations D1 and D2 tend to suppress each other if they are too close. Therefore, [0, -1, 1]
When the atomic layer steps 31 linear in the direction or the [0,1, -1] direction are formed, dislocations D1, D2,... Are likely to be generated along the atomic layer steps 31, but the generated dislocations D1, D2,. The (1,1,1) plane or the (1, -1,1) plane including most of the atomic layer steps 31 exists as sliding surfaces S1, S2,.
Then, dislocations are unlikely to exist.

As a result, when considering the transport of electrons, the electrons move in the [0, 1, 1] direction or in the [0, -1,-] direction.
1] crosses the atomic layer step 31 at the same time as the sliding surface S where dislocations D1, D2,.
1, S2,... Are scattered by dislocations. On the other hand, when electrons flow in the [0, -1, 1] direction or the [0, 1, -1] direction, the sliding surfaces S1, S
.. Are parallel to the atomic layer step 31 and the sliding surfaces S1, S2,... And the distance between the sliding surface, eg, S1, and the sliding surface, eg, S2, is greater than the de Broglie wavelength. , Dislocations D1, D2,... Therefore, even if the high strain layer thin film is made to have a critical thickness or more in order to realize high performance of the field effect type semiconductor device, the [0, -1, 1] direction or [0, 1,
In the [-1] direction, electrons do not cross the dislocations, so that scattering of carriers due to the dislocations is small and high mobility can be obtained.

In the above embodiment, the substrate material is I
Although nP was used, a substrate having an arbitrary lattice constant and constituent material such as Si, GaAs, and InAs can be used. Although the tilt angle of the substrate is set to 0.8 °, the tilt angle may be set so that the step of one atomic layer or two atomic layers is in the range of 10 nm to 20 nm in accordance with the lattice constant of the substrate used. it can.

Furthermore, although the operation layer 3 'is an InGaAs layer and its InAs composition ratio is 0.8, the InAs composition ratio can be changed from 0 to 1. However, since the effect of the present invention uses a strained layer and increases when the thickness of the strained layer exceeds the critical thickness, as in the above-described embodiment,
For example, when an InP substrate is used, the In composition ratio is preferably 0 or more and 0.3 or less or 0.7 or more and 1 or less. The constituent material of the operation layer 3 'is InP, InGaAs.
sP, InSb, and InGaSb can also be used.

Similarly, the InAlAs buffer layer 2 ', I
InA of each layer of the nAlAs spacer layer 4 ', the InAlAs carrier supply layer 5', and the non-doped InAlAs layer 6 '
The s composition ratio can also be varied from 0 to 1, respectively, and the constituent materials are, for example, GaAs, Al
GaAs, AlAs, InP, AlSb, and the like can also be used. Further, the doping concentration can be a desired concentration. In the above-described embodiment, Si is used as the N-type dopant because electrons are used as carriers in the above-described embodiment. However, any other dopant may be used as the N-type dopant such as S or Se. In a field effect type semiconductor device using holes as carriers, for example, B
A material that becomes a P-type dopant such as e or C can be used.

[0014]

As described above, according to the present invention, dislocations generated when the thickness of the strained layer exceeds the critical thickness can be suppressed, and the slip surface of the generated dislocations can be reduced to [0, -1, 1]. ], It is possible to suppress electron mobility degradation due to dislocations in the [0, -1, 1] direction. As a result, it is possible to obtain a field-effect semiconductor device having excellent high-frequency characteristics. it can.

[Brief description of the drawings]

FIG. 1 is a sectional view showing one embodiment of a field-effect semiconductor device according to the present invention.

FIG. 2 is a partially enlarged view of FIG.

FIG. 3 is a cross-sectional view showing a conventional field-effect semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... InP (1,0,0) just substrate 1 '... InP inclined substrate 2,2' ... InAlAs buffer layer 3,3 '... InGaAs operation layer 4,4' ... InAlAs spacer layer 5,5 '... N-type InAlAs Electron supply layer 6 N-type InGaAs contact layer 6 'InGaAs contact layer 7S, 7S' Source electrode 7G, 7G 'Gate electrode 7D, 7D' Drain electrode 31 Atomic layer step 32 Terrace T1, D2, dislocation S1, S2: sliding surface

Claims (2)

(57) [Claims] 1. The method according to claim 1, wherein the surface is moved from [1,0,0] direction to [0,0,0].
1 of InP, Si, GaAs, InAs inclined at about 0.8 ° to about 4 ° in [1,1,] direction or [0, -1, -1] direction
And than one made inclined substrate (1 '), is formed on the inclined substrate, a critical thickness dislocation generation occurs
InGaAs, InP, InGaAsP, InS including strained layers with thicknesses exceeding
b, 1 than one made crystal layer InGaSb and (3 '), the crystalline
A source electrode (7S ′) provided on the layer;
In the [0, -1,1] or [0,1, -1] direction
A drain electrode (7D ′) provided, and the source electrode and the drain electrode on the crystal layer.
Field effect semiconductor device comprising a gate electrode (7G ') disposed between. 2. The method according to claim 1, wherein the surface is moved from [1, 0, 0] direction to [0, 0, 0].
At least one of InP, Si, GaAs, and InAs inclined at a constant inclination angle in [1,1] direction or [0, -1, -1] direction.
And a buffer layer (2 '), an operation layer (3'), a spacer layer (4 '), a carrier supply layer (5') and a contact layer (5) formed on the inclined substrate (1 '). 6 '), a source electrode formed on the contact layer, a drain collector
Poles and gate electrodes (7S ', 7D', 7G '), wherein the tilt angle is one atomic layer step or two steps of the operating layer.
The distance between atomic layer steps is determined to be in the range of about 10 nm to about 20 nm, and the drain electrode is separated from the source electrode by the operating layer.
In the [0, -1,1] or [0,1, -1] direction
And the gate electrode is connected to the source electrode and the drain.
A field-effect type semiconductor device arranged between the in-electrode.