JP2659147B2 - Evaluation microcomputer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an evaluation microcomputer, and more particularly, to a case where the evaluation microcomputer has functions that are not included in a one-chip microcomputer to be mass-produced. The present invention relates to an evaluation microcomputer in which functions are not used by a person who evaluates a program.

[0002]

2. Description of the Related Art Generally, a one-chip microcomputer having a built-in ROM and RAM operates on its own according to a program stored in a ROM. Done. That is, when mass-producing a one-chip microcomputer, the same program is written in all the mass-produced products. Therefore,
Programs cannot be easily rewritten,
Have sufficient consideration when creating a program. Therefore, an evaluation microcomputer having the same functions as a mass-produced one-chip microcomputer but whose operation is performed by instructions given from an external memory is created, and the development and examination of the program use this evaluation microcomputer. Done.

Recently, a single evaluation microcomputer has been used to evaluate various types of mass production one-chip microcomputers, so that various types of mass production one-chip microcomputers can be used. (Built-in functions (timer function, AD conversion function, serial input / output function, etc.)). When the user develops and evaluates a program for a specific one-chip microcomputer for mass production using the microcomputer for evaluation, the user is required to use a microcomputer for evaluation which the specified one-chip microcomputer for mass production does not have. I was careful not to use the function.

[0004]

However, when a user develops and evaluates a program using an evaluation microcomputer, the user mistakenly uses the functions of the evaluation microcomputer that the one-chip microcomputer for mass production does not have. When the program is developed and evaluated, the program normally operates on the microcomputer for evaluation, but does not operate normally on the one-chip microcomputer for mass production. In particular, if the wrong program is burned into a ROM in a mass-production one-chip microcomputer with a mask, it cannot be recovered.

Accordingly, the present invention relates to a case where an evaluation microcomputer incorporates various functions of a plurality of kinds of mass production one-chip microcomputers and uses a specific mass production one-chip microcomputer using the evaluation microcomputer. When developing and evaluating a microcomputer program, an evaluation microcomputer that can be set to a use-prohibited state without the user having to worry about the functions of the evaluation microcomputer that the one-chip microcomputer for mass production does not have is provided. With the goal.

[0006]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and has a feature that a plurality of functions and an operation of the plurality of functions are controlled. A plurality of function control registers provided for a plurality of functions;
A first decoder for selecting one of the plurality of function control registers by decoding the readout data of the OM; An evaluation microcomputer for developing or evaluating a program to be executed, wherein at least one of the plurality of function control registers is selected based on an output of the first decoder and a corresponding bit thereof. A function operation register, a second decoder for decoding read data from the external memory, a flag set when a specific address of the external memory is accessed, and selecting the function operation register from the specific address of the external memory. When the data of the second decoder is read out, And a logic circuit that enables writing or reading of data to the selected function operation register based on the flag output, and when an address other than the specific address of the external memory is being accessed, The point is that the write operation of the function operation register is prohibited, and the write operation and the read operation of the specific function control register are prohibited by each bit output of the function operation register.

[0007]

According to the present invention, when the evaluation microcomputer incorporates various functions of a plurality of kinds of mass production one-chip microcomputers, a specific mass production one chip using this evaluation microcomputer is used. When developing and evaluating a microcomputer program, the use of the evaluation microcomputer function not possessed by the one-chip microcomputer for mass production can be prohibited without the user having to worry about it.

[0008]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG. 1 is a block diagram showing the inside of an evaluation microcomputer for explaining the present invention. (1) is a function control register, which controls each function (timer function, AD conversion function, serial input / output function, etc.) in the evaluation microcomputer in a one-to-one correspondence. Each function is set and operates according to the contents set in the function control register (1). Since a plurality of function control registers (1) are provided for each function, an address is assigned to each function control register (1) so that the user can perform a specific function as intended by the user. If you want to use this function control register (1), specify the address assigned to the function control register (1) corresponding to this function and select the corresponding function control register (1).
In this case, predetermined data for controlling the function as intended by the user must be written. Therefore, (2) is an address decoder (first decoder) provided for decoding address data for selecting any one of the plurality of function control registers (1), and a specific function control register (1) is provided. ), The output of the address decoder (2) provided corresponding to the function control register (1) becomes low level (hereinafter referred to as logic "0"). The logical output of the "0" output of the address decoder (2) and the "0" output of the function operation register described later is applied to the control circuit (3) inside the function control register (1), thereby providing the function. The control register (1) is selected to be in a state where data can be written and read.

In other words, if the evaluation microcomputer has a function that the one-chip microcomputer that is to be mass-produced does not have, and the user can use the function, the user mistakenly uses the function. This can lead to incorrect program development. Therefore, if a function not possessed by the one-chip microcomputer for mass production is known in advance, the function may be set to the use-prohibited state when a user develops and evaluates a program using the microcomputer for evaluation. Therefore, the function control register (1) of the evaluation microcomputer corresponding to the function not provided in the mass-production one-chip microcomputer has "1" from the function operation register described later.
Is output, and even if the user attempts to use the function by mistake and the address data for selecting the function control register (1) is decoded by the address decoder (2), the function control register (1) Can be set to the write-read prohibited state, that is, if the user does not care about anything, the user can mistakenly use functions that are not in the mass-production one-chip microcomputer in the evaluation microcomputer during the program development and evaluation stages. That is to prevent.

The control circuit (3) in the function control register (1) enters a write state when a write signal W2 is applied in a write / read enabled state, and enters a read state when a read signal R2 is applied. Data can be read and written according to each function via the internal bus (4). (5) is the above-mentioned function operation register, which is assumed to be constituted by, for example, an 8-bit register. Each bit of the function operation register (5) corresponds to each of the plurality of function control registers (1). In other words, the function control register of the evaluation microcomputer corresponding to the function of the one-chip microcomputer to be mass-produced
Bits of the function operation register (5) corresponding to (1) are set to "0" via the internal bus (6), and are used for evaluation corresponding to functions not provided by the mass-production one-chip microcomputer. The bit of the function operation register (5) associated with the function control register (1) of the microcomputer is set to "1" via the internal bus (6). This function operation register (5) is also provided according to the number of functions of the evaluation microcomputer. For example, when the number of functions is 16, the number of function control registers (1) is also 16, so that two 8-bit function operation registers (5) must be provided.

(7) an address decoder for decoding address data for selecting the function operation register (5)
(Second decoder) and the corresponding function operation register (5)
When the address data for selecting is decoded,
The address decoder (7) is configured to output "1". Here, the address data decoded by the address decoder (2) is generated from a memory such as an EPROM provided externally to operate the evaluation microcomputer in accordance with a user's instruction. Has a capacity of 512 Kbits and one word is composed of 8 bits, it is assumed that the user can use up to addresses 0000 to FEFF, for example. Further, the address data decoded by the address decoder (7) includes an evaluation microcomputer having a function corresponding to the function of a mass-production one-chip microcomputer to be created by the user before supplying the evaluation microcomputer to the user. Data to be supplied by the supply side. Here, this address data is also generated from a memory having the same capacity as that of the external memory such as the EPROM, and the supply side operates the F of this external memory.
The addresses from F00 to FFFF are used. The addresses from FF00 to FFFF are the specific addresses.

When a person on the supply side of the evaluation microcomputer accesses a specific address of a memory provided outside, a flag (not shown) is set to "1". This flag output is applied to one input terminal of the OR gate (8). Also, the other input terminal of the OR gate (8)
A control signal of "0" or "1" is applied depending on the will of the person supplying the evaluation microcomputer. In particular, this control signal can be "1" regardless of whether or not a specific address of the external memory is being accessed.

The output of the address decoder (7) and the output of the OR gate (8) are applied to an AND gate (9).
The operation of the control circuit (10) included in the function operation register (5) is controlled by the output of the D gate (9). That is,
Address decoder to select function operation register (5)
When the output of (7) becomes "1", the flag output is also "1" because the specific address of the external memory is accessed, and the "1" output of the AND gate (9) is changed to the control circuit. This is applied to (10), and the function operation register (5) is in a state where writing and reading are possible. In this state, when the write signal W1 is applied, the function operation register (5) is in the write state, and when the read signal R1 is applied, the function operation register (5) is in the read state. Is written to each bit of the function operation register (5) to set the state of the function operation register (5).

For example, the function control register (1) shown in FIG.
If the mass-production one-chip microcomputer does not have a function corresponding to the function control register (5) and the function in the evaluation microcomputer is disabled, the bit of the function operation register (5) corresponding to the function control register (1) is used. "1" is written in. In this case, even if the user tries to select the function control register (1) by the output of the address decoder (2), the corresponding bit output of the function operation register (5) is "1". Is always "0", whereby the control circuit (3) sets the function control register (1) to the write / read prohibition state, and the corresponding function is set to the use prohibition state. Therefore, the user does not need to be careful not to use the functions provided in the evaluation microcomputer but in the mass-production one-chip microcomputer at the time of program development and evaluation.

Here, at the specific addresses FF00 to FFFF of the external memory which can be used by the person supplying the microcomputer for evaluation to the user, the function control register (1) is added to each bit of the function operation register (5). After the data for performing the control is written, a jump instruction for jumping to address 0000 is included, that is, the flag is reset to “0”, and each of the function operation registers (5) After writing the data to the bit, the user cannot set the function operation register (5) to a write / read enabled state. However, in consideration of the case where the supply side supplying the evaluation microcomputer to the user needs to change the data after setting the data in the function operation register (5), the voltage is applied to the OR gate (8). The control signal to be supplied can be arbitrarily set to "1" by the supply side. When the output of the AND gate (9) is "0", the function operation register (5) is prohibited from reading and writing data through the internal bus (6).
Are directly connected to the input of the corresponding NOR gate (11), so that even if the function operation register (5) is in the write-read prohibition state, the function control register (1)
Is controlled.

By providing the above configuration, when the evaluation microcomputer incorporates various functions of a plurality of kinds of one-chip microcomputers for mass production, a specific mass production system using this evaluation microcomputer is used. When developing and evaluating a program for a one-chip microcomputer, the functions of the evaluation microcomputer that this mass-production one-chip microcomputer does not have can be disabled without the user having to worry about it. Development and program evaluation can be reliably prevented.

[0017]

According to the present invention, when the evaluation microcomputer incorporates various functions of a plurality of types of mass-production one-chip microcomputers, a specific mass-production microcomputer using this evaluation microcomputer is used. When developing and evaluating one-chip microcomputer programs, the functions of the evaluation microcomputer that this mass-production one-chip microcomputer does not have can be disabled without the user having to worry about it. An advantage is obtained in that correct program development and evaluation can be reliably performed using a computer.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an evaluation microcomputer of the present invention.

[Explanation of symbols]

 (1) Function control register (2) (7) Address decoder (5) Function operation register (8) OR gate (9) AND gate

Claims (2)

(57) [Claims] 1. A plurality of functions, a plurality of function control registers provided for each of the plurality of functions to control the operation of the plurality of functions, and a plurality of function control registers provided by decoding read data from a ROM. In a mass-production one-chip microcomputer incorporating a first decoder for selecting any one of them, the evaluation microcomputer for developing or evaluating a program written in the ROM has a configuration excluding the ROM. At least one function operation register provided to select any one of the function control registers based on the output of the first decoder and each corresponding bit, and a second decoder for decoding read data from an external memory A flag that is set when a specific address of the external memory is accessed; When data for selecting the function operation register is read from a specific address of an external memory, writing or reading of data to the selected function operation register is performed based on the second decoder output and the flag output. When an address other than the specific address of the external memory is being accessed, the write operation of the function operation register is prohibited, and the specific operation is performed by each bit output of the function operation register. The write operation or the read operation of the function control register is prohibited, and the internal
Of the multiple functions provided in
Accidentally evaluating features that are not computer-related
A microcomputer for evaluation, characterized in that the microcomputer is prevented . 2. The function operation register includes: a logic circuit output for setting the function operation register in a writable or readable state; a write signal for setting the function operation register to a write state; And a read signal for bringing the read state into the read state.
2. The evaluation microcomputer according to claim 1, further comprising a control circuit for controlling the operation of the function operation register.