JP2658878B2 - Ferroelectric thin film capacitor and method of manufacturing the same - Google Patents
Ferroelectric thin film capacitor and method of manufacturing the sameInfo
- Publication number
- JP2658878B2 JP2658878B2 JP6153197A JP15319794A JP2658878B2 JP 2658878 B2 JP2658878 B2 JP 2658878B2 JP 6153197 A JP6153197 A JP 6153197A JP 15319794 A JP15319794 A JP 15319794A JP 2658878 B2 JP2658878 B2 JP 2658878B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- film capacitor
- manufacturing
- bismuth
- srbi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Inorganic Compounds Of Heavy Metals (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は小型電子回路装置、特に
不揮発性半導体記憶装置に用いる強誘電体薄膜キャパシ
タに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a small-sized electronic circuit device, and more particularly to a ferroelectric thin film capacitor used for a nonvolatile semiconductor memory device.
【0002】[0002]
【従来の技術】従来より強誘電体薄膜を用いた薄膜キャ
パシタは開発されている。特に強誘電体としてチタン酸
ジルコン酸鉛(PZT)を用いた強誘電体薄膜キャパシ
タは広く研究されている。しかしPZTは分極反転を繰
り返すと特性が劣化する、いわゆる疲労現象が指摘され
ている。したがってPZT薄膜キャパシタを不揮発性半
導体記憶装置に適用した場合、読み出し・書き込み回数
が108 回に制限される(日経マイクロデバイス199
2年6月号P.80)。2. Description of the Related Art Conventionally, a thin film capacitor using a ferroelectric thin film has been developed. In particular, ferroelectric thin film capacitors using lead zirconate titanate (PZT) as a ferroelectric have been widely studied. However, it has been pointed out that the so-called fatigue phenomenon in which the characteristics of PZT deteriorate when repeated polarization inversion is repeated. Therefore, when a PZT thin film capacitor is applied to a nonvolatile semiconductor memory device, the number of read / write operations is limited to 10 8 (Nikkei Microdevice 199).
June 2002 P.M. 80).
【0003】PZT以外の強誘電体材料としてビスマス
系酸化物も研究されている。例えばジャパニーズ・ジャ
ーナル・オブ・アプライド・フィジクス、第32巻、4
086ページ(JAPANESE JOURNAL O
F APPLIED PHYSICS, VOL.3
2,P.4086)にはチタン酸ビスマス薄膜をCVD
法により作製した薄膜キャパシタが述べられている。ま
たインターナショナル・パブリケーション・ナンバーW
O93/12542(INTERNATIONAL P
UBLICATION NUMBER WO93/12
542)にはSrBi2 Ta2 O9 等のビスマス系酸化
物薄膜キャパシタと電荷転送用トランジスタよりなるメ
モリセルを用いた不揮発性半導体記憶装置が述べられて
おり、ビスマス系酸化物の疲労特性がきわめて優れてい
ることが指摘されている。[0003] Bismuth-based oxides have also been studied as ferroelectric materials other than PZT. For example, Japanese Journal of Applied Physics, Vol. 32, 4
Page 086 (JAPANESE JOURNAL O
F APPLIED PHYSICS, VOL. 3
2, P. 4086) by CVD of bismuth titanate thin film
It describes a thin film capacitor fabricated by the method. International Publication Number W
O93 / 12542 (INTERNATIONAL P
UBLICATION NUMBER WO93 / 12
No. 542) describes a nonvolatile semiconductor memory device using a memory cell composed of a bismuth-based oxide thin film capacitor such as SrBi 2 Ta 2 O 9 and a transistor for charge transfer, and the fatigue characteristics of the bismuth-based oxide are extremely high. It is pointed out that it is excellent.
【0004】[0004]
【発明が解決しようとする課題】この従来のビスマス系
酸化物薄膜キャパシタは、ビスマス系酸化物が著しい異
方性を示すため、ビスマス系酸化物薄膜の配向性の不均
一性により薄膜キャパシタの電気的特性がばらついてし
まうという課題がある。すなわちビスマス系酸化物は層
状構造をもちa軸ないしb軸方向には大きな自発分極を
有するが、c軸方向の自発分極は極めて小さい。したが
って薄膜の配向が不均一な場合、自発分極量は薄膜キャ
パシタを作製した基板面内または基板ごとに変化する。
そのため自発分極の量により情報の1,0を記憶する不
揮発メモリを実現するには、重大な障害となる。In this conventional bismuth-based oxide thin film capacitor, the bismuth-based oxide exhibits remarkable anisotropy. There is a problem that the characteristic varies. That is, the bismuth-based oxide has a layered structure and has a large spontaneous polarization in the a-axis or b-axis direction, but has a very small spontaneous polarization in the c-axis direction. Therefore, when the orientation of the thin film is not uniform, the amount of spontaneous polarization changes in the plane of the substrate on which the thin film capacitor is manufactured or for each substrate.
Therefore, it becomes a serious obstacle to realize a nonvolatile memory that stores information 1 and 0 according to the amount of spontaneous polarization.
【0005】[0005]
【課題を解決するための手段】本発明は、基板面内およ
び基板間の電気的特性のばらつきがなく不揮発性半導体
記憶回路に適用可能な強誘電体薄膜キャパシタおよびそ
の製造方法を提供するものである。このため本発明の薄
膜キャパシタは、主として<105>軸が厚さ方向に配
向したSrBi2 (Tax Nb1-x )2 O9 の薄膜およ
び該薄膜を挟む一対の電極から構成されることにより上
記目的を達成している。SUMMARY OF THE INVENTION The present invention provides a ferroelectric thin film capacitor applicable to a nonvolatile semiconductor memory circuit without variation in electrical characteristics within a substrate and between substrates, and a method of manufacturing the same. is there. Therefore thin film capacitor of the present invention, by being a pair of electrodes sandwiching the predominantly <105> thin and thin film of SrBi 2 the axis is oriented in the thickness direction (Ta x Nb 1-x) 2 O 9 The above objective has been achieved.
【0006】又、その製造方法としては、基板上に下部
電極層を形成し、ストロンチウム,ビスマス,タンタ
ル,ニオブのアルコキシドまたは有機金属塩を原料とし
た溶液を電極上に塗布後乾燥し、乾燥後の膜厚が20〜
80nmの範囲で600〜850℃で結晶化させることを
繰り返してSrBi2 (Tax Nb1-x )2 O9 (x=
0〜1)の薄膜を形成し、さらに上部電極を形成するこ
とを特徴としている。[0006] Further, as a method for producing the same, a lower electrode layer is formed on a substrate, and a solution made of an alkoxide of strontium, bismuth, tantalum or niobium or an organic metal salt is applied on the electrode, dried, and dried. Film thickness of 20 to
Repeat crystallized at 600 to 850 ° C. in the range of 80nm SrBi 2 (Ta x Nb 1 -x) 2 O 9 (x =
It is characterized in that a thin film of 0-1) is formed, and an upper electrode is further formed.
【0007】[0007]
【実施例】図1は本発明の薄膜キャパシタの一実施例を
示す半導体記憶装置の断面図である。1はシリコン基
板、2は素子分離用のフィールド酸化膜、3はゲート絶
縁膜、4はポリシリコン等のワード線、5、5′は電荷
転送用トランジスタのソースまたはドレインになる不純
物拡散領域、6は層間絶縁膜、7はポリシリコン、8は
シリコン拡散バリアメタル層となる窒化チタン層、9は
白金層である。白金層はパターニングされて個々の独立
した強誘電体キャパシタの一方の電極となる。FIG. 1 is a sectional view of a semiconductor memory device showing one embodiment of the thin film capacitor of the present invention. 1 is a silicon substrate, 2 is a field oxide film for element isolation, 3 is a gate insulating film, 4 is a word line of polysilicon or the like, 5 and 5 'are impurity diffusion regions serving as sources or drains of charge transfer transistors, 6 Is an interlayer insulating film, 7 is polysilicon, 8 is a titanium nitride layer serving as a silicon diffusion barrier metal layer, and 9 is a platinum layer. The platinum layer is patterned to become one electrode of each individual ferroelectric capacitor.
【0008】次にこの基板上にSrBi2 Ta2 O9 の
強誘電体薄膜層10を作製する方法を説明する。ジイソ
プロポキシストロンチウム0.1mol,硝酸ビスマス
0.2mol,テトラエトキシタンタル0.2molを
氷酢酸100mlに溶解し100℃で24時間加熱攪拌
する。この溶液をキシレンで0.1Mに希釈した後、上
記した基板上に3000rpmで1分間スピンコート
し、250℃で10min乾燥する。乾燥後の膜厚は約
30nmである。この膜厚が80nm以下の範囲にあればク
ラック等を生じることなく成膜することができる。また
膜厚が20nm以下では膜が不連続になり実用的でない。
これを乾燥後酸素雰囲気中で800℃で10分間熱処理
する。熱処理の温度としては、600℃以下であると結
晶化せず、850℃以上であると、ビスマスが揮発する
ため(酸化ビスマスの融点は830℃である)、好まし
くない。この熱処理により薄膜は結晶化する。その際基
板との界面より結晶化が起こるため、結晶がエピタキシ
ャルに成長し<105>に配向した膜を得ることができ
る。結晶化の際の膜厚が80nm以上になると膜中で結晶
化がランダムに起こり、配向した膜は得られない。この
塗布および熱処理を繰り返すことにより最初に得られた
配向を維持し、より大きな膜厚をもった膜を得ることが
できる。本実施例では合計6回繰り返し膜厚約200nm
の<105>に配向したSrBi2 Ta2 O9 膜10を
作製した。ビスマスを5%から15%過剰にすることに
より、より緻密に結晶化することができる。このような
通常の熱処理法以外に赤外線ランプによる急速加熱によ
り熱処理を行うこともできる。この上に上部電極白金層
11が形成される。Next, a method of forming a ferroelectric thin film layer 10 of SrBi 2 Ta 2 O 9 on this substrate will be described. 0.1 mol of diisopropoxystrontium, 0.2 mol of bismuth nitrate and 0.2 mol of tetraethoxytantalum are dissolved in 100 ml of glacial acetic acid, and heated and stirred at 100 ° C. for 24 hours. After diluting this solution to 0.1 M with xylene, the substrate is spin-coated at 3000 rpm for 1 minute and dried at 250 ° C. for 10 minutes. The film thickness after drying is about 30 nm. If the thickness is within the range of 80 nm or less, the film can be formed without generating cracks or the like. If the film thickness is less than 20 nm, the film becomes discontinuous and is not practical.
After drying, heat treatment is performed at 800 ° C. for 10 minutes in an oxygen atmosphere. If the temperature of the heat treatment is lower than 600 ° C., crystallization does not occur, and if the temperature is higher than 850 ° C., bismuth is volatilized (the melting point of bismuth oxide is 830 ° C.), which is not preferable. This heat treatment crystallizes the thin film. At this time, since crystallization occurs from the interface with the substrate, a film in which the crystal grows epitaxially and is oriented in <105> can be obtained. If the film thickness during crystallization exceeds 80 nm, crystallization occurs randomly in the film, and an oriented film cannot be obtained. By repeating this application and heat treatment, the orientation obtained initially can be maintained, and a film having a larger thickness can be obtained. In this embodiment, a total of about 200 nm is repeated 6 times.
An SrBi 2 Ta 2 O 9 film 10 oriented in <105> was prepared. By adding bismuth in excess of 5% to 15%, it is possible to crystallize more densely. In addition to such a normal heat treatment method, heat treatment can be performed by rapid heating using an infrared lamp. An upper electrode platinum layer 11 is formed thereon.
【0009】図2は上記の方法で得たSrBi2 Ta2
O9 薄膜のX線回折を示す曲線図である。このようにほ
ぼ完全に<105>に配向した膜を得ることができる。FIG. 2 shows SrBi 2 Ta 2 obtained by the above method.
FIG. 4 is a curve diagram showing X-ray diffraction of an O 9 thin film. Thus, a film almost completely oriented to <105> can be obtained.
【0010】図3はそれぞれ10枚の8inchシリコ
ンウェハー基板上に作製した本発明による配向膜と従来
の無配向膜による該薄膜キャパシタの自発分極を、基板
1枚につきランダムに選択した10点での測定値、すな
わちそれぞれ計100点での測定値の分布を測定値の平
均を100として示した分布図である。このように本発
明による薄膜キャパシタの基板面内、および基板間での
自発分極の分布は非常に小さい。FIG. 3 shows the spontaneous polarization of the thin film capacitor formed by the alignment film according to the present invention and the conventional non-alignment film formed on ten 8-inch silicon wafer substrates, respectively, at 10 points randomly selected for each substrate. FIG. 3 is a distribution diagram showing distribution of measured values, that is, measured values at a total of 100 points, with the average of the measured values being 100. As described above, the distribution of spontaneous polarization in the plane of the substrate and between the substrates of the thin film capacitor according to the present invention is very small.
【0011】なお本実施例はSrBi2 Ta2 O9 につ
いて述べたが、SrBi2 Nb2 O9 および両者の固溶
体SrBi2 (Ta,Nb)2 O9 にも全く同様に適用
でき同様の効果を得ることができる。Although this embodiment has been described for SrBi 2 Ta 2 O 9 , the same effect can be applied to SrBi 2 Nb 2 O 9 and a solid solution of both SrBi 2 (Ta, Nb) 2 O 9 in the same manner. Obtainable.
【0012】[0012]
【発明の効果】以上述べてきたように、本発明の薄膜キ
ャパシタおよびその製造方法によれば、基板面内および
基板間の電気的特性のばらつきがなく不揮発性半導体記
憶回路に適用可能な薄膜キャパシタを得ることができ
る。As described above, according to the thin-film capacitor and the method of manufacturing the same of the present invention, the thin-film capacitor applicable to a nonvolatile semiconductor memory circuit without variation in electrical characteristics within a substrate surface and between substrates. Can be obtained.
【図1】本発明の実施例による半導体記憶装置の断面図
である。FIG. 1 is a sectional view of a semiconductor memory device according to an embodiment of the present invention.
【図2】本発明の実施例による強誘電体薄膜のX線回折
像である。FIG. 2 is an X-ray diffraction image of a ferroelectric thin film according to an example of the present invention.
【図3】本発明の実施例による薄膜キャパシタの自発分
極の測定値の分布を示す分布図である。FIG. 3 is a distribution diagram illustrating a distribution of measured values of spontaneous polarization of a thin film capacitor according to an embodiment of the present invention.
1 シリコン基板 2 フィールド酸化膜 3 ゲート酸化膜 4 ワード線 5,5′ 不純物拡散領域 6 層間絶縁膜 7 ポリシリコン 8 下部電極バリアメタル層 9 下部電極 10 強誘電体 11 上部電極 12 層間絶縁膜 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Field oxide film 3 Gate oxide film 4 Word line 5, 5 'Impurity diffusion region 6 Interlayer insulating film 7 Polysilicon 8 Lower electrode barrier metal layer 9 Lower electrode 10 Ferroelectric 11 Upper electrode 12 Interlayer insulating film
フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 27/108 Continued on the front page (51) Int.Cl. 6 Identification code Agency reference number FI Technical indication location H01L 27/108
Claims (6)
たSrBi2 (Tax Nb1-x )2O9 (x=0〜1)
の薄膜および該薄膜を挟む一対の電極からなることを特
徴とする薄膜キャパシタ。1. A predominantly <105> SrBi 2 the axis is oriented in the thickness direction (Ta x Nb 1-x) 2 O 9 (x = 0~1)
And a pair of electrodes sandwiching the thin film.
オブのアルコキシドまたは有機金属塩を原料とした溶液
を電極上に塗布後乾燥し、乾燥後の膜厚が20〜80nm
の範囲で600〜850℃の酸素雰囲気中で10分間程
度熱処理を行って結晶化させることを繰り返して形成さ
れたSrBi 2 (Ta x Nb 1-x ) 2 O 9 (x=0〜
1)の薄膜および該薄膜を挟む一対の電極からなること
を特徴とする薄膜キャパシタ。 2. Strontium, bismuth, tantalum, d
Solution made from alkoxide or organometallic salt of
Is dried after coating on an electrode, and the film thickness after drying is 20 to 80 nm.
In an oxygen atmosphere at 600 to 850 ° C for about 10 minutes
Repeated heat treatment and crystallization
SrBi 2 (Ta x Nb 1- x) 2 O 9 was (x = 0 to
The thin film of 1) and a pair of electrodes sandwiching the thin film
A thin film capacitor characterized by the above-mentioned.
とを特徴とする請求項1または2記載の薄膜キャパシ3. The thin film capacity according to claim 1, wherein:
タ。Ta.
ウム,ビスマス,タンタル,ニオブのアルコキシドまた
は有機金属塩を原料とした溶液を電極上に塗布後乾燥
し、乾燥後の膜厚が20〜80nmの範囲で600〜85
0℃の酸素雰囲気中で10分程度熱処理を行って結晶化
させることを繰り返してSrBi2 (Tax Nb1-x )
2 O9 (x=0〜1)の薄膜を形成し、さらに上部電極
を形成することを特徴とする薄膜キャパシタの製造方
法。 4. A lower electrode layer is formed on a substrate, and a solution containing strontium, bismuth, tantalum, niobium alkoxide or an organic metal salt as a raw material is applied on the electrode and dried. 600 to 85 in the range of 80 nm
SrBi 2 (Ta x Nb 1-x ) is repeatedly heated and crystallized in an oxygen atmosphere at 0 ° C. for about 10 minutes.
A method for manufacturing a thin film capacitor, comprising forming a thin film of 2 O 9 (x = 0 to 1) and further forming an upper electrode.
ウム0.1mol、硝酸ビスマス0.2mol,テトラ0.1 mol, bismuth nitrate 0.2 mol, tetra
エトキシタンタル0.2molを氷酢酸100mlに溶Dissolve 0.2 mol of ethoxy tantalum in 100 ml of glacial acetic acid
解して100℃で24時間加熱攪拌し、これをキシレンThe mixture was heated and stirred at 100 ° C for 24 hours.
で0.1Mに希釈したものであること特徴とする請求項The solution is diluted to 0.1 M with
4記載の薄膜キャパシタの製造方法。5. The method for manufacturing a thin film capacitor according to 4.
段が赤外線ランプによるものであるStep is by infrared lamp ことを特徴とする請A contract characterized by that
求項4または5記載の薄膜キャパシタの製造方法。6. The method for manufacturing a thin film capacitor according to claim 4 or 5.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6153197A JP2658878B2 (en) | 1994-07-05 | 1994-07-05 | Ferroelectric thin film capacitor and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6153197A JP2658878B2 (en) | 1994-07-05 | 1994-07-05 | Ferroelectric thin film capacitor and method of manufacturing the same |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0823073A JPH0823073A (en) | 1996-01-23 |
JP2658878B2 true JP2658878B2 (en) | 1997-09-30 |
Family
ID=15557170
Family Applications (1)
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JP6153197A Expired - Fee Related JP2658878B2 (en) | 1994-07-05 | 1994-07-05 | Ferroelectric thin film capacitor and method of manufacturing the same |
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JP (1) | JP2658878B2 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1234137A (en) * | 1996-08-20 | 1999-11-03 | 株式会社日立制作所 | Manufacturing method of oxide dielectric element, memory and semiconductor device using same |
KR100321699B1 (en) * | 1998-12-30 | 2002-03-08 | 박종섭 | A method for forming ferroelectric capacitor using niobium-tantalum alloy glue layer |
JP2003100993A (en) | 2001-09-21 | 2003-04-04 | Sharp Corp | Semiconductor memory device |
JP2004296923A (en) * | 2003-03-27 | 2004-10-21 | Seiko Epson Corp | Manufacturing method of ferroelectric capacitor, ferroelectric capacitor, storage element, electronic element, memory device, and electronic equipment |
-
1994
- 1994-07-05 JP JP6153197A patent/JP2658878B2/en not_active Expired - Fee Related
Also Published As
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JPH0823073A (en) | 1996-01-23 |
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