JP2655449B2 - Method for manufacturing semiconductor integrated circuit - Google Patents
Method for manufacturing semiconductor integrated circuitInfo
- Publication number
- JP2655449B2 JP2655449B2 JP31691190A JP31691190A JP2655449B2 JP 2655449 B2 JP2655449 B2 JP 2655449B2 JP 31691190 A JP31691190 A JP 31691190A JP 31691190 A JP31691190 A JP 31691190A JP 2655449 B2 JP2655449 B2 JP 2655449B2
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- integrated circuit
- semiconductor integrated
- gas
- furnace
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体集積回路の製造方法に関し、特にMOS
型半導体集積回路のゲート酸化膜形成方法に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor integrated circuit,
The present invention relates to a method for forming a gate oxide film of a semiconductor integrated circuit.
従来、MOS型半導体集積回路のゲート酸化膜形成方法
は、円筒状の石英ガラス管を酸化雰囲気で満たした中
で、半導体ウェハーを850℃から1200℃程度の高温に保
つ事によって酸化膜を形成する方法が広く用いられてい
る。Conventionally, a gate oxide film forming method of a MOS type semiconductor integrated circuit forms an oxide film by keeping a semiconductor wafer at a high temperature of about 850 ° C. to 1200 ° C. while a cylindrical quartz glass tube is filled with an oxidizing atmosphere. The method is widely used.
一般に、この様な酸化膜形成を行なう装置を拡散炉ま
たは酸化炉と称しているが、この様な酸化炉に半導体ウ
ェハーを入炉する際には、O2ガスのみを酸化炉に流入
し、酸化雰囲気で入炉を行なうが、N2とO2の混合ガスを
流入し、希釈酸化雰囲気で入炉を行なう事が一般的であ
る。Generally, an apparatus for forming such an oxide film is called a diffusion furnace or an oxidation furnace.When a semiconductor wafer is introduced into such an oxidation furnace, only O 2 gas flows into the oxidation furnace, Although the furnace is entered in an oxidizing atmosphere, it is general that the furnace is introduced in a diluted oxidizing atmosphere by flowing a mixed gas of N 2 and O 2 .
この従来の酸化方法では入炉途中で形成される酸化膜
が入炉後に形成される酸化膜に比較して耐圧，欠陥密度
等の面で劣るものである為、入炉時の雰囲気が、形成さ
れる酸化膜の膜質を大きく左右してしまうという問題点
が存在する。In this conventional oxidizing method, the oxide film formed in the middle of the furnace is inferior to the oxide film formed after the furnace in terms of breakdown voltage, defect density, and the like. There is a problem that the quality of the oxide film to be formed is largely affected.
MOS型半導体集積回路におけるゲート酸化膜の性質
は、集積回路の歩留，信頼性に大きく寄与する為、この
様な酸化膜を形成する工程における酸化炉入炉条件は、
集積回路の製造において特に障害となることがある。Since the properties of the gate oxide film in a MOS type semiconductor integrated circuit greatly contribute to the yield and reliability of the integrated circuit, the oxidation furnace entry conditions in the process of forming such an oxide film are as follows.
This can be a particular obstacle in the manufacture of integrated circuits.
本発明は、以上説明したMOS半導体集積回路のゲート
酸化工程において酸化炉に半導体ウェハーを入炉する際
の流入ガスを、N2ガスとO2ガスの混合ガスとし、且つそ
の流量比をN2:O2＝100:1.0〜100:2.0に保つ事により、
入炉時に形成させる膜質の低い酸化膜の形式を抑える事
を特徴としている。The present invention, the inlet gas when Iriro the semiconductor wafer to an oxidizing furnace in the gate oxidation process of the MOS semiconductor integrated circuit described above, a mixed gas of N 2 gas and O 2 gas, and the flow rate ratio N 2 By keeping: O 2 = 100: 1.0 to 100: 2.0,
It is characterized in that the type of oxide film having a low film quality to be formed at the time of entering the furnace is suppressed.
次に本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
本発明の効果は、本発明を用いて形成いた酸化膜の膜
質を評価する事によって確認できる。酸化膜の膜質を評
価する方法には様々なものがあるが、適当な大きさにパ
ターニングした酸化膜に対して100nA程度の定電流を印
加し、破壊に至るまでの注入電荷量を測定する方法があ
る。この評価結果をグラフ化したものが第１図である。
縦軸は酸化膜が破壊に至るまでの注入電荷量を酸化膜１
μm2あたりに換算した値、横軸は酸化炉に入炉する際の
N2ガスとO2ガスの流量比である。The effects of the present invention can be confirmed by evaluating the film quality of an oxide film formed using the present invention. There are various methods for evaluating the film quality of the oxide film.However, a method is used in which a constant current of about 100 nA is applied to an oxide film patterned to an appropriate size to measure the amount of charge injected until breakdown. There is. FIG. 1 is a graph of the evaluation result.
The vertical axis indicates the amount of charge injected until the oxide film is destroyed.
converted value per [mu] m 2, the horizontal axis is the time of Iriro oxidation furnace
It is a flow ratio between N 2 gas and O 2 gas.
この評価結果から判然とする様に、N2ガス:O2ガスの
流量比を100:1.0〜100:2.0に保った場合に膜質の最も良
好な酸化膜が得られ、入炉時のO2ガス流量が多い程、膜
質は低下するが、逆にO2ガス流量を極度に減らした場合
にも膜質は極度に劣化する。As a ascertained from the evaluation results, N 2 gas: O 2 gas flow rate ratio of 100: 1.0 to 100: 2.0 The best oxide film quality is obtained when maintained at, O 2 at Iriro As the gas flow rate increases, the film quality deteriorates, but conversely, when the O 2 gas flow rate is extremely reduced, the film quality also deteriorates extremely.
以上説明した様に、本発明を酸化膜形成、特にMOS型
半導体集積回路のゲート酸化膜形成に応用する事によ
り、良好な膜質のゲート酸化膜を形成出来、集積回路の
歩留及び信頼性の向上をもたらす効果を有する。As described above, by applying the present invention to the formation of an oxide film, particularly to the formation of a gate oxide film of a MOS type semiconductor integrated circuit, a gate oxide film of good film quality can be formed, and the yield and reliability of the integrated circuit can be improved. It has the effect of improving.
第１図は本発明によって形成された酸化膜の膜質評価の
結果である。 横軸……酸化炉入炉時のN2ガスとO2ガスの流量化（単位
％）、縦……酸化膜に定電流を印加し、破壊に至るまで
に注入された電荷量（単位C/μm2）。FIG. 1 shows the results of evaluating the quality of an oxide film formed according to the present invention. The horizontal axis ...... oxidizing furnace N 2 gas and O 2 flow rate of gas during Iriro (unit:%), a constant current is applied to the vertical ...... oxide film, the amount of charge injected to up to breakdown (unit C / μm 2 ).
Claims (1)
路のゲート酸化膜形成工程において、酸化炉に入炉する
際に、N2ガスとO2ガスを同時に酸化炉に流入させ、且つ
その比率をN2:O2＝100:1.0〜100:2.0に保つ事を特徴と
する半導体集積回路の製造方法。In a step of forming a gate oxide film of a semiconductor integrated circuit, in particular, a MOS type semiconductor integrated circuit, when entering an oxidation furnace, N 2 gas and O 2 gas are caused to flow into the oxidation furnace at the same time, N 2 : O 2 = 100: 1.0 to 100: 2.0.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31691190A JP2655449B2 (en) | 1990-11-21 | 1990-11-21 | Method for manufacturing semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31691190A JP2655449B2 (en) | 1990-11-21 | 1990-11-21 | Method for manufacturing semiconductor integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04186835A JPH04186835A (en) | 1992-07-03 |
| JP2655449B2 true JP2655449B2 (en) | 1997-09-17 |
Family
ID=18082286
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31691190A Expired - Lifetime JP2655449B2 (en) | 1990-11-21 | 1990-11-21 | Method for manufacturing semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2655449B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100187674B1 (en) * | 1994-07-07 | 1999-06-01 | 김주용 | Reactor for semiconductor device manufacturing and gate oxide film formation method using the same |
| JP2000232222A (en) | 1999-02-10 | 2000-08-22 | Nec Corp | Method for manufacturing semiconductor device |
-
1990
- 1990-11-21 JP JP31691190A patent/JP2655449B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04186835A (en) | 1992-07-03 |
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