JP2653099C - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]   The present invention relates to an active matrix panel formed using a thin film transistor.
About. [Conventional technology]   The conventional active matrix liquid crystal panel is described in the document
Pages 156 to 157, B / W and color LC video displays
Rest by Polysilicon Tefties ”(Morozumi et al.)
A pixel matrix using a film transistor is formed on a transparent substrate,
The gate line driver circuit and the source line driver circuit are made of M
As shown in FIG. 19, the active matrix panel is formed of an OS integrated circuit.
It was external. In FIG. 19, reference numeral 1 denotes an active matrix panel.
, The active matrix panel 1 has a pixel matrix 2. 3 is flexible
This is a shibble substrate on which the driver integrated circuit 4 of single crystal silicon is mounted.
You. Active matrix panel 1 and flexible substrate 3 are connected to pad 5
It is connected. The mounting substrate 6 electrically connects the driver integrated circuit 4 and an external circuit.
Not only connect, but also flexible substrate 3 and active matrix panel 1
It is mechanically held. [Problems to be solved by the invention]   The conventional active matrix panel has the following problems. (1) High definition was hindered   Conventionally, as shown in FIG.
The source line or the gate line of the channel 1 is connected at the pad 5 and the mounting technology
The pixel pitch is limited by the pad space that can be connected above. For this reason,
Mass-produces active matrix panels having a pixel pitch of 100 μm or less
This was very difficult and prevented high definition. (2) Miniaturization of the display device was hindered   A conventional active matrix panel as shown in FIG.
Since the integrated circuit was externally attached, the external dimensions of the mounting
About 4 to 5 times or more than that of the metal part 2. For this reason, the traditional active
The size of a display device using a matrix panel is a pixel matrix that contributes to display.
The size of the camera must be large for its area.
-This was a factor limiting the application to ultra-small monitors such as viewfinders. (3) Manufacturing cost was high   When manufacturing a display device, the active matrix panel 1 and the flexible substrate 3
Connecting the driver integrated circuit 4 and the flexible substrate 3
And a process of mounting the flexible substrate 3 and the mounting substrate 6 is required.
Had to be high. (4) Low reliability   Connection between active matrix panel 1 and flexible substrate 3, collection of drivers
There are many connection points such as connection between the integrated circuit 4 and the flexible substrate 3 and stress is applied to them. Connection strength is insufficient at the connection points, and the entire display device
The reliability was low. Or it took a lot of money to secure enough reliability
.   The present invention solves the above problems, and has high definition, compactness, and excellent reliability.
It is an object of the present invention to provide an inexpensive active matrix panel. In addition,
Ming's active matrix panel is used for video camera electronic viewfinders and mobile phones.
It is intended to be applied to a monitor of a belt-type VTR and the like. In addition, a projection display
It is also intended to be used as a light valve. [Means for solving the problem]   According to the present invention, in order to solve the above-described problem, liquid crystal is not sealed between a pair of substrates.
A plurality of gate lines and a plurality of source lines on one of the pair of substrates;
A polysilicon thin film transistor connected to the plurality of gate lines and source lines;
In an active matrix panel in which a pixel matrix having
A signal is supplied to each of the plurality of gate lines and source lines on the one substrate.
Forming at least one of a gate line driver circuit and a source line driver circuit
To form the gate line driver circuit or the source line driver circuit.
Shift register and buffer circuit, the shift register is a complementary type
With clocked inverter circuit composed of polycrystalline silicon thin film transistor
A static shift register, and the buffer
A plurality of gate lines or source lines based on a signal transmitted through a circuit.
A signal is supplied to the gate line driver circuit or the source line driver circuit.
The wiring layers connecting the polycrystalline silicon thin film transistors to be formed are provided with the plurality of silicon thin film transistors.
Aluminum or aluminum silicide made of the same layer as
And the gate line driver circuit or the source line driver circuit is a complementary type.
Polycrystalline silicon thin film transistor of the first conductivity type polycrystalline silicon thin film transistor
The island of the silicon thin film layer and the island of the polycrystalline silicon thin film layer of the second conductivity type thin film transistor
Has a layout staggered between the positive power supply wiring and the negative power supply wiring
It is characterized by the following.   Further, according to the present invention, a liquid crystal is sealed between a pair of substrates, and one of the pair of substrates is provided.
A plurality of gate lines and a plurality of source lines, and the plurality of gate lines and a A pixel matrix having a polycrystalline silicon thin film transistor connected to a ground line
In the active matrix panel arranged, the one substrate has the
Gate line driver circuit that supplies signals to each of a plurality of gate lines and source lines
And at least one of a source line and a source line driver circuit are formed.
A driver circuit or a shift register and a bus constituting the source line driver circuit;
In the buffer circuit, the shift register is a complementary polycrystalline silicon thin film transistor.
Stator having inverter circuit and transmission gate circuit comprising star
A static shift register, and the buffer
A plurality of gate lines or source lines based on a signal transmitted through a circuit.
A signal is supplied to the gate line driver circuit or the source line driver circuit.
The wiring layers connecting the polycrystalline silicon thin film transistors to be formed are provided with the plurality of silicon thin film transistors.
Aluminum or aluminum silicide made of the same layer as
And the gate line driver circuit or the source line driver circuit is a complementary type.
Polycrystalline silicon thin film transistor of the first conductivity type polycrystalline silicon thin film transistor
The island of the silicon thin film layer and the island of the polycrystalline silicon thin film layer of the second conductivity type thin film transistor
Has a layout staggered between the positive power supply wiring and the negative power supply wiring
It is characterized by the following. 〔Example〕   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.   FIG. 1 shows an embodiment of the present invention. The figure shows a complementary metal oxide film made of silicon thin film.
Semiconductor Structure (Complementary Metal Oxide Semi)
abbreviated as CMOS structure. ) Source line driver
The circuit 12, the gate line driver circuit 21, and the pixel matrix 22 have the same transparency.
Block diagram showing structure of active matrix panel 11 formed on substrate
It is. The source line driver circuit 12 includes a shift register 13 and a thin film transistor
(Thin Film Transistor; hereinafter abbreviated as TFT).
Sample and hold circuits 17, 18, 19, and video signal buses 14, 15
, 16 and the gate line driver circuit 21 includes a shift register 20 and a buffer.
-23. Further, the pixel matrix 22 includes the source line driver circuit 12.
To A plurality of connected source lines 26, 27, 28 and a gate line driver circuit 21 are connected.
A plurality of gate lines 24 and 25 connected to each other and formed at intersections of source lines and gate lines.
A plurality of pixels 32 and 33 are included. The pixel includes a TFT 29 and a liquid crystal cell 30,
The liquid crystal cell 30 includes a pixel electrode, a counter electrode 31, and liquid crystal. In addition, the shift register
Other circuits having a function of sequentially selecting a source line and a gate line,
For example, a counter and a decoder may be substituted. Source line driver
The input terminals 34, 35 and 36 of the circuit are connected to the clock signal CLX and the star, respectively.
Signal DX, video signal V₁, V_Two, V_ThreeIs input to the gate line driver circuit.
Clock signals CLY and start signal DY are input to input terminals 37 and 38, respectively.
Is forced.   The shift register 13 and the shift register 20 shown in FIG.
Static or dynamic circuit with complementary TFT composed of FT, or
Can be configured as a dynamic or static circuit with a unipolar TFT
. Of these, considering the device performance of the TFT, the complementary TFT
Tick-type circuits are best. The reason is explained as follows. In general,
TFTs used for active matrix panels are made of polycrystalline or amorphous
Since it is formed of silicon thin film, metal oxide film semiconductor field effect by single crystal silicon
As compared with a transistor (hereinafter abbreviated as MOSFET), its on-current
Is small and its off-state current is large. The reason for this is that the traps
Carrier density is much higher than that in single crystal silicon
And recombination of carriers frequently in reverse-biased PN junctions
Depending on what happens. In view of the device characteristics of such TFTs,
Therefore, the present invention employs a static shift register using complementary TFTs.   (1) Since the TFT has a large off-state current, the dynamic
The operating circuit has a narrow operating voltage range, operating frequency range, and operating temperature range.   (2) Dry to take advantage of the low power consumption of active matrix liquid crystal panels
The bar circuit needs to be formed with a low power consumption CMOS structure.   (3) On-state current required compared to unipolar MOS dynamic shift register
The flow value can be small.   FIG. 2A shows an example of a circuit structure of the shift registers 13 and 20 in FIG.
In FIG. 2 (a), inverters 41 and 42 are connected to P as shown in FIG. 2 (b).
It comprises a TFT 47 and an N-type TFT 48. In addition, clocked inverter 43 and
And 46 are p-type TFTs 49 and 50 and n-type TFTs 51 and 5 as shown in FIG.
The clock signal CL is supplied to the gate of the N-type TFT 52 by the P-type TFT 49.
, The inverted clock signal CL is input to the gate. Similarly, a clocked inverter
44 and 45 are composed of P-type TFTs 53 and 54 and N-type TFTs 55 and 56,
The inverted clock signal CL is applied to the gate of the TFT 56 and the gate of the P-type TFT 53 is applied to the inverted clock signal CL.
The lock signal CL is input. In FIG. 2A, the clocked inverter 4
Instead of 3 and 46, an inverter 57 and N-type TFTs 58 and P shown in FIG.
Using a circuit composed of an analog switch composed of a TFT 59 and a clock
The inverters 60 and N-type T shown in FIG.
A circuit composed of an FT61 and an analog switch composed of a P-type TFT62 is used.
You can use it.   As described above, the driver circuit in the active matrix panel is
It is very useful to use a TFT having an OS structure. However, the prior art is simply T
Complementary TFT integrated circuits obtained by applying to FT have the following disadvantages.
Have. (1) The manufacturing method for integrating both a P-type TFT and an N-type TFT on the same substrate is complicated
And the manufacturing cost increases. (2) P with uniform characteristics, which is an important element for configuring a complementary TFT integrated circuit
It is difficult to form an N-type TFT and an N-type TFT. (3) P-type TFT and N-type TFT have sufficient driving capability to realize a driver circuit.
Not equipped.   In the present invention, the manufacturing method, the device structure, the device dimensions, the material, and the like are modified.
This overcomes the above problems. Hereinafter, they will be described step by step.   FIG. 3A shows the source line driver circuit 12 and the gate line driver shown in FIG.
FIG. 3 (b) shows an example of the sectional structure of the complementary TFT constituting the circuit 21 in FIG.
1 shows an example of a cross-sectional structure of a TFT and a pixel constituting a pixel matrix 22. Fig. 3 7A, reference numeral 71 denotes an insulating substrate such as a glass or quartz substrate, on which a P-type T
The FT99 and the N-type TFT 100 are formed. 73 and 76 are channel regions
Silicon thin films 72, 74, 75 and 77 serve as source regions or drain regions.
72, 74 are P-type doped with impurities, and 75, 7
7 is N-type doped with impurities. 78 and 79 are SiO_Two, Silicon Nitra
80, 81 are polycrystalline silicon, metal, metal silicide
A gate electrode made of SiO 2, etc .;_Two83 is made of metal or the like.
Wiring layer 84 is SiO_TwoThe reference numeral 85 denotes a passivation film. one
On the other hand, in FIG. 3B showing the cross-sectional structure of the pixel matrix, reference numeral 86 denotes
) Is the same insulating substrate as 71, on which the pixel TFT 101 and the ITO (indium
And a pixel electrode 94 made of a transparent conductive film such as um-tin-oxide.
ing. 87, 88 and 89 are 72, 73, 74, 75, 76 and 7 in FIG.
7 is formed of the same silicon thin film layer, 88 is a channel region, 87 and 8
Reference numeral 9 denotes a source region or a drain region. Regions 87 and 89 are not P-type or N-type.
It is purely doped, and the configuration of impurities contained in those regions is the regions 72 and 7.
4 or the configuration of the impurities contained in the regions 75 and 77. 90 is 78, 7
9, a gate insulating film made of the same layer as that of the gate insulating film 91;
Electrode 92, an interlayer insulating film made of the same layer as 82, 93 is made of the same layer as 83
95, an insulating film consisting of the same layer as 84; 96, a liquid crystal; 97, a transparent conductive film;
The counter electrode 98 including the electromembrane layer is a transparent substrate. Here, the driver circuit is configured
The TFTs 99 and 100 and the pixel TFT 101 are formed in a source / drain region and a channel.
The tunnel region, gate insulating film, gate electrode, and interlayer insulating film are each formed of the same thin film layer.
Has been established. In addition, source line driver circuits and gate line driver circuits
The connection between the TFTs is made of a metal such as aluminum which has a low sheet resistance.
The source line in the pixel matrix is formed of the same layer as the layer 83.
Only the pixel electrode 94 is formed of a transparent conductive film layer of ITO or the like.
Is done. The wiring layer (93) is made of aluminum or aluminum silicide,
When the conductive film layer (94) is formed of ITO, an interlayer insulating film is formed between the two layers.
If the structure is not provided, the through holes (102, 103) opened in the same process
) Between the two different layers (93, 94) and the silicon thin film layers (87, 89).
It can be used for connection, and the manufacturing process is simplified. Where aluminum
Aluminum and ITO are processed with different etchants, and ITO is aluminum
Taking advantage of the property that it is not immersed in the etching solution of
A film is formed and a pattern is formed in the previous step. In FIG. 3B, the insulating film 95 is made of a liquid.
A capacitor for preventing DC voltage from being applied to the crystal 96.
It must be sufficiently large compared to the value of the elementary capacitance, so that its film thickness is constant (eg,
(For example, about 3000 °). Meanwhile, to ensure moisture resistance
As shown in FIG. 3 (a), the driver circuit is set to a certain value (for example, about 1 μm) or more.
It is necessary to cover with a passivation film 85 having a thickness of Passivation film 8
No. 5 is formed by forming a film on the entire surface of the active matrix substrate and then removing it while leaving the driver portion.
The most effective method is to form the passivation film.
85 is a material processed with an etchant that does not immerse the insulating films 84 and 95, for example,
It is composed of polyimide or the like.   The manufacturing method of the present invention and the structural features of the complementary TFT obtained thereby.
Will be described below. Fabrication of CMOS integrated circuit using conventional single crystal silicon
According to the method, as compared with the manufacturing process of an integrated circuit using one polarity, for example, an N-type MOSFET.
At least four photo steps (low concentration P well formation step, P type stopper layer formation step, P
MOSFET source / drain formation process, N-type MOSFET source / drain
An additional step is required. On the other hand, according to the present invention, a unipolar TFT
By adding at least one photo process compared to the manufacturing process of the integrated circuit, the complementary T
An FT integrated circuit is realized.   4 (a) to 4 (d) show the manufacturing process of the active matrix panel of the present invention.
An example of the main part is shown. First, as shown in FIG.
After depositing a capacitor thin film, a desired pattern is formed and the channel region of the P-type TFT is formed.
A region 111 and channel regions 112 and 113 of the N-type TFT are formed. Then heat
The gate insulating films 114, 115, and 116 are formed by an oxidation method or a vapor deposition method, and
Then, gate electrodes 117, 118, and 119 are formed. Next, as shown in FIG.
Implant acceptor impurities 120 such as boron over the entire surface using ion implantation No. The implanted acceptor impurities are activated by a subsequent heat treatment and become acceptors.
A P-type semiconductor is formed. Thereby, the source / drain region 121 of the P-type TFT is formed.
, 122 are formed. At this time, it should be the source / drain region of the N-type TFT
Acceptors are also added to the regions 123, 124, 125, 126. Next, the fourth
As shown in FIG. 3C, a P-type TFT is covered with a mask material such as a photoresist 128, for example.
Then, a donor impurity 127 such as phosphorus or arsenic is removed from the acceptor impurity 120.
Drive in high concentration. The implanted donor impurities are activated by a subsequent heat treatment to form a donor impurity.
Becomes If the dose of the ion-implanted acceptor impurity is 1 × 1
0¹⁵cm^-2The donor impurity dose is 3 × 10¹⁵cm^-2If so, the area 123
, 124, 125 and 126 have a dose of 2 × 10¹⁵cm^-2Only donors corresponding to
It is almost equivalent to being included. Thus, the source / drain region 123 of the N-type TFT is obtained.
, 124, 125, 126 are formed. Next, as shown in FIG.
After removing the mask material 128, an interlayer insulating film 129 is deposited, and a through hole is opened.
The pixel electrode 131 is formed of a transparent conductive film, and the wiring 130 is formed of metal or the like.
You. As described above, the P-type TFT 132, the N-type TFT 133, and the pixel
An N-type TFT 134 forming a pixel TFT in the ris part is completed. The pixel matrix
Of course, it is also possible to form the TFT of the portion in a P-shape. Obtained in this way
In a TFT, a P-type TFT contains an acceptor impurity in a source / drain region.
, N-type TFTs have an acceptor impurity in the source / drain region and the acceptor impurity.
Contains a higher concentration of donor impurities.   In the above manufacturing process, the acceptor impurity 120 shown in FIG.
In the object 120, the donor impurity 127 of FIG.
2D, the N-type TFT 132 and the P-type TFTs 133, 1
34 is obtained. The N-type TFT thus obtained is doped in the source / drain regions.
P-type TFTs include donor impurities and the donor impurities in the source / drain regions.
-Contains a higher concentration of acceptor impurities than impurities.   According to the above-described manufacturing method, the manufacturing process of the unipolar TFT integrated circuit is performed as shown in FIG.
By adding only one photo step required for forming the mask pattern 128 of c),
A complementary TFT integrated circuit is formed. This allows the driver circuit to be built in. An active matrix panel can be realized. From an economic point of view,
Of course, the method is best, but acceptor impurities and donor impurities
Adopting a method of forming a mask pattern in each step of ion implantation
No problem. In addition, the complementary TFT integrated circuit manufactured by the method described above
Each TFT is isolated on an insulating substrate in the form of an island.
No process is required. Furthermore, unlike integrated circuits using single crystal silicon, parasitic MOS
No FET occurs, and there is no need to form a channel stopper.   Next, a P-type TFT and an N-type TFT having the same characteristics necessary for forming a complementary integrated circuit are described.
The means for realizing the TFT will be described. Conventionally, using II-VI group compound semiconductor
TFTs have been known for a long time. However, for two reasons: (1) In compound semiconductors, it is the fact that both P-type and N-type conductivity types are controlled and realized.
It is impossible. (2) It is extremely difficult to control the interface between the compound semiconductor and the insulating film, and the MOS structure
Not realized. Therefore, a complementary TFT cannot be realized using a compound semiconductor. Follow
In the present invention, the source / drain region and the channel region are formed by a silicon thin film.
I do. Among the silicon thin films, amorphous silicon thin film and polycrystalline silicon thin film
Table 1 shows the carrier mobilities for each conduction type. From the table, the TFT
The characteristics of both the P-type and N-type are easy to match, and the current supply capability of the TFT is large.
In order to realize a complementary TFT integrated circuit, it is necessary to use polycrystalline silicon thin film.
It can be said that the membrane is optimal.   Next, supply of current to TFTs, especially P-type and N-type TFTs constituting a driver circuit
The means employed by the present invention to enhance performance will be described. As mentioned earlier,
TFTs with non-single-crystal silicon thin films have a high trap density,
It has the characteristic that the ON current is small and the OFF current is large as compared with the MOSFET. Fifth
The figure shows the gate length, gate width, and source / drain voltage V_DSAre measured as the same
140 of a single crystal silicon MOSFET and characteristics of a TFT using a silicon thin film
141 is shown. In the figure, the horizontal axis represents the gate voltage V with respect to the source._GS
The vertical axis represents the source-drain current I_DsIs the relative value of As can be seen from the figure, TF
Since T has a low on / off ratio, it is connected to the pixel matrix TFT 29 in FIG.
Each of the TFTs constituting the driver circuits 12 and 21 is formed to an optimum element size.
I have to do it. For example, if you intend to display NTSC signals,
The element matrix TFT must satisfy the following equation within the operating temperature range.
No. Where C₁Is the total pixel capacity of one pixel, R_{ON 1}, R_OFF1Is the on-resistance of each TFT
Anti-off resistance. Equation (1) is a holding condition for an arbitrary pixel.
If added, 90% or more of the written charge is held over one field.
Expression (2) is a writing condition for an arbitrary pixel. If this condition is satisfied,
99% or more of the desired display signal is written to the pixel. On the other hand, the driver circuit
The TFT to be formed must satisfy the following expression within the operating temperature range. Where C_Two, C_ThreeAre added to nodes 142 and 143 in FIG.
Capacity, R_{ON 2}, R_{ON 3}Is the output resistance of the clocked inverter 43 and the inverter 41
, F is the clock frequency of the shift register, and k is a constant. (The value of k is empirical
In other words, it is about 1.0 to 2.0. ) For actual measurement and simulation of applicant
According to this, for example, a shift register having a clock frequency f of about 2 MHz is realized.
In order to achieve this, the R_{ON 2}And R_{ON 3}Is the pixel TFT R_{ON 1}Must be 1/10 or less. To realize such low output resistance
In addition, the present invention relates to a TFT gate forming a driver circuit within a limit allowed by a withstand voltage.
G is formed as short as possible. Further, the sample and hold circuit 17 in FIG.
The TFTs forming 18 and 19 are lower than the TFTs forming the shift register 13.
Since the withstand voltage is sufficient, the gate length is shorter than that of the TFT forming the shift register 13.
It forms in this way. FIG. 6 shows the definition of the gate length L, and Table 2 shows each of the components employed in the present invention.
An example of the gate length of a TFT is shown. In FIG. 6, reference numeral 142 denotes a gate electrode;
Is a silicon thin film forming a channel region, 144 is a gate length, and 145 is a gate thin film.
Indicates the port width.   Form a channel region to increase current supply capability of P-type TFT and N-type TFT
Value of the width of the depletion layer in which the thickness of the silicon thin film to be spread can spread on the surface of the silicon thin film
It is more effective to use a means of configuring the TFT so as to be smaller.
. Maximum value X of depletion layer width in P-type TFT using silicon thin film_{P max}, N type TF
The maximum value X of the depletion layer width at T_{N max}Are given by the following equations, respectively. X_{P max}= (2ε · 2φ_fP)^1/2・ (Q ・ N_D)^-1/2        ... (4) X_{N max}= (2ε · 2φ_FN)^1/2・ (Q ・ N_A)^-1/2        ... (5) Here, q is the unit charge, ε is the dielectric constant of the silicon thin film, φ_fP, Φ_fNIs P
Energy of N-type and N-type TFTs, N_D, N_AAre in the channel area Donor density and acceptor density of the sample. The equivalent donor density and
The acceptor density is determined by the density of the donor and acceptor impurities present in the region.
And the trap density acting as a donor and an acceptor. In the present invention, P
The thickness of the silicon thin film in the channel region of the N-type and N-type TFTs is determined by X_{P max}Passing
And X_{N max}It is configured to be smaller than any of the values. In FIG. 7, a depletion layer was formed.
1 shows a cross-sectional structure of a TFT. In the figure, 146 is an insulating substrate, and 147 is a channel.
The silicon thin films 148 and 149 are silicon which indicates source / drain regions.
150, a gate insulating film; 151, a gate electrode;_si, X is it
Denote the thickness of the silicon thin film and the width of the depletion layer formed on the surface of the silicon thin film, respectively.
I have.   Each of the means described above, namely, (1) The circuit type of the driver circuit is different from that of the static type using complementary TFTs.
To do. (2) To devise a manufacturing method and a structure of a complementary TFT integrated circuit. (3) To make the characteristics of P-type and N-type TFT uniform. (4) To enhance the load driving capability of the TFT. To build driver circuits into active matrix panels
Is established.   Next, on the basis of the basic technology described above, it is necessary to make the present invention more effective.
Some means will be described.   First, the pattern in the active matrix panel used in the present invention
Here are some ideas on layout. FIG. 8 shows the layout of each functional block.
FIG. 3 is a plan view of an active matrix panel for explaining the following. The image is a normal image
Look at the active matrix panel 160 as if it were formed
A source line driver circuit 161 (162) is formed in a peripheral portion in the direction of the ground, and
The shift register 163 and the bus are sequentially arranged from the periphery to the center in the line driver circuit.
Buffer 164, video signal bus 165, and sample and hold circuit 166.
You. Further, a gate line driver circuit 167 (around the left and / or right direction peripheral portion) is provided.
170), and are shifted in order from the periphery to the center in the gate line driver. The register 168 and the buffer 169 are arranged. The source line driver circuit
161 (612) and the gate line driver circuit 167 (170).
A pixel matrix 171 is formed at the center of the active matrix panel 160, and
Input / output terminals 172, 173, 174, and 175 are arranged in the corner portion. Signal transmission
Is performed in the direction of arrows 176-180. Layer each function block as above
The most efficient use of the limited space.
You.   Further, in the source line driver circuit and / or the gate line driver circuit,
Within a limited pitch equal to the pixel pitch (or twice the pixel pitch).
In order to form a unit cell of the driver circuit, a pattern layout as shown in FIG. 9 is used.
Use In FIG. 9, reference numerals 181 to 183 denote one pixel (or two pixels).
It is a pixel pitch and its length is D. While adopting the layout shown in Fig. 8,
If the cells of the driver circuit are repeatedly arranged with a cycle of D, a more effective switch can be achieved.
The pace can be utilized. FIG. 9 shows a part of a thin film layer constituting a driver circuit.
3 shows an example of a pattern layout. In the figure, 184 and 185 are
Wiring for positive power supply, wiring for negative power supply, 186 to 191 are the source and
Rain and a silicon thin film forming a channel portion, 192 to 195 are N-type TFT saws.
Region 1 which is a silicon thin film forming a drain / drain and a channel portion and is surrounded by a broken line.
At 96, 197 and 198, unit cells of the driver circuit are formed. Element of each TFT
In silicon separation, silicon thin films are etched into islands regardless of polarity.
Therefore, for example, the island 192 and the P
The distance a between the silicon thin film for the P-type TFT and the island a 187,
The distance b between the two islands 187 and 188 can be made substantially equal. The present invention
Utilizes this property positively and connects the island for P-type TFT and the island for N-type TFT to each other.
Placing them in the insulator increases the degree of integration in the direction in which unit cells are repeated.
You.   The present invention uses the following means in combination to further increase the degree of integration. Fig. 10 (
a) and (b) show a complementary TF between a positive power supply wiring 199 and a negative power supply wiring 200;
This is an example of forming an inverter by T. Referring to FIG. A through hole for forming a contact in the ground portion 203 is a gate electrode. First,
As shown in FIG. 10 (a), a P-type region is formed on one silicon thin film island with 208 as a boundary.
204 and an N-type region 205 are provided. Next, as shown in FIG.
The contact of the drain part is formed by the
Extract data output.   The second measure to make the present invention even more effective is the clutter in the source line driver circuit.
It relates to the reduction of lock noise. As shown in FIG.
The inverter circuit 12 drives the video signal buses 14 to 16 and the shift register 13. Have. Here, the floating capacitance formed between a certain video signal bus and the CL wiring If present, spike noise synchronized with the clock signal is superimposed on the video signal.
As a result, line-shaped display unevenness occurs on the screen of the active matrix panel. Book Thus, the above-described clock noise is reduced. FIG. 11A shows a source line.
A driver circuit is shown, and 210 to 213 are unit cells of a shift register, 2
14 and 215 are sample and hold circuits, 216 is a pixel matrix, and 217 is a video matrix.Is twisted approximately at the center. By doing so, the CL wiring and Are substantially equal, and as a result, the floating capacitance added between the CL wiring and the video signal bus is increased. The rise timing of one and the fall timing of the other almost match
. As a result, the clock noise superimposed on the video signal is greatly reduced.
, No problem.   The third measure to make the present invention more effective is to connect the sample-and-hold circuit in series.
This is related to the uniformization of the resistance added to. FIG. 12 shows a part of FIG. You. In FIG. 12, reference numeral 230 denotes a shift register included in the source line driver circuit.
231 to 233 are video signal buses, and 234 to 236 are sample hold circuits.
The path 240 is a pixel matrix. The three video signal buses 231 to 233
For example, image signals corresponding to the three primary colors red (R), green (G), and blue (B) are transmitted,
These combinations are changed every horizontal scanning. The three video signal buses include:
Since low resistance is required, a metal layer such as aluminum is used as a wiring material. on the other hand
Adopts the structure shown in Fig. 3 (a) and (b), which is considered to be most effective from an economic point of view.
The wiring 23 from the video signal bus to the sample and hold circuit.
Materials 7 to 239 include the same material as the gate electrode, for example, a polycrystalline silicon thin film.
used. In this case, the sheet resistance of the polycrystalline silicon thin film is higher than that of the metal layer.
And if they are simply connected in a straight line, the lengths of the wirings 237, 238, and 239 are equal.
Since the resistances of the wires 237 to 239 are not equal,
The difference in the wiring resistance causes line-shaped display unevenness. Therefore, the present invention provides the wiring
Devise the wiring pattern so that the resistances of 237, 238, and 239 are all equal.
. Specifically, the wiring width W is fixed and the wiring length L is equal, or the wiring 237 to
For example, W is changed for each of H.239.   The fourth measure to make the present invention more effective is the operation of the driver circuit by the TFT.
The present invention relates to a driving method for compensating for a low speed. As shown in FIG.
Since the performance is inferior to the performance of single crystal silicon MOSFET, shift by TFT
The operating speed of the registers is not enough to drive the active matrix panel
Absent. In order to compensate for this slow operation speed, the present invention employs a circuit illustrated in FIG.
The structure and the driving method illustrated in FIG. In FIG. 13 (a), 25
0 is the first shift register included in the source line driver circuit, ... is output. 251 is a second shift register included in the source line driving circuit. The output signals 253, 255,. 265 is supplied with the video signal V
The video signal bus, 256 to 259 are sample and hold circuits, and 261 to 264 are software
And 260 is a pixel matrix. Input to the source line driver circuit. FIG. 13B shows signals 252 to 255 output from the data 250 and 251.
The source line driver circuit shown in FIG.
51, and the shift registers 250 and 251 each have a phase of approximately 90 °. You. If the source line driver circuit has N series shift registers,
The register has N clocks whose phases are shifted by approximately 180 ° / N and their inverted clocks.
It is driven by a hook. If the frequency of CL × 1 and CL × 2 is f, the output signal 25
2 to 255 are sequentially output at a time interval of ４f, and the respective edges 266 to 2
At 69, the video signal V is sampled and held on the source lines 261 to 264.
. As a result, using a shift register driven by a clock of frequency f, frequency 4
f can be realized, and the shift register of the TFT can be realized.
This is an effective means to compensate for the slow operation speed. The source line driver circuit is N-series
Is provided, the shift register driven by the clock of frequency f
It is possible to realize sampling at a frequency of 2Nf by using a star.   The fifth measure to make the present invention more effective is the source line and gate line driver circuit.
Providing test means at each output of the road. FIG. 14 shows a specific example. In the figure
Here, 280 is a shift register included in the source line driver circuit, and 281 is
Video signal bus terminal, 282 is a sample hold circuit, 283 is a source line dry
Bar test circuits 284 and 285 are control terminals of the test circuit 283 and test terminals, respectively.
A signal output terminal 286 is a source line. Text like 283 on all source lines
A strike circuit is added. Reference numeral 287 denotes a shift included in the gate line driver circuit.
Register 288 is a gate line driver test circuit, 289 and 290 are each
Test signal input terminal, test signal output terminal, 291 is a gate line, 292 is a pixel
It is a matrix. A test circuit such as 288 is added to every gate line.
The test circuit operates as follows. During test operation of source line driver circuit
The test circuit 283 is turned on under the control of the terminal 284. In this state,
After inputting a predetermined test signal to the video signal bus terminal 281, the shift register
Scan 280. At this time, a signal within the standard is time-sequentially output to the test output terminal 285.
Out If it is input, the source line driver circuit is determined to be “good”;
Good ". When testing the gate line driver circuit, a predetermined test is applied to the terminal 289.
The shift register 287 is scanned with the strike signal input. At this time, test
If signals within the standard are output in time series to the output terminal 290, the gate line driver circuit
The road is determined to be "good", otherwise it is determined to be "bad". Do as above
This makes it possible to display the test pattern and visually
Inspection of active matrix panels can be performed electrically and automatically.
You.   The sixth aspect of the invention that makes the present invention more effective is that without adding a manufacturing process
That is, a storage capacitor is formed in a pixel. FIGS. 15 (a) and (b) show the present invention.
A specific example of a pixel structure is shown. FIG. 1A shows an equivalent circuit, and FIG. 1B shows a cross-sectional structure.
. In FIG. 3A, reference numerals 300 and 301 denote a source line, a gate line, and 302, respectively.
Denotes a pixel TFT, 303 denotes a liquid crystal cell, 304 denotes a counter electrode terminal, and 305 denotes a main electrode.
Metal oxide semiconductor capacitor (hereinafter abbreviated as MOS capacitor)
You. ) And 306 are gate electrodes of the MOS capacitor 305. In addition, the same figure (
In b), 310 and 324 are transparent insulating substrates, and 311 to 315 are silicon.
Thin film layers 316 and 317 are gate insulating films, 318 and 319 are gate electrodes, 320
Denotes an interlayer insulating film, 321 denotes a wiring layer forming a source line, and 322 denotes a transparent conductive layer forming a pixel electrode.
The electrode layer 323 is a counter electrode including a transparent conductive film layer, and 325 is a liquid crystal. At 326
The pixel TFT 302 is formed in the portion shown, and the regions 311 and 313 are the source TFTs.
The drain portion and the region 312 form a channel portion. In the portion indicated by 327, the M
An OS capacitor 305 is formed, and regions 313 and 315 serve as source / drain portions.
, Region 314 forms a channel portion. As is apparent from FIG.
The capacitor 305 has the same cross-sectional structure as the pixel TFT 302, and
No special manufacturing process needs to be added to form S capacitor 305
. However, in order to use the MOS capacitor 305 as a storage capacitor, the region 3
It is necessary to keep a state in which a channel, that is, an inversion layer is formed in 14. Keep this state
Therefore, the gate electrode 306 of the MOS capacitor 305 is
A predetermined potential such that the data is turned on is given. The predetermined potential is, for example, a MOS key.
Japashita A positive power supply potential is appropriate for the N type, and a negative power supply potential is appropriate for the P type. Gate excellence
Since the edge film is usually formed to be very thin, the holding key is formed using the gate insulating film as described above.
By configuring the capacitor, it can be compared with the conventional one using an interlayer insulating film.
As a result, a storage capacity of 5 to 10 times per unit area can be obtained, and the storage capacity can be reduced.
This is very effective in saving the area for forming. Therefore, active matrices
The aperture ratio of the panel can be made extremely high.   The last step to make the present invention even more effective is an active device with a built-in driver circuit.
It relates to mounting of a matrix panel. Fig. 16 (a) and (b) show the components.
Show body examples. FIG. 3A is a diagram showing a cross-sectional structure.
Transparent substrate on which matrix and driver circuit are formed, 331 has counter electrode formed
334 is a sealing material, 333 is a sealed liquid crystal, and 335 is a mounting substrate.
The plate 340 is an opening of the mounting board 335, and 338 is a wire made of metal such as gold or aluminum.
And 339, a protection member. The transparent substrate 330 is disposed on the mounting substrate 335.
Providing the concave portion 336 in the portion to be secured ensures the connection strength by the wire 338.
It is very effective in running. Further, a light shielding member 337 is provided on a part or all of the mounting board.
The transparent substrate 331 or the transparent substrate 330 surrounds the periphery of the pixel matrix portion.
Providing the light shielding member 332 in a strip shape in a simple shape is
This is very effective in improving the appearance as a display device. FIG. 16 (b)
The active matrix panel and its mounting structure in FIG.
It is. Reference numeral 341 denotes a pixel matrix portion, and a dotted line 342 denotes an opening of the mounting substrate 335.
Show mouth. The following effects are produced by the above-described operations. First, metal
Since the stress applied to the ear 338 becomes uniform, the connection strength is improved. Second, the origin
A light source is installed on the back using a light active matrix panel as a transmissive display device.
In this case, according to the above-described structure of the present invention, unnecessary light is
Is prevented from leaking, and the appearance of the display device is improved.   Finally, two application examples of the present invention will be described.   One application example is configured using the active matrix panel of the present invention.
Electronic view finder (Electric View Fi
ndr; hereinafter abbreviated as EVF). Make sure to take many measures as described above. And integrated driver circuit with complementary TFT around pixel matrix
Technology has been established, and small, high-definition, low power consumption and highly reliable
FIG. 17 shows an example in which the active matrix panel can be obtained at a low cost.
EVF having such a structure can be realized. In FIG. 17, reference numeral 350 denotes an image
352, a recording device; 351, a video signal processing circuit;
An image signal is obtained. 353 is an EVF, and the EVF 353 is a chroma circuit and a synchronous circuit.
Control circuit, LCD panel drive signal formation circuit, power supply circuit, backlight drive circuit
A driving circuit unit 354, a backlight light source 356, a reflection plate 355, and a diffusion plate.
357, polarizing plates 358 and 360, and the active matrix panel 3 of the present invention.
59 and a lens 361. By performing the above, the conventional C
RT (Cathode Ray Tube) using EVF which is not in the following
The effect is brought. (1) Using an active matrix panel with color filters
Therefore, an extremely high-definition color EVF having a pixel pitch of 50 μm or less is realized.
. In addition, lower power consumption is promoted. (2) An extremely small, space-saving and extremely lightweight EVF is realized. (3) The degree of freedom of the shape of the EVF is increased, for example, a novel design such as a flat EVF.
Becomes possible.   Another application is an active matrix panel of the present invention using a liquid crystal light bulb.
This is a projection type color display device used as a projector.   FIG. 18 is a plan view of the projection type color display device. Projection of halogen lamps, etc.
The white light emitted from the imaging light source 370 is condensed by the parabolic mirror 371, and
Heat rays in the infrared region are cut by the filter 372, and only visible light is dichroic.
Into the mirror system. First, the blue reflecting dichroic mirror 373
Reflects blue light (light having a wavelength of approximately 500 nm or less) and other light (yellow
Light). The reflected blue light changes its direction by the reflecting mirror 374 and is turned blue.
The light enters the modulation liquid crystal light valve 378.   The light transmitted through the blue reflecting dichroic mirror 373 is reflected by the green reflecting dichroic mirror.
Incident on the mirror 375, and emits green light (approximately 500 nm to 600 nm). Red light (approximately 600 [nm]) that reflects other wavelengths.
Of the above wavelength). The reflected green light is a green modulated liquid crystal light valve 3
It is incident on 79.   The red light transmitted through the green reflecting dichroic mirror 375 is reflected by the reflecting mirror 376.
377, and the light is incident on the red modulation liquid crystal valve 380.   Blue light, green light, and red light were driven by blue, green, and red primary color signals, respectively.
The liquid crystal light valves 378, 379 by the active matrix panel of the present invention,
After being modulated by 380, they are combined by the dichroic prism 383.
You. The dichroic prism 383 has a blue reflecting surface 381 and a red reflecting surface 382 that are alternated.
They are configured to be orthogonal to each other. The color image synthesized in this way is
384, the image is enlarged and projected on the screen and displayed. Do as above
Thus, there is no necessity in a projection type color display device using a conventional CRT projection tube.
The following effects are obtained. (1) Form a liquid crystal light valve much smaller and more precise than a CRT
Because it is possible to use a small aperture lens for the projection lens 384,
Is done. As a result, the size, weight, and cost of the projection color display can be reduced.
Is done. (2) Since the active matrix panel of the present invention has a high aperture ratio, it has a small aperture.
A bright display can be obtained by using the projection lens of the above. (3) Unlike the CRT projection tube, the dichroic mirror and the dichroic
Perfect alignment of red, green, and blue light valves with back prism
Therefore, the three-color registration is very good.   This concludes the description of the embodiment of the present invention.   According to the above-mentioned [Means for Solving the Problems] and [Example],
The effect will be described.   First, the effects of the four basic technologies that make the present invention effective will be described.
I do.   First, a gate line made of complementary TFTs on the same transparent substrate as the pixel matrix
The following effects can be obtained by integrating the driver circuit of the source line. It is. (1) Depending on the connection pitch when mounting an external driver integrated circuit,
The definition is not limited. As a result, by using the present invention,
A liquid crystal panel having a pixel pitch of 50 μm or less can be realized. (2) The external dimensions of the mounting board on which the panel is mounted are greatly reduced, and the liquid crystal of the present invention is used.
Small, thin, and lightweight display devices using panels are promoted. (3) Since the step of externally attaching the driver integrated circuit is not required, the liquid crystal panel of the present invention is not required.
Cost reduction of a display device using a channel is promoted. (4) Since the external mounting of the driver integrated circuit is not required, the liquid crystal panel of the present invention is used.
The reliability of the display device is improved. (5) A liquid crystal panel is formed by forming a driver circuit using complementary TFTs.
The synergistic effect with the low power characteristics inherent in the display device is exhibited, and the power consumption of the entire display device is reduced.
Is realized. This is applied to EVF of video cameras and portable image monitors.
It is an important factor to make it possible.   Second, the complementary TFT is used, and the shift register is a static type circuit.
By adopting a circuit configuration, not only low power consumption but also operating voltage range and operating frequency range
This has the effect of expanding the enclosure. TFT has high off-current characteristics as shown in Fig. 5.
And the temperature characteristics of off-state current are also large. The disadvantage of such a TFT is that
The operating voltage range and operation are compensated for by the static configuration of the resistor.
The frequency range is extended.   Third, in the structure of the complementary TFT, the source / drain of the TFT of the first polarity is used.
The source / drain region of the TFT of the second polarity contains impurities of the first polarity in the drain region.
The region contains a first polarity impurity and a higher concentration of a second polarity impurity.
By using this method, a single photo step can be added to the conventional unipolar TFT manufacturing process.
By adding, complementary TFT integrated circuits including pixel matrices can be produced at low cost.
can get. Further, P-type and N-type TFTs having uniform characteristics can be obtained.   Fourth, the gate length of the TFT that constitutes the driver circuit constitutes the pixel matrix
The operating speed of the driver circuit can be increased by forming the TFT shorter than that of the
To maintain the optimum writing and holding operation for each pixel. Becomes possible.   Next, the effects provided by the seven means for making the present invention more effective will be described.
I do.   First, the pattern layout of each functional block is shown in FIG. 8, FIG. 9, and FIG.
By adopting (a) and (b), the degree of integration of the driver circuit portion is particularly increased.
The unit cell of the driver circuit within the limited pitch of the pixel pitch.
Can be included.   Second, the clock wiring of the source line driver circuit is arranged as shown in FIG.
By removing clock noise mixed into the video signal,
It is possible to suppress the line-shaped display unevenness to a level that is not visible.   Third, the resistance connected to the sample and hold circuit shown in FIG.
And the write level of the display signal to all the source lines can be reduced.
Complete uniformity can be achieved, and line-shaped display unevenness is eliminated.   Fourth, the source line driver circuit is configured as shown in FIG.
), An N-sequence driven by a clock of frequency f
Sampling a video signal at a frequency of 2Nf using a shift register of
It becomes possible. This makes it possible to use TFTs whose on-current is not always large enough.
Thus, an active matrix panel with a built-in driver circuit with high definition is realized.   Fifth, test circuits should be provided for each output of the driver circuit as shown in FIG.
Therefore, the active mask, which was visually inspected while the test pattern was displayed in the past, was
The inspection of the trick panel can be performed electrically and automatically.   Sixth, it is necessary to create a storage capacitor having a structure as shown in FIGS. 15A and 15B in each pixel.
Thus, the aperture ratio can be almost reduced without increasing the manufacturing cost.
Without the above, it is possible to more reliably hold the electric charge in each pixel.
.   Seventh, by making the mounting structure as shown in FIGS. 16 (a) and (b)
Not only can improve the connection strength and reliability, but also the active matrix of the present invention.
When a transmissive display device is constructed by using a backlight device together with a
Unnecessary light can be prevented from leaking from around the trix section.   Finally, the effect obtained by applying the present invention to a specific display system is described. I will talk about it.   First, by applying the present invention to the EVF of a video camera, the conventional CR
The following effects not provided by EVF using T are obtained. (1) Using an active matrix panel with color filters
Therefore, an extremely high-definition color EVF having a pixel pitch of 50 μm or less is realized.
. In addition, lower power consumption is promoted. (2) An extremely small, space-saving and extremely lightweight EVF is realized. (3) The degree of freedom of the shape of the EVF is increased, for example, a novel design such as a flat EVF.
Becomes possible.   Second, by applying the present invention to a projection type color display device, the conventional
The following effects that are not available in the case of using T are obtained. (1) Form a liquid crystal light valve much smaller and more precise than a CRT
Therefore, it is permissible to use a small-diameter projection lens. This
Therefore, the projection type color display device can be reduced in size, weight, and cost. (2) Since the active matrix panel of the present invention has a high aperture ratio, it has a small aperture.
A bright display can be obtained by using the projection lens of the above. (3) Unlike the CRT projection tube, the dichroic mirror and the dichroic
Optical prisms for the red, green and blue light valves
Therefore, the registration of three colors becomes very good. 〔The invention's effect〕 (A) The shift register is composed of complementary polycrystalline silicon thin film transistors
This makes it possible to drive with low power consumption,
However, a high-performance transistor can be supplied. (B) Polycrystalline silicon thin film transistors are compared with single crystal silicon transistors.
Although the leakage current at the time of off is large, the shift register
Static shift register using polycrystalline silicon thin film transistor
Accordingly, high-speed operation can be performed while suppressing the influence of the leak current at the time of turning off.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing an embodiment of the present invention, that is, an active matrix panel in which a driver circuit is integrated around the active matrix panel. FIGS. 2A to 2F are diagrams showing a detailed configuration example of the driver circuit in FIG. 3 (a) and 3 (b) are diagrams illustrating the cross-sectional structure of the active matrix panel of the present invention. 4 (a) to 4 (d) are diagrams illustrating a method for manufacturing an active matrix panel of the present invention. FIG. 5 is a diagram showing a characteristic example of a TFT according to the present invention in comparison with that of a single crystal silicon MOSFET. FIG. 6 is a diagram showing definitions of a gate length and a gate width in this specification. FIG. 7 is a diagram showing definitions of a depletion layer width and a silicon thin film thickness in this specification. FIG. 8, FIG. 9, FIG. 10 (a), (b) are diagrams for explaining the first means for making the present invention more effective. FIGS. 11 (a) and (b) are diagrams for explaining a second means for making the present invention more effective. FIG. 12 is a diagram for explaining a third means for making the present invention more effective. 13 (a) and 13 (b) are diagrams for explaining a fourth means for making the present invention more effective. FIG. 14 is a diagram for explaining a fifth means for making the present invention more effective. FIGS. 15 (a) and (b) are views for explaining sixth means for making the present invention more effective. FIGS. 16 (a) and (b) are views for explaining seventh means for making the present invention more effective. FIG. 17 is a diagram showing a first application example of the present invention. FIG. 18 is a diagram showing a second application example of the present invention. FIG. 19 is a diagram for explaining a conventional technique.

Claims (1)

Claims: (1) A liquid crystal is sealed between a pair of substrates, and a plurality of gate lines and a plurality of source lines, and a plurality of gate lines and a plurality of source lines are provided on one of the pair of substrates. In an active matrix panel in which a pixel matrix having a polycrystalline silicon thin film transistor connected to a source line is arranged, a gate line driver for supplying a signal to each of the plurality of gate lines and source lines is provided on the one substrate. At least one of a circuit and a source line driver circuit is formed. Of the shift register and the buffer circuit included in the gate line driver circuit or the source line driver circuit, the shift register includes a complementary polycrystalline silicon thin film transistor. A static shift register having a clocked inverter circuit; A signal is supplied to the plurality of gate lines or source lines based on a signal transmitted from the tick shift register via the buffer circuit, and the gate line driver circuit or the polycrystalline silicon thin film transistors constituting the source line driver circuit are supplied. Aluminum or aluminum silicide made of the same layer as the plurality of source lines, and the gate line driver circuit or the source line driver circuit is formed of a complementary type polycrystalline silicon thin film transistor. A layout in which islands of the polycrystalline silicon thin film layer of the one conductivity type thin film transistor and islands of the polycrystalline silicon thin film layer of the second conductivity type thin film transistor are alternately arranged between the positive power supply wiring and the negative power supply wiring An active matrix panel characterized by the following. (2) A projection display device using the active matrix panel according to claim 1. (3) A view finder using the active matrix panel according to claim 1. (4) Liquid crystal is sealed between a pair of substrates, and a plurality of gate lines and a plurality of source lines and a plurality of gate lines and a plurality of source lines are connected to one of the pair of substrates. An active matrix panel in which a pixel matrix having a polycrystalline silicon thin film transistor is arranged, a gate line driver circuit and a source line driver circuit for supplying a signal to each of the plurality of gate lines and source lines on the one substrate. At least one of the shift register and the buffer circuit constituting the gate line driver circuit or the source line driver circuit, wherein the shift register is an inverter circuit and a transmission gate circuit comprising a complementary polycrystalline silicon thin film transistor A static shift register having A signal is supplied to the plurality of gate lines or source lines based on a signal transmitted from the static shift register through the buffer circuit, and the gate line driver circuit or the polycrystalline silicon thin film transistors forming the source line driver circuit are supplied. Aluminum or aluminum silicide made of the same layer as the plurality of source lines, and the gate line driver circuit or the source line driver circuit is formed of a complementary type polycrystalline silicon thin film transistor. A layout in which islands of the polycrystalline silicon thin film layer of the one conductivity type thin film transistor and islands of the polycrystalline silicon thin film layer of the second conductivity type thin film transistor are alternately arranged between the positive power supply wiring and the negative power supply wiring An active matrix panel characterized by the following. (5) A projection display device using the active matrix panel according to claim 4. (6) A viewfinder using the active matrix panel according to claim 4.