JP2615655B2 - Recording device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording apparatus that records an image signal, and more particularly, to a recording apparatus that converts one screen of an image signal into a plurality of screens and records the same.

[Conventional technology]

Conventionally, signals obtained by two systems of camera inputs are simultaneously recorded on the same recording medium, and when reproduced, each of the two systems of reproduced images can be observed only with one eye corresponding to the observer. A configuration for realizing stereoscopic viewing by using a mask using a shutter is known. In this case, in order to simultaneously record signals of two systems, it is necessary to reduce the amount of image data by half.
Thinning every other field.

When a normal image is reproduced from a signal recorded for a stereoscopic image in this way, the signals of one system are decimated every other field, and the vertical resolution is halved.
The image quality was maintained by adding a decimated field to only one system signal to make the data amount 3/2 in total.

[Problems to be solved by the invention]

However, in the conventional configuration, the vertical resolution of the observable stereoscopic image is halved, and the frame frequency is also halved.
Therefore, the reproduced image has a lower image quality and more flicker than a normal image, and a long-term observation involves a great deal of visual fatigue.

Therefore, an object of the present invention is to provide a recording apparatus capable of recording an image signal having a low vertical resolution such as a stereoscopic image with higher quality and quality.

[Means for solving the problem]

The recording apparatus according to the present invention is configured such that one screen receives an image signal having a predetermined information amount, and information of 1 / n of the predetermined information amount is formed in such a format that each screen of the image signal is interlaced. Conversion means for converting into n screens having an amount and outputting as n-system image signals, and compressing the information amount of the n-system image signals output by the conversion means, each of which is 1 / n of a predetermined rate Compression means for obtaining compressed image signals of n systems at a rate; synthesizing means for synthesizing the compressed image signals of the n systems obtained by the compression means to obtain a synthesized image signal of the predetermined rate; It is characterized by comprising a recording means for forming a predetermined number of helical tracks per period and selectively recording one system of the image signal of the predetermined rate and the synthesized image signal obtained by the synthesizing means.

[Action]

Since the present invention has the above-described configuration, it is possible to record an image signal without lowering the vertical resolution.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a configuration example of a recording and reproducing apparatus for a stereoscopic image using one embodiment of the present invention.

In FIG. 1, double scan cameras 101 and 102 convert a 525 lines × 60 frames / sec image signal (referred to as double scan signal) to a 3D encoding circuit in accordance with a synchronization signal supplied from a dual system simultaneous recording / reproducing device (VTR) 104. Supply to 103. 3D
In the encoding circuit 103, the selection circuit 108 switches two double scan signals in frame units in accordance with the synchronization signal from the VTR 104, and the A / D converter 109 converts the double scan signal into a digital signal and supplies the digital signal to the interlace conversion circuit 110. The interlace conversion circuit 110 performs an interlace conversion of the double scan signal into an odd field and an even field, and
For example, an odd field signal is applied to two input terminals of R104.
An even field signal is supplied to ch1 to ch2. That is, VTR1
04 is the double scan selected by the 3D encoding circuit 103
A frame signal from one of the cameras 101 and 102 is divided into ch1 and ch2 and recorded simultaneously. The details of this simultaneous recording will be described later.

The two output signals reproduced from the VTR 104 are supplied to a 3D decoding circuit 105. The reproduction operation of the VTR 104 will be described later. Three
In the D decoding circuit 105, a 2-channel reproduction signal, which is a field-divided double scan signal from the VTR 104, is converted into a one-frame double scan signal by the scan converter 111, and the analog double scan signal is converted by the D / A converter 112. And supplies it to the double scan monitor 106. Three
The 3D glass driver circuit 113 of the D decode circuit 105 is a VTR
The 3D glasses 107 are driven in accordance with the vertical synchronization signal from 104. The 3D glass is a stereoscopic image observation device having, for example, left and right independent liquid crystal shutters. For example, when the image of the camera 101 is displayed on the monitor 106, the right shutter is opened and the image of the camera 102 is displayed. Sometimes the left shutter opens, causing the camera 101,
The image 102 is made to enter independently.

When an image recorded as a stereoscopic image is reproduced on a normal screen, the 2D decoding circuit 114 is used. That is, the selection circuit 116 switches between the ch1 output of the VTR 104 and the signal obtained by delaying the ch2 output by one field by the field delay circuit 115 on a field basis, thereby interlacing the image of the camera 101 or the image of the camera 102 independently. It can be extracted as a signal. This interlace signal may be converted into an analog signal by the D / A converter 117 and applied to the NTSC monitor 118.

In the above-described configuration, a three-dimensional image having a three-dimensional depth can be recorded by capturing the images with the double scan cameras 101 and 102 at an interval equal to, for example, the parallax of the human right and left and recording the images in the VTR 104. Further, in contrast to the conventional three-dimensional image display device displaying a field image with a vertical resolution of 262 lines per eye, the reproduced image according to the above-described embodiment can obtain 526 frame images with one eye. You can enjoy high-quality stereo images with no reduction in resolution.

FIG. 2 shows a specific configuration example of the VTR 104. VTR shown
Has an operation mode including a standard mode in which image quality is prioritized and a long time mode in which recording time is prioritized, in addition to a two-system input recording mode that enables recording and reproduction of a stereoscopic image. In the standard mode, the switches 22 and 58 are connected to the a contact, in the long time mode, are connected to the b contact, and in the dual input recording mode, the switches 22 and 58 are connected to the c contact.
Connect to contacts. Since the operation in the standard mode and the operation in the long-time mode are not directly related to the present invention, the explanation will be omitted except for the relevant parts. FIG. 4A shows a recording format in the standard mode.
One field of the Hz video signal is recorded on four tracks. In the long time mode, recording is performed only by the heads 36 and 37, and the recording format is as shown in FIG. 4 (b).

In the two-system input recording mode, the switches 22 and 58 are connected to the c-contact. The video signal input to the input terminal 10A is decimated by the sub-sampling circuit 14A at a field offset or a line offset into a signal having a sampling rate of 2f _sc (where f _sc is the color subcarrier frequency of the NTSC system). The data is compressed and applied to the scale / index (S / I) coding circuit 16A to reduce the data amount by half.

The S / I encoding circuit 16A is a circuit that performs scale / index encoding, and the MIN-MAX method is generally famous.
In the MIN-MAX method, an image is divided into blocks, and the maximum value and the minimum value in the block are equally divided and quantized. By transmitting an index indicating which quantization level belongs to each pixel and further transmitting the maximum value / minimum value as a scale component, it is possible to reproduce the quantization representative value on the receiving side.
For example, 16 (= 4 × 4) pixels are defined as one block, the maximum value / minimum value is each 8 bits as a scale component, and all 16 pixels are assigned a 3-bit index obtained by dividing the interval between the maximum value / minimum value into eight. As a result, the information amount of 128 bits / block when all 16 pixels are quantized with 8 bits can be reduced to half (64 (= 2 × 8 + 16 × 3) bits / block).

The signal whose data amount has been halved by the S / I encoding circuit 16A is time-axis-compressed by the time-axis conversion circuit 18 as shown in FIG. On the other hand, input terminal 10
The video signal of ch2 of B is subjected to the same processing as the video signal of the input terminal 10A by the sub-sampling circuit 14B and the S / I encoding circuit 16B, and then supplied to the synthesizing circuit 20. The synthesizing circuit 20 includes a time axis conversion circuit and a switching circuit, and synthesizes both inputs. The synthesized signal has the same data rate as the output of the sub-sampling circuit 14A, and is supplied to the distribution circuit 24 via the switch 22.

The distribution circuit 24 distributes the signal from the switch 22 to two systems. The signals distributed to the two systems by the distribution circuit 24 are supplied to the switches 30A and 30B via ECC encoding circuits 26A and 26B and modulation circuits 28A and 28B, respectively. ECC encoding circuits 26A, 26
B performs processing such as addition of an error detection / correction code and interleaving, and the modulation circuits 28A and 28B convert the signals into signals having a small DC component suitable for digital recording.

32 to 35 are recording amplifiers, 36 to 39 are heads, and 40 is a magnetic tape. The switches 30A and 30B are switched at a and b contacts every 1/120 second. The arrangement of the magnetic heads 36 to 39 is shown in FIG. In FIG. 2, reference numeral 72 denotes a rotating head drum. 2 (a) is a plan view of the rotary drum 72 as viewed from above, and FIG.
FIG. 40 is a layout view of heads 36 to 39 as viewed from the side of FIG. Head 36
37 form a pair head, the head 36 has + azimuth, and the head 37 has -azimuth. As shown in FIG. 2 (b), its height is equivalent to one track pitch ( _TP ). Only different. The heads 38 and 39 also have the same relationship as the heads 36 and 37, and these two pairs of heads face each other at an interval of 180 degrees. The rotating head drum 72 rotates at 3,600 rpm, and the magnetic tape 40 is wrapped around its outer periphery for about 180 °.

The synthesizing circuit 20 supplies the ch1 video signal to the pair heads 36 and 37 and supplies the ch2 video signal to the pair heads 37 and 38, while the ch1 signal is not supplied ( The signal of ch2 is compressed on the time axis to T _{1 to} T ₂ , T _{3 to} T ₄ ,... In FIG. 5, and the signal of ch 1 shown in FIG. 5 (2) and the signal of ch 2 shown in FIG. The signal is switched to a signal of the standard mode data rate shown in FIG. 6 (1). The recording format of the magnetic tape is the same as in the standard mode, as shown in FIG.

Reproduction will be described. Signals reproduced from the magnetic tape 40 by the magnetic heads 36 to 39 are applied to switches 48A and 48B via reproduction amplifiers 44 to 47. The switches 48A and 48B are switched between the a-contact and the b-contact at a 1/120 second cycle, as in the case of recording. The detection circuits 50A and 50B are composed of a waveform equalizing unit, a clock reproducing unit, and a discriminating unit. The discriminating unit compares "0" and "1" with a bit time obtained from the clock reproducing unit. Determine. Demodulators 52A and 52B are detection circuits 5
The outputs of 0A and 50B are demodulated, and the ECC combining circuits 54A and 54B perform error detection / correction and deinterleave processing. The synthesis circuit 56
The outputs of the ECC composite circuits 54A and 54B are combined and output as one system signal.

The output of the synthesizing circuit 56 is supplied to the distribution circuit 60 via the c contact of the switch 58. The distribution circuit 60 includes a switching circuit and a time axis conversion circuit, outputs a reproduction signal from the heads 36 and 37 to the time axis conversion circuit 62, and expands the reproduction signal from the heads 38 and 39 on the time axis to perform S / I Output to the decoding circuit 64B. The time axis conversion circuit 62 extends the input signal on the time axis. The S / I decoding circuit 64A decodes the output data of the time axis conversion circuit 62 into a representative value of 8 bits per sample, performs block raster conversion, and outputs the result. The interpolation circuit 66A interpolates the data decimated by the sub-sampling circuit 14A. S / I decoding circuit
The same processing as described above is performed in the 64B and the interpolation circuit 66B.

As another embodiment of the present invention, 262 lines × 60 fields /
Using two cameras that output a second image signal (hereinafter referred to as an NTSC signal), an image of 262 × 120 fields / second (hereinafter, referred to as NTSC signal)
A configuration for recording and displaying a double cycle image) will be described.

FIG. 6 is a block diagram of the recording / reproducing system.
The SC cameras 601 and 602 supply the NTSC signal to the 3D encoding circuit 603 according to the synchronization signal supplied from the 3D encoding circuit 603. However, the synchronization signal supplied to the camera 602 is
Delayed by a delay circuit 609 by 1/2 of the field period. As a result, the field signals output from the cameras 601, 602 are shifted by 1/120 second as shown in FIG. 7 (a). The NTSC signals supplied to the 3D encoding circuit 603 are converted into digital signals by A / D converters 606 and 607. The output of the A / D converter 606 is delayed by 1/120 second by the field memory 608. Therefore, the output signals of the cameras 601 and 602 are synchronized and the two-channel simultaneous recording / reproducing device (VT
R) Applied to 104 and recorded. The configuration of the VTR 104 is the same as that of the VTR 104 in FIG.

At the time of reproducing a stereoscopic image, two outputs of the VTR 104 are supplied to a 3D decoding circuit 604. In the 3D decoding circuit 604, the signals of the two channels are stored in field memories 610 and 611 for speed conversion and then doubled from the VTR 104. Switching is performed in units of fields by the selection circuit 612 according to the vertical synchronization signal having a period, and is applied to the D / A converter 613 as a double period signal. The D / A converter 613 supplies the analog signal output to the double period monitor (262 lines × 120 fields / second) 605. Switching by the selection circuit 612 is performed by capturing camera output (that is, VTR10).
The recording is performed according to the delay relationship at the time of (recording at 4), and the display on the double cycle monitor 605 is as shown in FIG. 7 (b).

The 3D glass driver circuit 614 of the 3D decoding circuit 604 is
At the same time, the 3D glasses 615 are driven and controlled according to the double-period vertical synchronization signal from the VTR 104. The 3D glasses 615 open and close the shutters of the left and right eyes in synchronization with the switching by the selection circuit 612, as in the embodiment, and allow the observer to observe a reproduced image as shown in FIG. 7 (a).

When it is desired to observe a normal image, one of the two outputs of the VTR 104 is selected by the selection circuit 616, converted into an analog signal by the D / A converter 617, and applied to the NTSC monitor 618.

In the embodiment of FIG. 6, since the image viewed with one eye is the same as that of the current NTSC system at 262 lines × 60 fields / sec, a stereoscopic image display with less flicker can be realized.

The present invention is not limited to the above embodiment,
By simultaneously recording a plurality of signals in consideration of binocular parallax, for example, signals such as computer graphics images can be displayed three-dimensionally. In addition, by using a projector, a display, or the like that can simultaneously display polarized light for each channel, a stereoscopic image can be observed with polarized glasses having different left and right polarization angles.

〔The invention's effect〕

As can be seen from the above description, according to the present invention, an image signal having a low vertical resolution can be recorded with high quality.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of a dual-system simultaneous recording / reproducing apparatus 104 shown in FIG. 1, FIG. FIG. 5 is a diagram showing a recording track pattern of a magnetic tape, FIG. 5 is a timing chart of head switching, FIG. 6 is a block diagram showing a configuration of another embodiment, and FIG. 7 is a display timing example of FIG. 101, 102: double scan camera, 103, 603: 3D encoding circuit, 104: two-system simultaneous recording / reproducing device (VTR), 10
4,604 …… 3D decoding circuit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Shin Shimokoriyama 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Soichi Kashida 770 Shimonoge, Takatsu-ku, Kawasaki-shi, Kanagawa Canon Tamagawa Works Co., Ltd. (56) References JP-A-62-84681 (JP, A) JP-A-60-28388 (JP, A)

Claims (1)

(57) [Claims] An image signal having a predetermined amount of information is input to one screen, and one screen of the image signal has an information amount of 1 / n of the predetermined information amount in a format in which each screen is interlaced. converting means for converting the image data into n screens and outputting as n-system image signals; and compressing the information amounts of the n-system image signals output by the converting means, each of which has n of 1 / n of a predetermined rate. Compression means for obtaining a compressed image signal of a system; synthesizing means for synthesizing the compressed image signals of the n systems obtained by the compression means to obtain a synthesized image signal of the predetermined rate; Recording means for forming a number of helical tracks and selectively recording one system of the image signal of the predetermined rate and the synthesized image signal obtained by the synthesizing means.