JP2604129B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device used for input protection of a semiconductor integrated circuit, for example.

[0002]

2. Description of the Related Art In a semiconductor integrated circuit, electrostatic breakdown of an element which occurs during an assembly process on a user side often poses a serious problem. This occurs when an excessive voltage is applied to the pins of the IC during the assembly process, which often causes the destruction of internal elements.

FIG. 7 shows a configuration of an input protection circuit used to prevent such an electrostatic breakdown. An input protection circuit is provided between an input pad 11 to which an external input signal is supplied and a first-stage transistor Q1 of an internal circuit. Has a protection resistor R1 made of a polycrystalline silicon layer and a protection N-channel transistor Q
2 are provided. The drain of the protection N-channel transistor Q2 is connected to a connection point between the protection resistor R1 and the gate of the transistor Q1,
The gate and source of transistor Q2 are grounded.

Next, the operation of the input protection circuit having such a configuration will be described with reference to the sectional structure of the input protection N-channel transistor Q2 shown in FIG. An excessive voltage is applied to the input pad D0, and the potential dropped by the protection resistor R1, that is, the potential V1 supplied to the drain 12 of the N-channel transistor Q2 is the junction breakdown voltage of the junction surface between the drain 12 and the P-type substrate 10. (Su
When the voltage is equal to or higher than the rf-breakdown voltage, breakdown occurs at the NP junction surface between the N ⁺ diffusion layer, which is the drain 12 of the transistor Q2, and the P-type substrate 10, and a large amount of holes are generated in the P-type substrate 10. When the potential of the P-type substrate 10 raised by the holes becomes higher than the ground potential by the forward voltage drop of the PN junction between the P-type substrate 10 and the source 11 (N ⁺ diffusion layer), these holes become Flow out to the source. As a result, the N-channel transistor Q2 operates as an NPN bipolar transistor and discharges a high voltage supplied from the outside.

Therefore, the gate voltage of the transistor Q1 in the first stage of the internal circuit is equal to the drain voltage of the transistor Q2.
Is maintained below the breakdown voltage at the junction surface between the transistor Q1 and the P-type substrate 10, so that the gate oxide film breakdown of the transistor Q1 is protected.

As described above, the input protection circuit has a structure in which an excessive voltage is prevented from being applied to the gate of the transistor Q1 in the first stage of the internal circuit by breaking down the NP junction of the protection transistor Q2. .

Recently, for the purpose of high integration of semiconductor devices, miniaturization of internal circuit elements and miniaturization of input protection transistors have been promoted. However, with the miniaturization of such elements, a problem has arisen that the NP junction of the transistor Q2 is easily broken by heat generated at the time of breakdown of the input protection transistor Q2.

This is because, when a breakdown occurs at the NP junction surface 121 between the N ⁺ diffusion layer serving as the drain 12 of the protection transistor Q2 and the P-type substrate 10, heat generated at the junction surface is generated by the drain electrode. When the temperature of the aluminum reaches its melting point, the aluminum at the contact portion with the drain 12 is melted by this heat, and the aluminum becomes N along the direction of current flow. ^{+ The} aluminum that flows out of the surface of the diffusion layer
Is reached, the drain electrode 14 is short-circuited, and as a result, the PN junction is destroyed.

[0009] Such a junction breakdown caused by the dissolution of aluminum occurs before the PN junction breakdown due to the concentration of electrolysis because the melting point of aluminum is low, so that the element is miniaturized and the breakdown voltage of the PN junction is reduced. It was very difficult to achieve both. In particular, LDD (Lightly
Doped Drain) transistor or GDD
In the case where a transistor having a (Guarded Doped Drain) structure is used as an input protection transistor, such junction breakdown due to dissolution of aluminum is more likely to occur. This is because these LDD and GDD transistors have a low impurity concentration in the vicinity of the drain in order to prevent the conductance from being deteriorated by channel hot electrons. .

Such an LDD or GDD structure is a technique which will be widely used in semiconductor integrated circuits in the future to ensure the reliability of operation with a single power supply of 5 [V]. The problem of joint failure due to melting has become even greater.

[0011]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and it is an object of the present invention to improve the point that junction breakage due to dissolution of aluminum is apt to occur in a conventional semiconductor device. It is an object of the present invention to provide a semiconductor device having high electrostatic withstand voltage by preventing the junction breakdown due to the dissolution of aluminum most efficiently from the viewpoint.

[0012]

In order to solve the above-mentioned problems, a PN junction surface, which is a source of heat, is formed apart from an aluminum electrode so that the aluminum electrode is not affected by heat. However, simply forming them apart from each other unnecessarily increases the element area. Therefore, in the semiconductor device according to the present invention, attention has been paid to the point that the PN junction breakdown of the drain region is caused by the dissolution of aluminum due to heat generated at the PN junction interface between the drain region and the substrate. Not only the PN junction on the source side but also the PN junction on the field insulating film side for element isolation are formed by melting P
Paying attention to the fact that it acts as a heat source causing N junction breakdown, the drain region of the field transistor is made larger than the source region, and the drain electrode is arranged at the center of the drain region. Is improved.

[0013]

In the semiconductor device having the above-mentioned structure, the source region can be formed finely, and the withstand voltage against the PN junction breakdown due to the dissolution of aluminum can be improved in the drain region. Therefore, PN junction destruction due to dissolution of aluminum can be suppressed most efficiently, and miniaturization of the element and its withstand voltage can be effectively realized.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment in which an N-channel MOS transistor is used as an input protection transistor. FIG. 1A shows a pattern plane thereof, and FIG. The cross-sectional structure along the line II is shown.

That is, an element region is formed on the P-type semiconductor substrate 21 by utilizing the field insulating film 22, and the surface of the substrate 21 in the element region is provided with a source 23 made of an N ⁺ diffusion layer. And the drain 24 are formed separated from each other. A gate electrode 26 is formed on a semiconductor substrate 21 corresponding to a channel region between the source 23 and the drain 24 via a gate insulating film 25.
Are formed.

Source electrode 27 and drain electrode 28
Are formed on the regions of the source 23 and the drain 24, respectively. In this case, the distance between the drain electrode 28 and the gate electrode 25, that is, the distance between the drain electrode 24 and the exposed portion of the PN junction interface between the substrate 21 and Are in contact with the drain 24 in a state separated from the normal design standard value. This is because the bonding surface 24
This is to prevent the aluminum that forms the drain electrode 28 from being melted by the heat generated in Step 1, and the distance between the gate electrode 26 and the drain electrode 28 as shown in FIG. That is, the drain electrode 2 is exposed from the exposed portion of the PN junction interface between the drain electrode 24 and the substrate 21.
8 based on the withstand voltage characteristics of the PN junction with respect to the distance to the contact position.

That is, as is apparent from this figure, the withstand voltage characteristic against breakdown of the PN junction caused by the thermal melting of aluminum and reaching the semiconductor substrate depends on the distance between the gate electrode 26 and the drain electrode 28. The breakdown voltage is improved to a certain level, but thereafter becomes saturated and hardly depends on the distance. This is because if the distance is longer than a certain value, the influence from the heat source is almost eliminated. Further, as the distance becomes longer, the opposing effects such as an increase in the amount of heat generated due to an increase in the resistance value of the drain diffusion layer increase.

For this reason, even if the distance between the drain electrode 28 and the gate electrode 26 is made larger than the value corresponding to the above-mentioned saturated state, the element area is increased but the distance has no effect on the prevention of dissolution of aluminum. Therefore, the drain electrode 28 and the gate electrode 26 are set apart by a distance corresponding to the vicinity of the saturation state.

Therefore, as described above, the gate electrode 2
By forming the transistor such that the distance between the gate electrode 6 and the drain electrode 27 is separated by a distance corresponding to the vicinity of the saturated state of the withstand voltage characteristic of the junction, miniaturization of the element and its withstand voltage can be realized most efficiently.

Further, since heat is also generated on the bonding surface 242 near the field insulating film 22 as in the bonding surface 241, the drain electrode 28 is formed substantially at the center of the N ⁺ diffusion layer forming the drain 24. Is preferred.

FIG. 3 shows an example in which the present invention is applied to a field transistor in which a thick gate insulating film is formed by a field insulating film 31 and an interlayer insulating film 32 and a drain electrode and a gate electrode are shared. Showing,
FIG. 3A shows the pattern plane, and FIG.
(B) shows a cross-sectional structure along the line II-II.

Also in this case, heat is generated at the time of breakdown due to the bonding surface 24 between the drain 24 and the substrate 21.
3, the drain region 24 is set to be larger than the source region 23 as shown in FIG. 3, and the drain electrode is separated from the fields 22 and 31 by a predetermined distance. It is provided in the center of.

FIG. 4 shows an example in which a diode is used for input protection. FIG. 4 (A) shows a pattern plane thereof, and FIG. 4 (B) shows a line III-III. The cross-sectional structure along is shown.

That is, an element region is formed on the P-type semiconductor substrate 41 by the field insulating film 42.
An N ⁺ diffusion layer 43 is formed in this element region, and this N ⁺
The diffusion layer 43 and the P-type substrate 41 form a diode.

In the diode having such a configuration,
N ⁺ diffusion layer 43 which generates the most heat during breakdown
By forming the electrode 44 at the center of the N ⁺ diffusion layer 43 at a predetermined distance from the bonding surfaces 431 and 432 of the substrate 41 and the substrate 41, it is possible to effectively prevent the junction breakdown due to the dissolution of aluminum. .

FIG. 5 shows an example of input protection using a diode and the internal resistance of a diffusion layer constituting the diode. FIG. 5A shows a pattern plane thereof, and FIG. B) shows the cross-sectional structure along the line IV-IV.

That is, an element region is formed on the P-type substrate 51 by the field insulating film 52, and an N ⁺ diffusion layer 53 is formed in this element region. And this N
^{On the} diffusion layer 53, two electrodes 54 and 55 are formed at positions separated from each other. The electrode 54 is connected to the input pad 11, and the electrode 55 is connected to the gate of the transistor Q1 in the first stage of the internal circuit. ing. In this case, the electrode 54
Is a P which is composed of an N ⁺ diffusion layer 53 and a P-type substrate 51.
It is formed at a predetermined distance from the junction surface 531 where the heat is most generated when the N-junction diode breaks down.

That is, as can be seen from FIG.
The distance from the electrode 54 to the field 53 on the right side thereof and the distance from the upper and lower fields 52 to the electrode 53 are determined by the
5 is greater than the distance from field 5 to the left.

Although the structure of the element used for input protection has been described above, the present invention can be applied not only to input protection but also to an output buffer as shown in FIG.

The output buffer shown in FIG. 6 includes a P-channel type MOS transistor Q11 and an N-channel type M transistor.
In this case, if the structure as shown in FIG. 1 is applied to the drain of the N-channel transistor Q12 to which the output pad D1 is directly connected, the junction breakdown due to the dissolution of aluminum Can be prevented.

As described above, when the aluminum wiring for supplying the potential from the pad to the element directly or via the resistor contacts the semiconductor region of the transistor or the diode to form an electrode, the above-mentioned semiconductor region is regarded as one side. If the distance between the exposed portion of the PN junction interface and the contact position of the aluminum electrode is set in the vicinity where the breakdown voltage characteristic of the PN junction is in a saturated state, it is possible to efficiently suppress the junction breakdown due to the dissolution of aluminum. become.

In this embodiment, the case where the diffusion layer which is in contact with the aluminum electrode is formed only of the high-concentration layer has been described, but the low-concentration layer is formed around the high-concentration layer such as an LDD or GDD structure. It is needless to say that the present invention can also be applied to the case where is formed.

[0033]

As described above, according to the present invention, by forming the drain region of the field transistor larger than the source region and providing the drain contact at the center of the drain region, the source region can be formed finely. With respect to the drain region, the withstand voltage against PN junction destruction due to the dissolution of aluminum can be improved. Therefore, miniaturization of the element and its withstand voltage can be realized in a well-balanced manner. Also, when forming a resistive element, the distance from the electrode on the pad side to the field is made longer than the distance from the electrode connected to the gate to the field to balance the miniaturization of the element and its withstand voltage. It will be able to be realized well.

[Brief description of the drawings]

FIG. 1 is a configuration diagram illustrating a semiconductor device according to one embodiment of the present invention.

FIG. 2 is a graph showing a breakdown voltage characteristic of a PN junction with respect to a distance between a gate electrode and an aluminum electrode.

FIG. 3 is a diagram showing another embodiment of the present invention.

FIG. 4 is a diagram showing another embodiment of the present invention.

FIG. 5 is a diagram showing another embodiment of the present invention.

FIG. 6 is a diagram showing another embodiment of the present invention.

FIG. 7 is a diagram showing a circuit configuration of an input protection circuit.

FIG. 8 is a diagram showing a conventional transistor structure used for an input protection circuit.

[Explanation of symbols]

21: P-type semiconductor substrate, 22: Field insulating film, 23
... source, 24 ... drain, 26 ... gate electrode, 27 ...
Source electrode, 28 ... Drain electrode.

Claims (2)

(57) [Claims] 1. A semiconductor device having an input protection field transistor coupled between an input pad and a reference potential supply terminal, wherein the input protection field transistor is an N type formed in a P type semiconductor region. A source region, an n-type drain region formed in the p-type semiconductor region so as to be separated from the source region and having a larger surface area than the source region; and the semiconductor region surrounding the source region and the drain region. A first field insulating film for element isolation formed in the first region and the drain region and the source region, respectively.
A second field insulating film for forming a field transistor, which is formed between the drain region and the source region so as to surround the same in cooperation with the field insulating film, and has a smaller thickness than the first field insulating film; An interlayer insulating film provided on the second field insulating film so as to reach each of the drain region and the source region, and a distance from each of the first and second field insulating films is equal. A drain electrode disposed at the center of the drain region and formed by an aluminum wiring connected to the input pad; and a source electrode provided on the source region and connected to the reference potential supply terminal. Distances from the drain electrode to the first and second field insulating films are equal, and A semiconductor device, wherein the source region is formed smaller than the drain region. 2. A semiconductor device having a resistance element for input protection coupled between an input pad and a gate of a first-stage transistor, wherein the resistance element is a substantially rectangular N-type formed in a P-type semiconductor region. A diffusion layer; a first field insulating film for element isolation formed in the P-type semiconductor region so as to surround the N-type diffusion layer; and a field insulating film covering the surface of the N-type diffusion layer. A first insulating film having a smaller thickness than the field insulating film; a first aluminum wiring layer provided on the first insulating film and connected to the input pad; A second wiring layer provided on the first insulating film and connected to a gate of the first-stage transistor; and a second wiring layer provided on the N-type diffusion layer on a right end side along a longitudinal direction of the N-type diffusion layer. , The first A first contact electrode connected to the minium wiring layer; and a first contact electrode provided on the N-type diffusion layer on a left end side along the longitudinal direction of the N-type diffusion layer and connected to the second aluminum wiring layer. And a distance from the first contact electrode to the field insulating film located on the right side thereof, and the field insulating film located above and below the first contact electrode, respectively. A distance from the second contact electrode to the field insulating film located on the left side of the second contact electrode.