JP2600454B2 - Semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a structure of a semiconductor device utilizing an interference effect of an electron wave, and more particularly to a structure of a semiconductor device capable of facilitating a manufacturing method thereof. .

(Prior Art) FIG. 6 is an element structure diagram of a semiconductor device according to a conventional technique. Such semiconductor devices have been published by Furuya in the Journal of Applied Physics (J. Appl. Phys.),
Vol. 62, No. 4, p. 1492, 1987. In the figure, 60 is an n ⁺ collector layer, 61 is a p ⁺ collector layer, 62 is an in-plane superlattice layer (grating layer), 63 is a p ⁺ base layer,
64 is a p ⁺ emitter / barrier layer 65 is an n ⁺ emitter layer, 66 is an emitter electrode, 67 is a ground electrode, 68 is a base electrode, 69 is an absorber electrode, and 70 is a collector electrode. The in-plane superlattice layer 62 is formed by a structure in which two types of materials having different electron affinities are alternately arranged at a constant period in the in-plane direction. Such an in-plane superlattice layer is called a grating layer because it functions similarly to a diffraction grating in light for electrons incident in a direction penetrating the plane.

FIG. 7 shows a potential profile on a straight line from the emitter electrode 66 to the n ⁺ collector layer 60 of the semiconductor device shown in FIG. Electrons injected beyond the emitter barrier layer 64 are separated by the grating layer 62 into a transmission component reaching the collector layer 60 and a diffraction component not reaching the collector layer 60.
The diffraction component is absorbed by the absorber electrode 69, and is collected by the collector electrode.
In 70, only the transmitted component flows. When the grating period number is sufficiently large, the electrons directly incident on the grating are diffracted by an angle φ given by the following equation.

Here, d is the grating period, and λ _e is the de Broglie wavelength of the electron. Since the diffraction angle φ is a periodic function with respect to the electron wavelength λ _e , the diffraction angle, that is, the effective collector arrival rate (α) can be modulated by changing λ _e . Where λ _e is the injection energy of the incident electron
It is given as a function of E _inj as _follows :

Here, h is Planck's constant and m ^* is the effective electron mass. Therefore, by changing E _inj by changing the base potential, it is possible to modulate the collector arrival rate α.

(Problems to be Solved by the Invention) In order to obtain a sufficient electron velocity in a semiconductor device having such a structure, the de Broglie wavelength λ _{e of} electrons becomes several hundreds or less, and the period of the grating is about λ _e. Or less, that is, less than several hundreds of square meters. Therefore, the grating layer 62 having a period of about several hundreds of square
It is necessary to build in between. In addition, in order to cause the electron wave interference effect, it is essential to obtain a perfect crystal free from lattice defects that cause scattering of electrons at the base-grating interface, grating-collector interface, and grating. However, realizing such an in-plane superlattice embedded structure is extremely difficult with the current processing technology.

Furthermore, in order to cause the electron wave diffraction At a semiconductor device having such a structure, it is necessary to make the size of an area for controlling the electron wave in the following electronic phase coherence length L _phi. That is, the entire region including the p ⁺ collector layer 61, the grating layer 62, and the p ⁺ base layer 63 must be formed in a size of about _Lφ or less. Here, L _φ depends considerably on temperature and electron mobility, or L _{φ of} n-type GaAs at 4.2K
It is about 0.1 μm and about 0.01 μm at 77K. That is, 100
In a multilayer structure having a thickness and a bottom area of about Å or less, a step of exposing the base layer 63 and the collector layer 61 by etching and making contact with them is required, which is also difficult.

SUMMARY OF THE INVENTION The present invention provides a structure of a semiconductor device capable of facilitating fabrication by realizing an electron wave interference effect by a simple structure.

(Means for Solving the Problems) In a semiconductor device of the present invention, a source electrode and a source electrode are provided on a surface of a semiconductor layer structure in which a non-doped channel layer and a carrier supply layer doped with an n-type impurity are sequentially stacked on a semiconductor substrate.
A semiconductor device in which a drain-in electrode and a gate electrode are provided, and a Schottky electrode is formed on the back surface of the semiconductor substrate, wherein the gate electrode is formed by a point electrode arranged with a period of about the de Broglie wavelength of electrons. In addition to the structure of being connected by a bridge, the contact surface of each point electrode with the semiconductor layer is smaller than the size surrounded by the inelastic scattering length of electrons.

(Function) The buried superlattice structure is not only difficult to fabricate, but also requires a fabrication process of, for example, epitaxial growth → etching → regrowth. Therefore, current processing techniques cause lattice defects that break the coherent state of electron waves. It is almost impossible to obtain good crystals without defects. Such a difficulty would be avoided if a superlattice-like potential could be realized in a region where electrons travel through a Schottky electrode formed on the semiconductor surface. One method that can be considered is to use a two-dimensional electron gas field effect transistor (2DEGFET) as the structure of the semiconductor device.
Alternatively, the channel is depleted by periodically arranged point-like Schottky electrodes having a HEMT) structure. By doing so, it is possible to realize a state in which islands of the depletion layer are arranged at regular intervals in the sea of two-dimensional electron gas (2DEG). Here, the periodic structure of the channel and the potential barrier region immediately below the gate, in which the electron accumulation region and the depletion region are alternately arranged, is 1 deg for 2DEG.
It works as a dimensional grating. Wherein the grating period is sufficient if 100 × 100 Å ² to or at less than the bottom area as the size of the point electrodes hundreds Å each about the same as the electron wavelength. Inelastic scattering length L _φ of 2DEG is 1 even at 77K
Since the length is as long as about μm, the size of this point electrode is sufficiently small to obtain an ideal electron wave interference effect. Further, if a non-doped spacer layer is inserted at the interface between the carrier supply layer and the channel layer, the influence of elastic scattering (ionized impurity scattering) can be eliminated.

Next, a method of modulating the electron wavelength _φ will be described. In the prior art, the de Broglie wavelength of electrons injected into the grating was modulated by providing an emitter barrier layer between the base layer and the emitter layer and changing the potential of the emitter barrier layer via the ground electrode. . FE as in the present invention
The T structure, energy spectrum so take a sharp peak at the Fermi level near de Broglie wavelength electrons corresponding to the Fermi energy E _F involved in the conduction of electrons flow through the grating (= the number of electrons × electron velocity) May be regarded as having. However, drain-source voltage V _ds
Since accelerated by an implantation energy of electrons it will also depend on the V _ds well E _F, Since the Fermi level is a function of the sheet electron concentration n _S ,
It can modulate the electron wavelength depending on varying the semiconductor device n _S according to the present invention. Here, the gate electrode is 1
Since it is used to construct a dimensional grating,
It is possible to easily modulate the electron wavelength by taking a back gate electrode on the substrate side and changing the substrate potential.

Further, since the semiconductor device according to the prior art has a so-called vertical transistor structure in which electrons flow in a direction perpendicular to the semiconductor layer, a step of contacting each semiconductor layer having a multilayer structure of about 100 mm is required. In the present invention, FE
By taking the T structure, such difficulty can be avoided because the electrodes can be taken from the surface.

Furthermore, by using 2DEG having high electron mobility as a carrier, the mean free path of electrons and the inelastic scattering length L _φ
Can be significantly increased, so that the restriction on miniaturization of the device dimensions is relaxed, and the device fabrication is further facilitated. In other words, if devices of the same size are manufactured, it is considered that higher-temperature operation becomes possible than in the past.

Embodiment FIG. 1 shows an element structure of a semiconductor device according to an embodiment of the present invention. Such an element is manufactured as follows. On a non-doped GaAs substrate 1, the following epitaxial layer structure, a non-doped GaAs layer 2 having a thickness of 2000 Å, a non-doped Al _0.2 Ga _0.8 As spacer layer 3 having a thickness of 100 、, and an n-type A having a thickness of 200 Å
l _0.2 Ga _0.8 As layer (doping concentration 3 × 10 ¹⁸ / cm ³ ) 4, 500 nm thick n-type GaAs cap layer (doping concentration 5 × 10
¹⁸ / cm ³ ) grow 5 in order.

On the back surface of the non-doped GaAs substrate 1, a Schottky electrode (back gate electrode) 8 is formed by vapor deposition. n-type Ga
After the source electrode 6S and the drain electrode 6D are formed on the As layer 5 by vapor deposition, ohmic contact is made by alloying. The recess formed except for the n-type GaAs cap layer 5 has a bottom area of 200 × 200 mm by an electron beam exposure method or the like.
^A gate electrode 7 is formed by forming Schottky point electrodes, which are approximately ^two squares, at intervals of 300 °, and wiring these Schottky point electrodes by an air bridge.

FIG. 2 shows a cross-sectional view of the device in a plane along the longitudinal direction of the gate electrode of the embodiment shown in FIG. When a negative potential is applied to the gate, a depletion region exists immediately below the portion in contact with the Schottky gate electrode as shown in the figure, and a synchronous structure of the channel and the depletion layer is formed along the gate.

In the embodiment shown in FIG. 1, when a positive bias is applied between the drain and source and a negative bias is applied between the gate and source, the channel layer (hetero interface between the non-doped GaAs layer 2 and the spacer layer 3) is applied. 3rd potential profile
Shown in the figure. Immediately below the gate, a periodic potential is formed in the longitudinal direction of the gate, forming a one-dimensional grating.
2 electrons between source and gate and between drain and gate
It behaves dimensionally, and under the gate, chemical potentials are connected via periodically arranged point contacts.
As can be readily seen from Figure 3, electrons with the Fermi energy E _F at the source electrode has a kinetic energy E _inj as following directly below the gate.

Here, V _bg is a substrate voltage applied between the back gate electrode and the source electrode. Formula (1), Formula (3), Formula (4)
As is clear from the equation, by changing the back gate voltage V _bg , the electron wavelength λ _e and the diffraction angle φ can be modulated, and thus the drain arrival rate α can be changed.

FIG. 4 is a wiring diagram showing an operation state of the semiconductor device according to the present invention. That is, at the source ground, the drain electrode
A positive voltage V _ds is applied to 6D, and a negative voltage V _gs is applied to the gate electrode 7. Here, the gate electrode V _gs is for realizing a grating structure. The voltage applied to the substrate electrode 8
If V _bg is set, the sheet electron density, that is, the electron wavelength λ _e can be changed by changing V _bg . (1) the diffraction angle φ of the electrons can be seen from equation have immediate, the drain arrival ratio α from becoming a periodic function of the electron wavelength lambda _e, the drain current I _d shows the current-voltage characteristics shown in Figure 5 . As reported by Furuya, since φ becomes a steep function with respect to λ _e, it is expected that a large current amplification can be obtained with a small voltage change, and it is considered that an extremely high transconductance can be obtained.

In the above embodiment, an AlGaAs / GaAs-based 2DEGFET is used.
Although the present invention has been described, the present invention is, of course, applicable to other material-based 2DEGFETs such as an AlGaAs / InGaAs strain-based or AlInAs / GaInAs-based system.

(Effects of the Invention) As is clear from the above detailed description, according to the present invention, a semiconductor device that can utilize the electron wave interference effect by a simple structure can be realized, and its manufacture becomes easy.

[Brief description of the drawings]

FIG. 1 is a view showing an element structure of an embodiment according to the present invention, and FIG.
The figure is a cross-sectional view in the plane along the gate in the embodiment.
FIG. 4 is a diagram showing a potential profile of a channel layer, FIG. 4 is a wiring diagram showing an operation state of the present embodiment, FIG. 5 is a diagram showing current / voltage characteristics in the present embodiment, and FIG. FIG. 7 is a diagram showing an element structure of the device, and FIG. 7 is a diagram showing a potential profile between an emitter and a collector in a conventional example. In the figure, 1 ... non-doped GaAs substrate, 2 ... non-doped GaAs layer, 3 ... non-doped AlGaAs layer, 4 ... n-type Al
GaAs layer, 5 ... n-type GaAs layer, 6S, 6D ... ohmic electrode,
7,8 ... Schottky electrode, 60 ... n-type collector layer, 61
…… p-type collector layer, 62 …… Grating layer, 63 ……
p-type base layer, 64... p-type emitter barrier layer, 65... n
Type emitter layer, 66 ... emitter electrode, 67 ... ground electrode,
68 ... base electrode, 69 ... absorber electrode, 70 ... collector electrode.

Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical indication H01L 29/812

Claims (1)

(57) [Claims] A semiconductor layer structure having at least a non-doped channel layer and a carrier supply layer doped with an n-type impurity, a source electrode formed on a surface of the semiconductor layer structure; A semiconductor device comprising a drain electrode, a gate electrode, and a Schottky electrode formed on the back surface of the semiconductor substrate, wherein the gate electrode is formed by an air bridge having point electrodes arranged at a period of about the de Broglie wavelength of electrons. And a contact surface of each of the point electrodes with the semiconductor layer is equal to or smaller than a size surrounded by an inelastic scattering length of electrons.