JP2555950B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a Schottky gate FET (Field E).
FF Transistor) manufacturing method.

[0002]

2. Description of the Related Art A Schottky gate F for microwave communication
In ET, the gate length (l _g ) is reduced for higher performance, and the gate-drain parasitic capacitance (hereinafter C _{gd) is used.}
It is extremely important to reduce the parasitic capacitance between the gate and the source (hereinafter referred to as C _gs ).

2A and 2B are cross-sectional views of a semiconductor chip, which are shown in the order of steps for explaining a first conventional method of manufacturing a semiconductor device.

First, as shown in FIG. 2 (a), n which becomes an active layer is formed on a semi-insulating GaAs substrate (not shown).
The SiO ₂ film 9 of the gate electrode forming region after forming the SiO ₂ film 9 is selectively etched to form an opening 10 on the type GaAs layer 1, the SiO ₂ film 9 including the opening 10
A SiO ₂ film 11 is deposited on the surface of the.

Next, as shown in FIG. 2B, SiO ₂
The film 11 is etched back to form Si only on the side surface of the opening 10.
A sidewall spacer is formed by leaving the O ₂ film 11 and the opening 10 is formed.
The surface of the n-type GaAs layer 1 at the bottom of the is exposed. next,
A WSi film is deposited on the surface including the opening 10 and patterned to form a T-shaped gate electrode 7, and a Si ₃ N ₄ film 8 is formed on the surface including the gate electrode 7 as a protective film.

Here, the side wall spacer can form the gate electrode 7 narrower than the first opening 10.
Since the SiO ₂ films 9 and 11 exist under the eaves of the T-shaped gate electrode 7, there is a problem that C _gd and C _gs are large.

FIG. 3 is a sectional view of a semiconductor chip for explaining a second conventional method of manufacturing a semiconductor device.

As shown in FIG. 3, after the gate electrode 7 of FIG. 2B is formed, the SiO ₂ films 9 and 11 are removed by wet etching, and then Si ₃ N is formed on the surface including the gate electrode 7.
_{4 The} film 8 is formed.

[0009]

According to the first method of manufacturing a semiconductor device of the related art, a gate electrode having a small gate length l _g can be formed, but there is a problem that C _gd and C _gs increase. In the manufacturing method of No. 2, there is a problem that the surface of the active layer is exposed to the etching solution and damaged when the insulating film under the gate electrode eaves is removed, resulting in deterioration of characteristics and reliability.

An object of the present invention is to provide a method of manufacturing a semiconductor device which reduces C _gd and C _gs without causing deterioration in characteristics.

[0011]

According to a method of manufacturing a semiconductor device of the present invention, first and second insulating films are sequentially deposited on an active layer formed on a semiconductor substrate, and the second insulating film is formed thereon. Forming a third insulating film having etching characteristics different from those of the film, and selectively anisotropically etching the third insulating film and the middle region of the second insulating film sequentially to form an opening. A step of forming a fourth insulating film or a conductive film having an etching characteristic equivalent to that of the second insulating film on the surface including the opening, and etching back the entire surface to form the fourth insulating film on the side surface of the opening. Leaving the film or conductive film to remove the fourth insulating film or conductive film and the second and first insulating films at the bottom of the opening to expose the surface of the active layer; Deposit and pattern a conductive film that forms a Schottky junction with the active layer Sectional shape configured to include a step of removing the third insulating film after forming the gate electrode of the T-shaped.

[0012]

Next, the present invention will be described with reference to the drawings.

FIGS. 1A to 1G are cross-sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention.

First, as shown in FIG. 1A, a 30 nm thick SiO ₂ film 2 and a 50 nm thick SiO ₂ film 2 are formed on an n-type GaAs layer 1 formed on a semi-insulating GaAs substrate (not shown). The Si ₃ N ₄ film 3 and the SiO ₂ film 4 having a thickness of 400 nm are sequentially deposited and formed.

Next, as shown in FIG. 1B, the upper portions of the SiO ₂ film 4 and the Si ₃ N ₄ film 3 on the gate electrode forming region are selectively and sequentially etched by the RIE method to form Si ₃
An opening 5 up to the middle region of the N ₄ film 3 is formed.

Next, as shown in FIG. 1C, the opening 5
A Si ₃ N ₄ film 6 is deposited to a thickness of 50 nm on the surface including.

Next, as shown in FIG.
By etching back by the IE method, sidewall spacers are formed while leaving the Si ₃ N ₄ film 6 on the side surface of the opening 5, and the bottom Si ₃ N ₄ films 6 and 3 and the Si ₂ film 2 are removed to remove the n type GaAs layer 1 Expose the surface.

Next, as shown in FIG. 1E, the opening 5
A gate electrode 7 having a T-shaped cross-section in which a conductive film made of a WSi film or the like and forming a Schottky junction with the n-type GaAs layer 1 is deposited on the surface including and patterned to reduce the gate length l _g by a sidewall spacer. To form.

Next, as shown in FIG. 1 (f), Si ₃ N
_The SiO ₂ film 4 is removed by wet etching using the ₄ films 3 and 6 as etching stoppers.

Next, as shown in FIG. 1G, a Si ₃ N ₄ film 8 is deposited to a thickness of 100 nm on the surface including the gate electrode 7.

A TiN film may be used instead of the Si ₃ N ₄ film 6.

[0022]

As described above, according to the present invention, the insulating film under the eaves of the gate electrode is removed without exposing the surface of the active layer to the etching solution to reduce C _gd and C _gs and the gate electrode having a small gate length. By forming the, it is possible to realize a method for manufacturing a semiconductor device in which deterioration of characteristics and deterioration of reliability can be realized.

In the Schottky gate FET according to the present invention, a 4G gate insulating film is provided below the gate electrode eaves.
The maximum available power gain at Hz has improved by about 1 dB.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor chip showing the order of steps for explaining a first method for manufacturing a conventional semiconductor device.

FIG. 3 is a cross-sectional view of a semiconductor chip for explaining a second conventional method for manufacturing a semiconductor device.

[Explanation of Codes] 1 n-type GaAs layer _{2, 4,} 9, 11 SiO ₂ film 3, 6, 8 Si ₃ N ₄ film 5, 10 opening 7 gate electrode

Claims (1)

(57) [Claims] 1. A first insulating film and a second insulating film are sequentially deposited on an active layer formed on a semiconductor substrate, and a third insulating film having an etching characteristic different from that of the second insulating film is formed thereon. Step, and anisotropic etching is selectively sequentially performed up to the middle region of the third insulating film and the second insulating film to form an opening, and the surface including the opening is equivalent to the second insulating film. A step of forming a fourth insulating film or conductive film having the etching characteristics described above, and etching back the entire surface to leave the fourth insulating film or conductive film on the side surface of the opening and the fourth insulating film at the bottom of the opening. Removing the film or conductive film and the second and first insulating films to expose the surface of the active layer, and depositing a conductive film forming a Schottky junction with the active layer on the surface including the opening. Patterning to form a gate electrode having a T-shaped cross section, 3. The method for manufacturing a semiconductor device, comprising the step of removing the insulating film of 3.