JP2545508C - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION   Industrial applications   The present invention relates to a data processing apparatus for transmitting a message with a plurality of subscribers.
Data processing for the vehicle, including one bus line interconnecting the subscribers.
And a data processing device for a control system for a vehicle.
.   Conventional technology   In recent years, the functions of vehicles have been significantly improved by electronic control. Digital
Engine electronics, for example, reduce fuel consumption and reduce harmful substances
Emissions were reduced. Braking distance for full braking by anti-lock device
And at the same time the controllability of the vehicle is maintained.   Further functional improvements will be made to the vehicle, especially in the future, especially if the control functions are no longer individually
Not only work on their own, but
Can be. The switching process of an electronically controlled automatic transmission is, for example,
Engine torque is reduced for a short period of time by a corresponding action on the electronic engine control
The wear of the clutch lining is small and the impact
Realized without.   For this reason, the computer for the electronic transmission control unit must be able to accurately determine the correct data at the right time.
It is necessary to transfer the data to the computer for the electronic engine control. today
Until this was achieved by a series of individual signal lines.   However, the number of lines of this type is significant for relatively large systems.
It gets bigger. Therefore, in this case, the high-speed data between the computers installed in the vehicle
Data transfer is required, in which case the computer has a slight connection at the controller-connector
Requires only terminals and the information in the computer is coded
Will be transferred.   For this purpose, the traditional connection of microprocessors, mini-computers and peripherals
Local networks for integration in the control unit, but especially in telecommunication technology applications
Was developed. Therefore, a large number of species for the connection of microcomputers are known in the art.
There are different transmission protocols. For example, DDB [1], IIC [2]
, MUART [3], CSMA [4], SDLC [4], and HDLC [4]
There is.   [1] VALVO, DDB specification   [2] VALVO, Tehnische Informatiónen Fuhr Day
・ Industrie 8111215 (Technische Informationen fuer die Indu
strie 8111215)   [3] INTEL, microprocessor and peripheral handb
1983, Microprocessor and Peripheral Handbook   [4] A. Tannenbaum, Computer Networks, Prentice / Ho
Le International, 1981 (Computer Networks, Prentice / Hall Inte
rnational, 1981)   Problems to be solved by the invention   In the above protocol, the requirements for the control device-coupling in the vehicle are insufficient.
Not considered. 1. Special large data packets are transmitted in communication and computer technology,
The typical length of a data packet in a vehicle is short. Control equipment in the vehicle,
Advantageously between the sensor and the controller the measured values, the intermediate results of the calculation algorithm and
The signals are exchanged in time. Transmission protocol suitable for this application
Development inevitably has other consequences. 2. The controls in the vehicle operate under real-time conditions, i.e., calculation operations and
And control actions are performed within predetermined time intervals while maintaining the steps with the process.
Must be done. This makes the transmission line a short potential for the local network.
After a period of time (typically 200 μs), leave room for important messages
There is a demand that too long a delay must be avoided.   In contrast, the standardized Ethernet-protocol has a high transmission rate of 10 MHz.
Regardless of the transmission speed, the transmission of only one message lasts at least 580 μs.
It takes a long time. Only after this time has elapsed does the bus start transmitting another message.
To be empty. Then, since multiple bus subscribers start transmitting at the same time,
, Causing multiple message collisions in the network. Access Conflicts
All transmitters withdraw access once and finally after statistical latency
This is resolved by starting the transmission. But with this measure,
The returned bus access conflict cannot be ruled out. This allows vehicle control
Reliable adherence to stringent time conditions as is required in is impossible. 3. Vehicles are equipped with a wide variety of different equipment according to user requirements. It is. Therefore, the configuration of the local network and the number of its subscribers are simpler.
Must be changeable by law. In particular, meters already connected to the network
The calculator is not changed when there is no change in the function performed by the calculator
It is important to be able to work with the program. Transmission system is controlled
More than existing, functional connections between devices, other
It must be structured so that no viability needs to be introduced. This key
Requirements are not met by any of the known interface modules.
No.   For example, in a DDB, the sender and receiver addresses of any message
Is specified. Another network that needs data already transmitted on the bus-
When the connection is made, a new address is assigned to the corresponding existing subscriber.
Must be replenished. Additionally, data already transmitted to another subscriber may be
And new subscribers. Not required by logical configuration
Nevertheless, a number of program variants are obtained. 4. Numerous known networks (eg, Intel microprocessor 8044, HDL
According to the so-called master / slave principle)
It works. That is, only one of the subscribers (the master) is
Does not have the right to access. This is necessary if not otherwise
Certain rulings are avoided.   In general, the master characteristic is passed on to all bus-subscribers in turn. But vehicle
This type of method is inconvenient when applied to That is, the subscriber has just
It can only be sent when you have a benefit. This allows for high priority
Waiting time before messages are transmitted may be unacceptably high.
May occur in the state of a rave. 5. The master / slave concept must be considered as is well known in vehicles.
It is also inconvenient in the case of electromagnetic interference. At that time, for example, the transmission right is lost due to a failure
Or by mistake another subscriber may get the transmission right at the same time.   Certainly, it is possible in principle to overcome this type of obstacle, but many hours
(Bus failure time, CPU-calculation time) and cost (hardware / software Hardware), and for this reason, considering the point of real-time processing,
I can't respond. 6. A problem with many known networks is the synchronization of events. An example
For example, by transmitting a message to two or more subscribers.
Sometimes when trying to trigger an action, the message is always exactly the same
Must be received in between. Otherwise, the message is
When transmitting to another receiver in order (point-to-point connection), the same
Temporality cannot be realized in principle. 7. The same message is sent to different receivers in the vehicle network
Often should. If all subscribers receiving a response receive
In such a case, the occupancy of the network is significantly reduced. But this treatment
Is not implemented by known interface modules. 8. Networks in vehicles operate in environments that are significantly more heavily disturbed. I
Therefore, an error detector with good performance is necessary to reduce the possibility of overlooking transmission errors.
The transmission can be repeated if necessary. Sum of each digit
Simple algorithms, such as additional transmission of packets, only detect individual errors.
In the mixed disorder (Bueschelstoerungen) which appears in a bundle which is predominant in one vehicle
Not enough.   Even the relatively expensive protocols known today are not user-level.
Without additional safety programs (eg, multiplex transmission)
No transmission security can be guaranteed. Therefore, the HDLC-protocol
In particular, even individual bit errors are secured by a 16-bit CRC check.
Despite being proved, undetectable, erroneous changes in the message may occur.
You. 9. In order to be able to repeat if there is an error,
The receiver must receive a response from all receivers regarding the correct reception of the message.
No. 6. And 7. In, the message is sent by multiple subscribers at the same time
It was stated that it would be very advantageous to be able to receive. But this
In the case of replies, as in known protocols, separate, sequential It is not allowed to do in messages or partial messages. Response requested
The simultaneous and consistent processing of data by the assigned bus-subscriber is in this case guaranteed.
Not proved. Ten. Obstacles in vehicles often only act locally. Finite transmission of electromagnetic waves
Based on the seeding rate, for example, only a part of the receiver
It can happen that the level that has been changed incorrectly is detected. Therefore multiple
If one subscriber receives one message at the same time,
Receive a valid message and receive a message that has changed partly by mistake
Can occur. Because of this, during this type of failure some subscribers
Have already been processed, so that all bus-subscriber synchronization can no longer be achieved.
Is not allowed to do so. 11． Subscribers connected to the local network receive the message just transmitted.
You have to decide whether you want to trust or not. Real time
This decision must always be made in hardware, based on the
Must be done every time. Known to date for microcomputers
The interface module makes this choice only based on its unique subscriber address
No decision is made.   6. And 7. In addition to the disadvantages of such a procedure already mentioned in
Machines are also heavily loaded with message organization and content-dependent storage.
You. The calculator then interprets the data received by the interface module.
Only when the data is stored in the memory cell assigned depending on the
Is reduced. 12． Depending on the application, to code the data to be transmitted in the vehicle
Different numbers of bits are used. But regardless of the length of the data, these
Data is always transmitted by the interface module and the connected computer.
Must be guaranteed to be handled consistently from start to finish. For example, in the data
Suppose that the storage associated with the contents is performed in several stages, depending on the length of the data.
Then, when computer access and transmission are temporarily superimposed, they have the same meaning (identification code).
Old and new data intermingle unacceptably And must be guaranteed not to.   For example, the rotation speed is coded and transmitted in two bytes and
Are stored in two storage cells by a face-module. At that time, the calculator
Without notice, read the first byte of the previous transmission and the second byte of the actual transmission.
And the combination of invalid speed-information must not occur. 13. Transmit and receive circuits are connected to the local network. Network failure
As is well known, the probability increases with the number of these circuits. Therefore, individual
Prevention measures have been taken to ensure that the entire network is not interrupted in the event of a failure of the entrant.
Must be done. 14. Due to the conductive coupling of several spatially distributed control devices, for example, compensation current
In many cases, the function of the control device is hindered.   The transmission protocol for the local network in the vehicle is only for expensive optical waveguides
It is designed to achieve conductive decoupling even when using copper conductors.
There must be. 15． In vehicle applications, change data must be transmitted quickly and slowly
Absent. The information content of rapidly changing data is no longer the actual data when received
These data are advantageously transmitted before other data to prevent loss of
It must be. Therefore, bus access and processing of transmission requests at the transmitter
Processing of data and received data according to priority must be performed in order.
Must. Priorities can be individually associated with individual messages.   For example, a request for transmission of the engine temperature has already been made, but the transmission itself is still
When not occurring, a higher priority load signal applied later for transmission.
The priority treatment of the issue must be guaranteed. In known interfaces, processing
Can be determined for each program only by the computer. This priority action
This is not possible with a microcomputer used in a vehicle for real time use. That
The computational time load is acceptable given the high transmission rate of the messages to be transmitted.
Because it will not be.   Means for Solving the Problems and Effects of the Invention   On the other hand, the method of the present invention having the features described in the requirements of Claim 1
Has the following advantages over the known techniques described so far. Ie
Incorporated in vehicles with special requirements for coupling between control devices in vehicles
Fast and reliable data transmission between computers becomes possible.   This means that a message is transmitted from any of the subscribers to the bus line.
So that each message includes an identifier and an ACK field.
The message can be identified with respect to content and priority using the identifier.
Identifier indicates priority for non-destructive bit-by-bit arbitration during bus access
And each of the remaining subscribers of said subscriber is directly in front of said bus line
Receive the message and each subscriber has said message,
Received and whether the subscriber should further process the message.
Evaluates the message to determine if the message is correct
Each of the remaining subscribers when the ACK is received on the bus line.
Transmitting a first dominant bit and a second dominant bit in a field
It is realized by doing.   According to an advantageous embodiment, the identifier is an address, data, sensor signal, final signature.
Commands for metering, intermediate results, commands for synchronization, commands for triggering actions, speed, speed
Slope, engine temperature, drive engine load, e.g. anti-lock or slip
Characterize content such as command data from the prevention device.   According to the second method described in claim 5, a plurality of data processing devices are provided.
Subscribers and one bus interconnecting said subscribers for transferring messages
A method of operating a data processing device for a vehicle, the method comprising:
One of the subscribers transmits messages on the common bus line, and each message
The message contains an identifier, which is used to categorize the message into content and priority.
With respect to each other, wherein the subscribers are each shaped by each subscriber.
A list of identifiers generated and managed, said list comprising said bus line
The internal processing priority regardless of the priority of the message on the
The processing priority is transmitted to the subscriber at any time. Determine the sequence of messages to be prepared and said subscriber
Are connected by any of the subscribers connected to the common bus line.
Receive and evaluate all messages sent at the same time.
A message in which each subscriber of the subscriber contains an identifier that is consistent with the list of identifiers
Page only and receive further processing.   This method is different from the prior art described at the beginning in that the connection between the control devices in the vehicle is improved.
Fast and reliable between the computers integrated in the vehicle, with special requirements for integration
This has the advantage of enabling accurate data transmission.   According to a third method of the present invention, a data processing apparatus is provided.
Interconnects with a plurality of subscribers for transmitting messages
Wherein the messages each include a frame start bit and a
, An identifier and a control field, and a data field
The data part and the CRC file containing the CRC sequence and the CRC delimiter
A method of operating a data processing device for a vehicle, the method comprising:
Transmitting the frame start bit on a line and identifying the identifier in the data field
Indicating the format of data transmitted in the bus and access to the bus line
Configured as a priority to determine the possibility, in the head part of the message
Each transmitter has previously given permission to use the bus line with a fixed priority.
The bit level to be transmitted on the bus line and the transmitter actually detects on the bus
The bit level to be determined based on the bit level.
If the bit levels are not the same, the information on the bus line can be
If the transmission of the message is stopped and the head has the highest priority
Completes the transmission if the CRC is transmitted after the data field
The fields include the frame start bit, the data field, and the CRC field.
And in the CRC field, conflict with the frame start bit.
Transmit the pair of bit-level CRC delimiters.   With such a bit-level arbitration mechanism, two or
Collisions when more bus subscribers try to send a message at the same time Is avoided.   During the arbitration, each transmitter will determine the bit level that the transmitter itself writes to the bus.
, The transmitter actually scans on the bus. On the transmitter itself
Thus, all transmitters for which there is no transmitted bus level will have one more
The transmission must be stopped without transmitting any packets. According to this agreement
The arbitration process can proceed without destroying any information on the bus.
Wear. The transmitter whose message has the highest priority identifier is the bus
Access rights. The transmitter transmits the started message to the end
You.   Example   BRIEF DESCRIPTION OF THE DRAWINGS FIG.   Table 1 shows the possible bus topologies (bus line type) depending on the selected transmission medium.
State), coupling type and line type.   Transmission format: time division multiplex             Baseband transmission   Access format: Multi-master principle                 Limited bus assignment   Spatial spread: depends on transmission speed   The bus system described above has a superior or inferior characteristic in the transmission medium.
When one state is possible, it can be realized precisely.   An example for this is:     Example for impedance:       Switch closed / open       Transistor conduction / non-conduction     Example for energy:       Voltage is applied / Voltage is not applied       With / Without light   FIG. 1 shows an embodiment configured as a linear bus system. This cis
The system consists of continuous bus lines (core pairs or optical waveguides) and individual subscribers.
Consists of connecting lines leading to the person.   FIG. 2 shows an embodiment in which conductive coupling is performed on the bus line. dry
Is a switch that can be controlled, and is controlled by a transistor (open collector coupling).
Has been realized. Two-wire lines or coaxial cables are used as bus lines
. Control is performed asymmetrically. At the end of the bus line, the power supply voltage is impressed via a resistor.
Be added. When at least one driver transistor is conducting, the dominant
A bus condition occurs.   FIG. 3 shows two complementary drivers which are simultaneously controlled to be conductive or cut off as transmission drivers.
1 shows an embodiment in which a typical driver transistor is used. This allows the track It is controlled to a nominal form. The advantage of this arrangement is that it is relatively
The likelihood of ass radiation is relatively low.   In this embodiment, the bus line is conductively connected to the individual subscriber. This
In an environment with electrical or electromagnetic disturbances, the subscriber may have access to another line (for example,
There is a case where a problem occurs that the connection is erroneously made via the electric wire).   FIG. 4 shows an embodiment in which a transformer is used for conductive isolation. DC
The component removal can be performed by biphase coding. The recessive state is
Realized by decoupling of all transformers from their drivers (
The driver is switched to high resistance). The dominant state is when a positive or negative pulse
This is realized by being connected to at least one of the components. Pulse polarity
Synchronization is performed with respect to determining the start bit polarity.   Another embodiment where conductively separated coupling is performed is through the use of optical couplers.
Can be realized. This means that optical coupling with an open collector output
This is particularly simplified by the use of a vessel.   FIG. 5 has a central optical coupler as an example for an embodiment with optical waveguides
Figure 2 shows a star-shaped system. Coupling is achieved by passive or electro-optical converters
be able to.   Dominant bus state: at least one transmitting diode is emitting light.   Recessive bus condition: All transmitting diodes are not emitting light.   FIG. 6 illustrates a linear bus system as an embodiment having an optical waveguide.
You. The connection line is costly due to the central bus line and the optical input and output coupling
Such passive or electro-optical converters are not required. An example
For example, the central bus line and the connecting line are welded.   Dominant state: at least one transmitting diode is emitting light.   Recessive condition: All transmitting diodes are not emitting light. 1) Transmission protocol   The message consists of the following bit fields.Start of frame,
identifier,Control field,Data field,CRC field,ACK fee
Ludo,End of frameandPause period(See FIG. 7).   Note:   In this specification,YesandRowIs used in a logical sense.
Used.   YesIf on the other hand is recessive in the bus for its action,RowIs dominant
. As a result, at least one of the plurality of bus subscribersRowAs long as you send
By all bus subscribersRowIs received.Start of frame Marks the beginning of the message and onlyRowConsists of bits.   Bus subscribers stateBus idol(3)), ie, the bus
Is only allowed to start transmitting messages when it is free. all
The receiver isStart of frameOn the leading edge caused by
Synchronized on the basis.identifier Means in terms of name and priorityData fieldCharacterize the content of   identifierMust make sense of the address that determines the only receiver from multiple bus subscribers.
Do not have. Correctly received messages are still processed by the bus subscriber.
It is exclusively for each bus subscriber whether or notReceiving filter(Paragraph 5) 1.1.
3). Therefore, from a transmitter perspective, point-to-point transmission
And there is no difference between the simultaneous response of several or all bus subscribers.   During simultaneous bus access by multiple transmitters, the priority is determined during the arbitration phase.
It is determined that the sender of the message will acquire the right for subsequent transmission of the message (paragraph 2).
)reference).   In this embodimentidentifierIs 8 bits long. (IFL = IDENTIFI
ER-FIELD-LENGTH = 8)Control field (Fig. 8) Is a bit fieldRemote transmission request,Data byte codeAnd future expansion
Contains reserved bits.   Remote transmission requestShould be transmitted by a corresponding message. Or should be required.Data byte codeIs the data fee
Contains information about the length of the field.   In this embodimentControl fieldIs 8 bits long. (CFL = CONTROL-FIELD-LENGTH = 8)Data field MeansidentifierContains the information to be transmitted, which is fixed by This
Is variable (data-byte-count) and is, for example, 1,
It can be 2, 4 or 8 bytes.   DATA-BYTE-COUNT = 2 ** DATA-BYTE-CODE   DFL = DATA-FIELD-LENGTH = 8 * DATA-BYTE-C
OUNTCRC field (Fig. 9)   This bit field contains the control word (CRC Sea
Kens)CRC delimiter(FIG. 9).   The generator polynomial is better for the security of long messages with the same number of control bits.
Small message length (120 secure) to achieve higher Hamming distance
(Smaller bits to be secured).   In this embodimentCRC-sequenceIs 15 bits long. (CRCL = CRC-SEQUENCE-LENGTH = 15)   This control word allows the next field, namelyStart of frame,identifier
,Control field,Data fieldandCRC sequence(CRC separator
Character) Is secured.CRC delimiter CRC delimiterIsYesConsisting of bits,CRC control wordFollowed byCRC file
FieldTo end.   The cyclic code consists of the entire codeword (the bits to be secured and the security bits).
It cannot cover errors caused by cyclic shifts. Ie
Cyclic shifts again result in valid code words.   But by definitionRowIsStart of frameBit in the code word If included, the respective rotation of the codeword isCRC fieldButYes
Can be detected by not being terminated.ACK-field   All receivers receive the correct message to the transmitter and they
As the first bit in the intervalRowNotify by transmitting bits. 2nd bit
AsYes(ACK delimiter) Is transmitted. The transmitter uses this format and method
Whether at least one of the bus subscribers has received the message without error
Can be detected.   All bus subscribers who receive a message with an error mustElla
FlagReport using.   The transmitter checks at least one acknowledgment for correct receipt of the message
If it cannot be obtained from the transmitter, the transmitter itself sends an error report.End of frame IsYesConsists of an uninterrupted sequence of bits and is positioned at the end of each message
doing.   End of frameCan be selected as follows. Ie length information
All receivers expecting data at this location based on incorrect transmission of information
But,End of frameAlready detected a stuff error in the penultimate bit of
It is to put out (codingreference). In this way, the previous transmission error
Regardless, each bus subscriber can detect the end of a message.   The transmitterEnd of frameAt least oneRowBits (for exampleElla
FlagScans on the bus, this finally indicates that
Acknowledgment of the message transmitted by the sender. This
This causes an error condition to be raised by transmitting the penultimate bit of the message.
Unique response to error reporting even when detected by one of the receivers
Holds.   In this embodimentEnd of frameIs 7 bits long. (EOFL = END-OF-FLAME-LENGTH = 7) Pause period IsHigh bitConsists of continuous rows. Which bus subscription at this time
No one is allowed to start transmitting new messages.   Pause periodDuring the period of, each receiverError flagOverload (error
To send the next message as a result.
Is delayed until all receivers are ready again.   Pause periodError reporting that occurs within
It is processed in the same way as information. But repetition of the preceding message by the corresponding transmitter
No work is done.   In this embodimentPause periodIs 3 bits long.   (IML = INTERMISSION-LENGTH = 3)Bus idol   Buses continue after a period of inactivityhigh levelWhen you lead, you are empty.
StatusBus idolCan be of any duration.RowBit receptionFret
Start of the gameIs interpreted as   The error report consists of the following bit fields:Error flagandError section
Cut character(See FIG. 10).Error flag IsRowConsists of an uninterrupted sequence of bits.   The length of the column is therebyStart of frameFromCRC delimiterLeads to
Of "bit stuffing" applied to all bit fields up to
Can be determined to be broken. Another bus subscriber has an error on his own
Respond to it by sending a message.   In this embodimentError flagIs 6 bits long.   (EFL = ERROR-FLAG-LENGTH = 6)Error separator   Each error report isYesIt is terminated by a continuous stream of bits.   Error separatorThe transmission process for all other subscribersError flagTransmission
After completion (low after high transmission on the bus), it begins.   In this embodimentError separatorIs 7 bits long.   (EDL = ERROR-DELIMITER-LENGTH = 7) 2) Bus organization   The organization of the bus exchange is based on the following five rules: (1)Bus access   Bus subscribers stateBus idolStart message transmission only at
Is allowed.   All receiversStart of frameMust be synchronized based on the leading edge of the
I have to. (2) Ruling   If two or more bus subscribers start transmission at the same time, the access
Collisions are resolved at the bit level by an arbitration mechanism.   During the arbitration, each transmitter will determine the bit level that the transmitter itself writes to the bus.
, The transmitter actually scans on the bus. On the transmitter itself
Thus, all transmitters for which there is no transmitted bus level will have one more
The transmission must be stopped without transmitting any packets. According to this agreement
The arbitration process can proceed without destroying any information on the bus.
Wear. The message has the highest priorityidentifierThe transmitter with the
Access rights. The transmitter transmits the started message to the end
. (3)coding   Is a segment of a messageStart of field,identifier,Control feel
Do,Data fieldandCRC fieldIs a bit stuffing way
It is coded according to. 5 in uninterrupted order in the data stream to be transmitted
When two transmitters have the same bit, the transmitter will automatically bit the bit with the opposite value.
Into the flow. (Four) Decoding   Is a segment of a messageStart of field,identifier,Control feel
Do,Data fieldandCRC fieldA bit of stuffing Coded according to the method. The bus subscriber has five identical bit levels
Receiving in an uninterrupted order, this subscriber will be able to view subsequent stuff bits
Remove from the stream. The value of the stuff bit is the opposite of the preceding bit.
(Error checking). (Five) Error reporting   Each of the bus subscribers detecting the transmission error has six consecutive row bits.
(Error flag) To notify all other bus subscribers.   Error reporting occurs immediately after an error is detected, i.e., the bit following the error condition.
You can start with Only when a CRC error is detected, an error report is sent for 3 clocks.
Only sent out later. by thisACK fieldIs due to a CRC error
It is guaranteed that it will not be rewritten by a triggered error message.   Error reports are issued on at least six buses.RowAfter a bitRowFromYes
End by moving to (Refer to the state diagram for error handling) (6)Overload   Each bus during overload (received messages not yet processed)
Subscribers,Pause periodDuringError flagAll this by sending
Can notify other subscribers (Pause periodreference). 3) State diagram 3) -1. State diagram description   Each rectangular block indicates the system status. Input and state changes
Transitions between number-dependent states are indicated by connecting lines with arrows.
State transitions are always made by the active edge of the bus clock. The same
Output data is applied to the bus line by the lock side edge. The actual bus level is
It is scanned just before the next active bus clock edge.   Bus idolAfter the state, the bus clockYesFromRowTo the next bus level transition to
Synchronized on the basis.   Inputs and state variables can be organized and combined into one decision vector. it can.   The decision vector has the form: (Bus monitor,Bus drive,staff,count,TX request,CRC error,
Overload) The meaning is as follows:   Bus monitor   An input variable that reproduces the scanned logic level on the bus line.   Bus monitor= 0 corresponding to the dominant bus level(Row) Bus monitor= 1 corresponding to recessive bus level(Yes) Bus drive   State variable indicating the logic level transmitted in this state.   Bus drive= 0 Transmission level dominance(Row) Bus drive= 1 Transmission level recessive(Yes) staff   Indicates whether the bus level was constant during the last five scan clocks
Input variable to be used. (FiveRowOr fiveYes). There are five bus monitor levels.
Is the actual value of this column.   staff= 0 The bus level changed alternately.   staff= 1 bus level was constant   count   A state variable that indicates whether the internal counter (CNTR) has performed a counting operation. this
A counter is not required in all situations. If necessary,
The counter is set upon transition to the corresponding state.   Count = 0 The counter has not finished counting operation yet (CNTR <> 0)   count= 1 Counter finished counting operation (CNTR = 0)   TX request   An input variable that indicates whether the message is ready for transmission
, So that it must be involved in the next bus allocation procedure.   TX request= 0 There is no transmission application   TX request= 1 There is a transmission application   CRC error   State variable that indicates whether the received message had a transmission error. This
Variables areCRC sequenceIs set after receiving the last bit of   CRC error= 0 There was an error in reception   CRC error= 1 Transmission error   Overload   Last received message could be processed by interface logic
Or a state variable that indicates whether this message is overloaded.   Overload= 0 The receiving logic is overloaded.   Overload= 1 Receiving logic is in preparation.   The decision vector uniquely determines which subsequent state is progressing
Is determined. Thus the state diagram can be described using decision vectors
. If "X" is specified for a given element in the state vector,
This means that the corresponding variable is not important for the decision (variable is "0" or
May be "1"). 3) -2. StatusBus idolExample for   StatusBus idolIs the stateInspection suspension periodIs a regular succession of. Statusbus
IdolAlways recessive transmission level atYesIs applied to the bus line. Transition to subsequent state:   Decision vector (1,1,1, X, 0, X, X):   This decision vector means that:   Bus levelYes, Transmission levelYes, The bus is already at least 5 clocks longYesso
Yes, the counter is not important, there are no transmission requirements, transmission errors and overload are important
Absent. Since no bus action was detected and there was no transmission request,
State is againBus idolIt is.   Decision vector (1,1,1, X, 1, X, X):   At this time, if the other variables are the same as in 1), there is a transmission request. Bus line Since the road is free, transmission can be started immediately. So the subsequent state is
,Start transmission of frameIt is.   Decision vector (0,1,0, X, X, X, X):   The bus line has a levelRowWas detected. Ie at least one other bus
It means that the subscriber has started transmitting the message. The detected row bit is
Is the start of the frame. Subsequent states are:Receive identifierIt is.   All subsequent decision vectors are stored in hardware in the interface module.
Indicates an air or hardware failure.   Correspondingly, the following state diagram:Receive mode,Transmission modeandError handling
ReasonFor all other system states described in.   In addition to decision vectors arising from obstacles in the bus line,
Only vectors that may occur in the wear are listed. Rest vector
Is for simplicity of control unit or stateHardware errorSystem in
Can be handled to increase security. 3) -3. State diagramReceive mode   FIG. 11 shows a flowchart of the state diagram reception mode.   StatusBus idolFrom the busStart of frameState by detection of
Receive identifierto go into. At the time of state transition, the counter CNTR sets IFL = 8 (IDENTI
FIER-FIELD-LENGTH) is added in advance. IFL has several
Indicates whether the identification bits have been combined (1)identifierreference).   Depending on the identification bit received, the statusReceive identifierLoop goes around
And the counter is decremented. A stuff bit occurs in the identifier
When,staff= State based on 1Ignore ID stuff bitMigration to
Will be There the stuff bit is removed. Afterwardsstaff= 1
If so, an exception condition must exist. (Bus line failure, another subscriber
Error report, unexpected bus stop state); You can make a return jump to.   After the counting operation of the counter is completed, the systemReceive identifierOr alternativelyID staff
Ignore bitsFrom) stateReceive control fieldMove to Where the counter
CFL = 8 (CONTROL-FIELD-LENGTH) is added in advance.   Control fieldIf all bits ofReceive data file
FieldAt a data field is received. In this case, as a special case,
Not a constant but a variable DFL (DATA-FIELD-LENGTH)
Pre-added. The DFL can take the values 8, 16, 32 or 64.   State asReceive CRC sequenceAtCRC control word(CRC
sequence) Is received. For this purpose, the counter CNTR first has CRCL = 15.
(CRC-SEQUENCE-LENGTH) is added in advance. Last CRC
After receiving the bit, the state variableCRC errorIs set (CRC error= 0 is d
Not mean raCRC error= 1 means an error in the transmission frame).CRC control wordIs always levelYesBit with (CRC delimiterBy)
Must be terminated. This is a stateReceive CRC separator▲ ○ 10 ▼
Hey   The receiver must acknowledge receipt of the message in the next bus clock cycle. DoRowIn case of level transmission or errorYesDone by sending a level
Will be Bus levelYesLevel of dominance when detectingRowIs sent,   Always set the first acknowledge bit to levelYesMust haveAC Sent by all receivers. levelRowStatus is received whenerror End of frame receptionAt the time of the state transition, the counter CNTR sets EOFL = 7 (END
-OF-FRAME-LENGTH).CRC error= 1
If, orEnd of frameBus level during the communication periodRowIs received  In the error-free state, the message is then completely received. Next state
And IML = 3 (INTERMISSION-LENGTH) cycle Each receiver can report an overload (OVERLOAD = 1),
As a result, the sending of the next message is delayed until the receiver is ready again. After several operations, the subsequent stateBus idolTo a new reception or
The transmission cycle starts.   The next field, namelyControl field,Data fieldandCRC
KensState with respect to stuff bits that can occur inIdentifier
ReceivingThe implementations designed for are appropriate. 3) -4. State diagramTransmission mode   FIG. 12 shows a flowchart of the state diagram transmission mode.   StatusBus idolFromBus idolSend request occurred before or during the period of
When (TX request= 1), the transition to the transmission mode is performed. Because of this state
FigureReceive modeWill be helpful.   Message sending is the dominant sending levelRowIs sentFrame star
Send a reportStarts with. More dominant level of disabilityRowButYesDue to obstacles
If changed, stateError handlingMove to   Otherwise stateSend identifierResults in a bus allocation procedure
Occurs. First, the counter is IFL = 8 (IDENTIFIER-FIELD-LE
NGTH).   The received level corresponds to the transmit level and the last five bus levels are constant
Status and the counter has not yet completed the counting operation.Send identifierTo
Stay (just the counter decrements).   StatusSend identifierEnds when: -Transmitted recessiveYesThe level has been rewritten by Row. Therefore bus
The assignment disappears.staffIf = 1, the subsequent state isNo ID staff bit
SightIt is. Otherwise, if the counter has not finished counting, the subsequent state isidentification
Receiving childAnd if the counter has completed the counting operationReceive control fieldsIn
You. -The transmitted low level of dominance isYesChanges to Subsequent states areerror
processingIt is. The reception level corresponds to the transmission level; If the last five levels are the same
,StatusID stuff bit insertionMust move to. Count in other cases
If the instrument has completed the counting operation, the subsequent stateSend control fieldsMove to This
In this case, the bus assignment was realized.   StatusInsert ID stuff bitAtIdentifier fieldStaff bits
Is inserted. In this state, there is no possibility that bus assignments will be lost,
For different transmit and receive levelsError handlingIs a subsequent state. Other places
State if total counter has not finished counting operationSend identifierBack to If the counter has finished countingBus assignmentIs realized, and the subsequent state isControl file
FieldIt is.   StatusSend control fieldsCounter enters the counter, CTR = 8
(CONTROL-FIELD-LENGTH). Bus assignment
The transmission and reception levels must always be the same after that.
No. If not, stateError handlingMove to Counter completes counting operation
System has not changed and the edge has changed in the last five clock cycles,
Is in stateSend control fieldsOnly, the counter is only decremented
It is. Stuff bit insertion, stateInsert CF stuff bitAt line
Be done. If the counter has completed the counting operation, the subsequent stateSend data field
FaithIs performed.   StatusSend control fieldsThe process in the stateSending data fieldsYou
AndSend CRC sequenceAlso fits.Send data fieldsTo
Upon entry, the counter CNTR can take the value 8, 16, 32 or 64
The variable DFL (DATA-FIELD-LENGTH) is added in advance.CRC
Send sequenceWhen entering the counter, a constant CRCL = 15 (CRC-FIELD
-LENGTH) is added in advance.   CRC sequenceFollowed byCRC delimiterMust be transmitted. This
Is a stateSend CRC delimiterThis is performed at {circle around (10)}.RowAfter
Sent toYesIf the state changes due to a failure,Status error handlingMove to   Subsequently, the acknowledgment bit is checked. ReceivingYesThe level is for all subscribers
Either the message was not received without error or all subscribers
Means that the system is synchronized. Therefore the transmitter is in stateError handlingsmell
Sends an error report.RowSubsequent state when receiving levelACK delimiter If not,Error handlingJump to End of the gameIs sevenYesSince the counter CNTR has EOFL = 7
(END-OF-FRAME-LENGTH) is added in advance.YesLebe When the system receives the counter, the counter will stop counting and thenInspection pause RowWhen receiving a levelError handlingJump to   StatusInspection suspension periodWith the move to,Transmission modeEnds. StatusInspection leave
Suspension periodIsReceive modeAre the same as those described above. 3) -5. State diagramError handling   FIG. 13 shows a flowchart of the state diagram error processing.   Error handling is stateSend error flagStarts withError flagIs everything
All subscribers have a transmission error on the bus or the receiver is overloaded
Used to report thatError flagIs six consecutiveRowBi
And the counter CNTR is thereforeSend error flagEF when entering
L = 6 (ERROR-FLAG-LENGTH) is set. Sent by obstacle
Trusted dominance levelRowButYesIf it changes toError handlingBut
You can get started. Otherwise, the counter is decremented. Counting state Zero state
Error SYNCIs performed.   StatusError SYNCIn, depending on the caseError flagSend another subscription
Wait for the person to prepare. This means that the bus levelYesBy moving to
Is detected.   Error handling isError separatorState by sendingSend error delimiter
Is terminated at At that time, first, the counter CNTR sets EDL-1 = 6 (ERROR
R-DELIMITER-LENGTH = 7) is added in advance.Error separator
letterIs sevenYesBits, the first of which is the stateerror
SYNCHas already been sent. When the remaining bits are sent out on the busRowLebe
Is detected, a newError handlingBegins. Otherwise, the counter has elapsed
After stateInspection suspension periodMove to Thus, the error processing ends. 4) Error handling 4) -1. Error response   Each subscriber must immediately detect the error, i.e., Error report (Error flag) Is sent. CRC error
Only at the time of detection, the error message is finally transmitted three clocks later. to this
ThanACK fieldBy the error report triggered by the CRC error
It is guaranteed not to be rewritten.ACK fieldEmpty
The transmitter confirms the message from some receivers and
An error report from the transmitter can also be provided. This gives you a high probability
To determine if there is a fault in the subscriber (transmitter) itself or the receiver.
And be able to.   Error reporting is at least six consecutiveRowbit(Error flag)
You. ContinueRow−YesAfter the transition, at least 10 moreYesI have to wait a bit
Must (Error separatorandPause period). 4) -2. Error occurred   Error handling depends on its spatial occurrence as well as its temporal occurrence.   In 4) -5, an example of an error response of the open collector bus will be described.   From Table 2 below, all possible individual bit error examples can be inferred.   An example for an error occurrence, indicated here by 4) -5 below the attached number
Is illustrated. 4) -3. Error classification   The fixed bus protocol described in 1) and the bus organization function specified in 2)
Based on this, the following classes of errors can occur:   Transmitter:   BF Bit error, bus level does not match transmission level.   BK stateSend identifier(Arbitration) andStart of frameIn the transmission of
,RowBus level when transmittingYesOnly errors are recognized   AFReceiving an acknowledgmentNo acknowledgment during period   NF stateInspection suspension periodOn the bus betweenRowbit   Breach of SF staff rules   Receiving machine:   CF CRC error   DFCRC sequenceIsCRC delimiterDoes not end with, ie CRC
Control wordYesBit doesn't last   NF stateEnd of frame receptionandInspection suspension periodBus betweenRowbit
Is   Breach of SF staff rules   BF stateSend ACKBit error in   Combinations consisting of temporal and spatial occurrences in the following Table 3 4) -3;
All error detection possibilities arising from the various classes of errors are summarized.   The abbreviations in the top row of each column in Table 3 indicate errors that occur in the transmitter.
And the bottom row characterizes the errors that occur at the receiver. 4) -4 Description of example   The following abbreviations are used in the following schemes: − 障害 Obstacle − −−− Unfailed message -*** Internal intervention − ## External intervention − S stuff bit -1.8. numbering -R bus stop (statusBus idol) Is detected -B A bit error is detected during the transmission period -F error is detected by the subscriber − Z start of error message -K subscriber violated arbitrage and abandoned its transmission   Model parameters for the following error handling example:       The maximum number of bits of the same level (S = 5)       −End of frameIs six consecutiveYes(EOFL = 6
)       −Pause periodIs three consecutiveYesConsists of bits (IML = 3)       The error message is at least six consecutiveRowConsisting of bits (
EFL = 6)       -The subscribers already transmitting or wishing to transmit by the transmitter are indicated.
Be done 4) -5 Example of individual bit error 4) -5.1 Global failure, discoverable by all subscribers.identifier               Bit error in   S1, S2: transmitter, E1, E2; receiver   Transmitter “loses” arbitrage and then detects stuff errors as well as receiver
I do. Error notification and subsequent bus stop (statusBus idol) After the new transmission
Or the repetition of the failed communication can be started.   The two transmitters start transmitting at the same time.   A bit error occurs in the transmitter S2 due to the failure, and the transmitter performs error communication.
Is sent. This causes a stuff error in the receiver and the transmitter S1
A bit error and / or a stuff error. Error communication
AfterRowBit and subsequent bus stop (statusBus idol)) After a new transmission or
Can start repeating the failed communication. 4) -5.2 Error has part of receiver and transmitter or transmission desire              Occurs at the subscriber.Data fieldStaff in              error   Transmitter detects bit error and faulty receiver detects stuff error
And sends an error notification. This allows for stuff efficient
Error occurs and the receiver sends an error message as well. Last error report
RowBit and subsequent bus stop (statusBus idol) After new transmission or failure
Communication can be repeated. 4) -5.3 Error has part of receiver and transmitter or transmission desire              Occurs at the subscriber.ACK slotBit error in              ー   The faulty receiver detects a bit error (theRowBit suffers)
One error report is sent. The transmitter does not get an acknowledgment and sends an error message as well
I do. This allows unhindered receivers to detect errors (ACK delimiter
Character) And the receiver sends out an error report at the same time. Last row of error report
After the start of the transmission, start a new transmission or repeat the faulty message. Can be. 4) -5.4 Only the transmitter is affected.Bus idolError in   The failure prevents subscriber S1 from starting transmission anymore and
The receiver behaves like a receiver until the end of error handling. S1 is a staff error
And sends an error message. This causes a stuff error in the receiver
Occurs, and an error message is transmitted in the same manner. Error notification and subsequent bus stop
(StatusBus idolAfter), a new transmission can be started. 4) -5.5 Failure in transmitter only.Data fieldStaff in              error   The transmitter detects stuff errors and bit errors simultaneously and sends an error report.
Send out. This causes a stuff error in the receiver, and an error report
Send out. Last error reportRowBit and subsequent bus stop (statusBus eye
Dollar2.) A new transmission or repetition of the faulty communication can then be started. 4) -5.6 Error occurs in all receivers,              It does not occur for subscribers who have a desire to trust.Control field              The bit error length designation in the above changes due to the failure. Example 1: Expansion of length specification,          The receiver expects a longer message than was actually sent.   The receiver can no longer receive the message in the correct place,
The transmitter then detects the error and sends an error message. This allows reception
A stuff error occurs in the machine and an error message is also sent. Error reporting
LastRowBit and subsequent bus stop (statusBus idol) After the new transmission
Or you can start repeating the failed message. Example 2: Reduction of length specification,         The receiver expects a shorter message than was actually sent.   The receiver detects the CRC error and sends an error notification. This allows the transmitter
A bit error occurs and the transmitter also stops error reporting. error
At the end of the callRowBit and subsequent bus stop (statusBus idol) Later, new
A new transmission or repetition of the failed message can be started. 4) -5.7 Error occurs in a part of receiver,              It does not occur for subscribers who have a desire.Bus idolIn              Bit error   The faulty receiver is supplied with an incorrect length designation due to the fault,
Perform CRC check at wrong location. The CRC of the faulty receiver is correct
If it occurs more than eight clocks later than the
Send an error report. If the CRC check occurs within 8 clocks after the correct position, a fault will occur.
The offending receiver detects the CRC error and sends an error notification. This
Bit errors occur at the transmitter. The faulty receiver will detect the end of frame
To receive an unacceptable bit sequence and to send an error message as well. Error notification
The end of the reportRowBit and subsequent bus stop (statusBus idol) After a new biography
It is possible to start repeating transmissions or faulty communications. 4) -5.8 Error occurs in a part of receiver,              It does not occur for subscribers who have a desire.              Data fieldStaff error in.   The faulty receiver detects a stuff error and sends an error notification. This This causes a bit error at the transmitter and a
A tough error has occurred and it also sends an error message. End of error report
ofRowBit and subsequent bus stop (statusBus idol) After a new transmission or
You can start communication with a fault. 5) Interface Management Processor (IMP) 5) -1. Constitution 5) -1.1 General concept 5) -1.1.1 Structure           IMP has the following issues         Between the CPU and the serial interface,Dual port RAM         Data exchange by using (DPRAM)         Control of transmission and reception;   FIG. 14 shows a block circuit of the serial interface module. Series A
The interface module consists of the following parts:         -DPRAM         -IMP         -Serial shift register         -Bus logic circuits         -Clock oscillator   The connections between the components are specified in the block diagram. 5) -1.1.2 Message priority   The priority in the IMP depends on the location of different messages in DPRAM.
Is determined. The priority (arbitration) on the bus isidentifierDecided by
Can be   The process of searching for the highest priority message in the IMP is based on the lowest DPRAM address.
Start at 5) -1.1.3 Acceptance filter   Each communication arriving from the bus is checked to see if it should be received.
You. Therefore, in DPRAM, all messages processed by this IMP The list with the message is read through. Incoming messages go to DPRAM
Is thatidentifierWas found there and this means thatReceive / SendFinger by bit
As shown, it is only forwarded when it should be received again. 5) -1.1.4 Queue for messages to be sent   Each message that should be sent is sent to DPRAM by the CPU.
Written and thenSend requestBit is set. The search process is transmission
Find the highest priority message that exists for. Only this message is serial
It is considered for transmission in the shift register. The CPU will later become more important
When subscribing to a message for transmission, the search process discovers this and takes the first message.
Messages are eliminated. This allows the message to arrive at its priority according to its priority.
It is transmitted regardless of the arrival time. 5) -1.1.5 Queue of received messages   When received messages are stored in DPRAM, automaticallyInterrupt requestBit
Set. The search process is based on the received message and the message with the highest priority
And forward the interrupt signal to the CPU. Because the CPU responds to this interrupt
Before, when more important messages are stored in DPRAM, the higher priority
Messages are considered. This ensures that the message is independent of its arrival time
, Will be considered accordingly. 5) -1.2 DPRAM organization   DPRAM isdescriptor(identifier,Control segment) And bus by CPU
Of all messages that should be received or sent viaData field
DoContains. DPRAM partitioning is independent of the specified protocol
. possibility:     -Separate memory for incoming and outgoing messages     −descriptorandData fieldIsolated memory for     -The only memory for all tasks   In the first embodiment, one memory is proposed for all tasks. Me Sages can be registered in the memory at regular intervals. But to save storage space
In order to get the message,Data byte count3 or depending on
The data is densely packed and stored according to the length of 10 bytes.   The size of the DPRAM is currently fixed at 64 bytes. Integration costs
When trying to make it smaller, the memory can be expanded. If you do this
Relatively large or long messages (Data fieldAlso
descriptorAlso) can be stored. Replacement message for lack of communication
Page can also be stored in DPRAM, which allows software
Is simplified. Thus, DPRAM is used as follows:     -At the same time, determine whether the incoming message should be received       Memory (acceptance filter)     -Incoming and outgoing messages, organized according to priority       Queue for the     -Memory for IMP control registers 5) -1.3Control segmentOrganization 5) -1.4 DPRAM functions 5) -1.4.1Data byte code   During the search process, the DPRAM address pointers
Have to tell the beginning of.descriptorandData fieldPacked tightly
When memorized, move the pointer   2 ** (DATA-BYTE-COUNT) +2 By just raising, the next message can be indicated. Memory location
To make better use of messages and messages, multiple messagesdescriptorSource
And can be transmitted as a large message. Largest block
The size is fixed to 8 bytes in advance.   Data fieldThe length of   DATA-BYTE-COUNT =   2 ** DATA-BYTE-CODE From the data bytecode having 5) -1.4.2 Pending   pendingBit indicates that the transmission or interrupt routine has not yet completed.
And instruct. Transmission starts on the bus or the CPU acknowledges the interrupt (
When an interrupt pointer is loaded), the pending bit is set automatically.
This pending bit is automatically transmitted (successfully or not) after transmission.
Dynamically reset. thispendingSets are further controlled under program control.
And depending on the CPUInterrupt requestTogether or the sameidentifierNew Messe with
Reset when a page arrives. Of the messagependingBit is set
Then, this message is not considered during the search process.   pendingThe bit allows the CPU programmer to exit the interrupt routine.
Whether another interrupt broke the consistency of the message with multiple bytes
It is possible to inspect. **pendingBit is the end of the interrupt routine
AlwaysYesWhen on level, this isData fieldIs the next message
This is a confirmation that processing has been performed consistently before the arrival of the page.   This process is interruptedEnable=YesDone only forInterrupt enable
BullIs reset to low level,pendingBits are assigned to CPU
It is not set by the print confirmation. 5) -1.4.3Interrupt enable   SetInterrupt enableByInterrupt requestTo the CPU in the right relationship
Transfer.   Interrupt enableIf is not set, an interrupt action is reported to the CPU.
Is hindered. 5) -1.4.4Interrupt request Interrupt requestMeans that each time a newly received message is transmitted to DPRAM,
Interrupt enableAutomatically, regardless of the state of theYesSet to level.Interrupt
RequestIs the repeated transmission (Transmission count=Yes) Is also set when it fails
It is. 5) -1.4.5Transmission count Transmission countCounts transmission attempts.Transmission countAfter the transmission is carried out
Reset.  After the second faulty transmission, the user software may perform subsequent error handling.
To be able toInterrupt requestIs set. 5) -1.4.6Send request   SetSend requestLeaves the IMP to transmit its message You. There are two different states: a.Receive / Send=Row(Transmission) Start value after reset. The message is sent
You.Send requestIs set by CPU orRemote transmission requestComing with
Depending on the messageYesSet to level. b.Receive / Send=Yes(Receive) All messages characterized this way
, In receiving mode. As an exception in this situation,Send requestBy the set
,EmptyData fieldAnd setRemote transmission requestMessage with
Is sent. 5) -1.4.7Receive / Send Receive / SendDetermines the direction of the data. a.Receive / Send=Row(Transmission) Start value after reset. In DPRAMDe
Data fieldIsReceive / SendButRowComes when set to a level
The message is write-protected. The message isTransmission request highBy
Is activated. But with the following exceptions:Remote transmission request=YesComing message
When inControl segmentofSend requestIsReceive / Send=RowDespite
WithoutYesIs set toSend requestIs the only bit that changes in this operation
Yes, all other bits remain write protected thereafter. This place
The device is used for requesting a message by another bus subscriber. b.Receive / Send=Yes(Receive)   The incoming message isData fieldTransmitted atinterrupt
requestAutomatically sends each time a message belongsYesIs set to 5) -2. Data exchangeCPU-DPRAM 5) -2.1 Synchronization problems   Consists of multiple bytesData fieldReplacement applies without consideration of synchronous operation
Can be performed. HoweverData fieldShould be processed synchronously
If so, appropriate synchronization must be set. Hardware costs
Software synchronization is currently proposed in order to keep the system low. This In the disposition of the above method, the CPU has priority over all other access attempts.
Access the DPRAM during cycle stealing. 5) -2.2 Asynchronous operation   DPRAM is used by the CPU as a RAM extension. Another for that
No transmission command is required. The received message is simply written to DPRAM,
At that time, the preceding message is rewritten. The transmission must be transmitted by the CPU.
ComeData fieldBelong toControl segmentInSend requestDepending on the set
Started.Send requestIs also from an external CPU,Remote transmission requestBy
Can be set. 5) -2.3 Software synchronization 5) -2.3.1 Sequence number inquiry   The transmitting CPU isData fieldUse bytes as sequence numbers
And the sequence numberSend requestIncrement each time before setting the bit
When receiving, the CPU that performs the receiving operation, based on the sequence number,De
Data fieldWhether the sequence number has changed after processing the data in
Can be inspected. CP that performs receiving operation when sequence number changes
U must repeat part of the process with the new data. 5) -2.3.2Interrupt requestQuery   New incoming messages areInterrupt requestBit belongingControl segmentSelf
Set dynamically. CPUInterrupt enable=RowDo not report interrupts
SometimesInterrupt requestIs reset before each message is processed and
Later, it is checked whether it has been set again in the meantime. 5) -2.3.3 Interrupt controlled processing   The CPU that operates to receive the message to be receivedControl segmentToInterrupt b
NavelBits can be set. New incoming messages belong to
Interrupt request bitAnd automatically at the same timependingBitRowTo
set. The most important interrupt is reported to the CPU. Check CPU automatically
TopendingBitYesSet to. CPU terminates interrupt processing Both (Interrupt requestBefore resetting and pending), the CPUpen
DinAsk Gbit.pendingBit is always stillYesIn level
At this time, the next message has not arrived in the interrupt processing. 5) -2.3.4 Block transmission   Data fieldIn order to process synchronously,Data fieldIs a block
It can be transmitted to and from the CPU on a per-task basis. This requires 2
A perfect RAM storage location must be provided for double storage. a. Submit   First used as a semaphore variableSend requestIs inspected. It is reset
WhenData fieldIs DPRA from CPU-RAM for each byte
M. afterwardsSend requestIs set.   warning: Set in the processing of this methodRemote transmission requestCorrect for a bit
Synchronization cannot be guaranteed. b. Receiving   Before the original interrupt routine starts, as described in 5) -2.4.2
,Data fieldAre transmitted to the CPU-RAM for each block. This allows
The probability that the data will be inconsistent from time to time is significantly reduced. The reason is interrupt
The critical time interval for the whole process isData fieldLow based on block transmission
Because it is reduced. 5) -2.3.5 Duplicated receive buffer   DPRAM can have two storage locations for important messages
. that timeidentifierAppears twice in the DPRAM. User software is DPRA
The message arriving from the memory location of M, following the confirmation of the interrupt,Receiving
/ SendSwitching to another storage location is possible by changing the bit. The process of this method
In one locationReceive / SendBit is high, and
Ready to receive the appropriate messageidentifierThe other having
At the memory locationReceive / SendBitRowAnd is therefore just received
The message is write-protected there. 5) -2.4 Hardware synchronization   As a premise for hardware synchronization, the CPU must be a fast
Lock transmission and non-interruptable semaphore processing must be provided. DPR
Access to the AM is defined by a semaphore bit between the CPU and the IMP.
The defined access protects against inconsistent transmissions throughout. End of transmission
Sufficient time must be set between the end of communication and the start of a new transmission. worst
, The IMP must wait until the CPU finishes the block transmission.
Absent. In the worst case, the CPU writes the received message to DPRAM and
Wait until the next message to be transmitted is loaded into the serial shift register.
I have to. 5) -3. Data exchange DPRAM-shift register 5) -3.1 Parallel control process   The data exchange between the DPRAM and the serial shift register will be described later for its function.
Are controlled by a plurality of parallel processes. The process is initialized
Therefore, the state shifts to the active state by the start signal. Active smell
Each process can send another activation signal, and these signals
Move to a different process. The start signal is always sent by the source process at the same time.
It does not mean that it must be deactivated. The whole control is
FIG. 15 shows a control diagram of the process. Start signal: -End of transmission   End signal at the end of a transmission that ended without fault. StatusEnd of frame transmissionOr
StateInspection suspension periodSet to the bus clock at the time of transition to. -End of ruling:   Signal at the end of the arbitration process; after the occurrence of this signalbusAccess is regulated
(Send or receive).identifierSet to bus clock at end of transmission
. -Start of the search:   searchIn order to start anew from the beginning of DPRAM in the process,
Start signal;Receive / SendOccurs at the end of the process. -Transmission error:   Error reporting during transmission. When an error notification is transmitted to the bus,
Set for -Start of transmission:   RoadStart signal for process, store process or error process
Occurs at the end of -Continuation:     − New start in endless process   These processes are used below in ALGOL or PASCAL
A description will be given using such a general control flow-construct. At that time the information provision statement
In this case, the processing is performed according to the above-mentioned construct. 5) -3.2Roadprocess   RoadThe process loads the next message to be transmitted into the serial shift register
I do. When a message is not waiting for transmission,searchThe process starts
You. yetbusIs occupiedsearchProcesses that the process may have to transmit
Finding a second message with a higher priority in the process queue
This message eliminates previously discovered messages. Road pro
FIG. 16 shows a flowchart of the process. Bus availability:   During the period when the bus is empty,Message segmentIeflame
Start,identifier,Control field,Data field,CRC fieldYou
AndACK fieldIs a transmission period.Transmission status :   Set at the end of the ruling (Yes) Or reset (Row)
Must 5) -3.3Storeprocess   StoreThe process can either store incoming messages or send outgoing messages. Di ofSend requestandPendingProcess bits. The signal indicating the end of transmission is
Occurs only after the transmission process has been successfully completed without interference. Transmission error in case of failure
Occurs. FIG. 17 shows a flowchart of the store process. 5) -3.4errorprocess   Error processTransmission countIncrements the second or
For unsuccessful transmissionsInterrupt requestIs set. Incoming message is on failure
No further processing is done in. First, the error process flowchart
It is shown in FIG. 5) -3.5Receive / Sendprocess   If a ruling is obtained, belong to the message transmitted at that timependingBi
IsYesSet to and thenTX pointerIs loaded on the stack
It is.Receive / SendThe process depends on the output of the arbitrationTX pointerOrRX Poi
ChildTosearchBefore the process is started by the start of a search, an empty address
Reset to pointer. FIG. 19 shows a flowchart of the reception / transmission process.
Show. 5) -3.6searchprocess   The search process is continuously performed according to the DPRAM address pointer as follows:
Explore     −Send requestIs set, the message to be transmitted (TX point Ta ),     Messages to be received (RX pointer), Ie receivedidentifierIs D
Whether it is stored in PRAM,     Should trigger an interrupt request in the CPU, ie an interrupt there
Message with request and interrupt enable set   searchThe process occurs when a real-time sequence upon transmission on the bus requires it
, Start of the DPRAM based on the message with the highest priority by starting the search
Reset to Searching the entire message is performed as an indivisible operation.
It is. In each clock cyclesearchThe process is the CPU's DPRAM
Settled in a cycle stealing process and Can be delayed by the clock cycle. After the end of an indivisible operationsearchThe process
, The semaphore variable againsearchUntil it can be set by the process itself
With higher priority due to DPRAM accesssearchEliminate the process
Can be. A flowchart of the search process is shown in FIG. 5) -3.7Interrupt processingprocess   Interrupt processingThe process is responsible for receiving messages or messages
The interrupt of the page is transferred to the CPU. Each time, depending on the arrangement in DPRAM,
The interrupt having the highest priority determined by the CPU is transferred to the CPU.Interrupt processing
A process runs without interruption, in parallel with other processes. First interrupt pointer
The period value is an empty address pointer. The flowchart of the interrupt handling process
As shown in FIG. 5) -4. Access control for DPRAM 5) -4.1 Access synchronization   Access to the DPRAM is defined by semaphore variables. this thing
ByData fieldandControl segmentTo related bytes
Indivisible access is guaranteed. For other accesses, the semaphore variable is reset
Until they are stopped. This makes it longer than one byteData fieldFrom beginning to end
Is protected. Multiple processes can set semaphore variables simultaneously.
And the following priority scheme applies: a.Store b.Road c.error d.Interrupt processing e.Receive / Send f.search   The CPU is excluded from the access processing using the semaphore. It's Cycles
With every teaming, you always have an immediate advantage over all other access. This rule
May occasionally break data consistency on CPU access
It is clear that there is. To avoid this, as is well known Must also be associated with an access rule having a semaphore. I
However, for this, CPUs currently on the market are not yet realized,
Special instructions are needed for indivisible processing of semaphores. 5) -4.2 DPRAM address pointer   The DPRAM is accessed from a variety of different sources. For example, CPU and
From a parallel process. The address then comes from:   -CPU address   −Empty pointer:   An address indicating an empty, ie, unsatisfied, message
Less pointer. Address pointerEmpty pointerWhen this is equal to
Is interpreted as nonexistent.   −Search pointer:   searchProcess address pointer   −TX pointer:   Address pointer to the message to be sent. The message is sent
If not,TX pointer=Empty pointer   −RX pointer   Address pointer to the message to be received. Message received
If not,RX pointer=Empty pointerIs   −Interrupt pointer:   An address pointer to a message that has a request to quit at the CPU. Shasha
If no request exists,Interrupt pointer=Empty pointerIt is.   The address pointer is the DPRAM address where the data is to be stored or read.
In order to obtain the source, it is processed in different processes. Address pointer
The actual access of DPRAMs using the system is organized according to its priority.
You. Indivisible access to multiple bytes set the semaphore variable itself
Use semaphore variables to block access to all processes except processes
It is done. 5) -4.3 Priority control   The priority control is performed by the CPU access to the DPRAM as schematically shown in FIG.
The set of variables and semaphore variables are arranged according to priority. The process is
The dress is not accessed by the CPU (no access is requested, and
Access is not prohibited) and the semaphore variable is occupied by another process.
No (semaphore =Row) Only when added to the address input side of DPRAM
Is allowed.Road,error,Interrupt processing,Receive / SendandsearchThe connection terminal of
, The details are not shown because they are the same as the stores.   The implementation for the block “Access Control” in the above schema is
It is repeated cyclically in the clock cycle, and is instructed in the flowchart shown in FIG.
Have been.   The invention's effect   According to the operation method of the vehicle data processing device according to the present invention,
Between computers with special requirements for coupling between control units in vehicles
This has the advantage that fast and reliable data transmission is possible.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of an embodiment for a linear bus structure, and FIG. 2 is a schematic diagram of an embodiment for a conductively coupled, asymmetric control of a bus line. Figure 3 is a schematic diagram of an embodiment for conductively coupled, symmetric control of bus lines;
FIG. 4 is a schematic diagram of an embodiment for symmetrical control using a conductively separated transformer, and FIG. 5 is an embodiment of an embodiment in which optical waveguides are arranged in a star shape as a bus. FIG. 6 is a schematic diagram of an embodiment in which optical waveguides are linearly arranged as a bus, FIG. 7 is a diagram showing a message structure, and FIG. 8 is a structure of a control field. FIG. 9 is a diagram showing a structure of a CRC field,
FIG. 10 is a diagram showing a configuration of an error report, FIG. 11 is a diagram showing a flowchart of a state diagram reception mode, FIG. 12 is a diagram showing a flowchart of a state diagram transmission mode, and FIG. FIG. 14 is a diagram showing a flowchart of a state diagram error process, FIG. 14 is a block circuit diagram of an interface module, FIG. 15 is a process control diagram, and FIG. 16 is a diagram showing a flowchart of a loading process. , FIG. 17 is a diagram showing a flowchart of the store process, FIG. 18 is a diagram showing a flowchart of the error process, FIG. 19 is a diagram showing a flowchart of the reception / transmission process, and FIG. FIG. 21 is a diagram showing a flowchart of the process, FIG. 21 is a diagram showing a flowchart of the interrupt processing process, and FIG. It is a schematic diagram showing a degree control,
FIG. 23 is a diagram showing a flowchart for explaining the implementation of access control.

Claims (1)

[Claims] 1. A method of operating a data processing device for a vehicle, wherein the data processing device includes a plurality of subscribers and a bus line interconnecting the subscribers for transferring messages, the method comprising: Messages are transmitted on the bus line, each message including an identifier and an ACK field ;
The identifier can be used to identify the message with respect to content and priority,
The identifier represents a priority for non-destructive bit-by-bit arbitration during a bus access, and each of the remaining subscribers of the subscriber receives the message directly from the bus line and the subscriber said message, the message is erroneous
Evaluates the message to determine whether it has been received and whether the subscriber should further process the message, and if the message is incorrect.
Each of the remaining subscribers when received without the A
In the CK field, the first dominant bit and the second dominant bit are transmitted.
A method of operating a data processing device for a vehicle, characterized in that : 2. 2. The method according to claim 1, wherein the identifier includes an address, data, a sensor signal, a final adjustment amount, an intermediate result, a synchronization command, and an action trigger command. . 3. 2. The method according to claim 1, wherein the identifier is characterized in that the identifier includes a rotation speed, a rotation speed gradient, an engine temperature, and a load on a driving engine. 4. 2. The method according to claim 1, wherein the identifier is characterized by command data from the lock prevention device and the slip prevention device. 5. A data processing device for transmitting messages with a plurality of subscribers;
A method of operating a data processing device for a vehicle, comprising: a bus line interconnecting any of the subscribers, wherein any of the subscribers transmits a message to the common bus line, each message including an identifier. and de, it can be identified with respect to the content and priority messages using the identifier, the subscriber at that time
Each has a list of identifiers formed and managed by each subscriber.
The list is internally stored regardless of the priority of the message on the bus line.
Designate the processing priority, and at any time the internal processing priority
Determine the sequence of messages to be prepared for transmission to the
One each of said subscriber, said all common message sent by any of the subscribers connected to the bus line to receive simultaneously and so as to evaluate, each subscriber of said subscriber before Symbol Method of operating a data processing device for a vehicle, characterized in that only messages containing identifiers matching the list of identifiers are received and further processed. 6. A data processing device includes a plurality of subscribers and a bus line interconnecting the subscribers for transmitting messages, each of the messages being a file.
A frame start bit, a head part including an identifier and a control field, a data part as a data field , a CRC sequence and a CRC delimiter.
A method of operating a data processing device for a vehicle, comprising: transmitting a frame start bit on the bus line; replacing the identifier with a name indicating the type of data transmitted in the data field; A permission level for determining the accessibility to the line, the permission to use the bus line according to a priority fixed in the head unit of the message, a bit level transmitted by each transmitter to the bus line, and Determining the bit level by comparing the bit level actually detected by the transmitter on the bus based on the bit level, and transmitting the message without destroying the information on the bus line if the bit levels are not the same. Stop and the head has the highest priority Complete the transfer, this time transfer after the data field
The transmitted CRC field includes the frame start bit and a data field.
And the CRC field, and in the CRC field, start the frame.
A method of operating a data processing device for a vehicle, comprising transmitting a CRC delimiter that is at a bit level opposite to a bit level . 7. Which is higher in message priority, head of another message
7. The method according to claim 6 , wherein the first bit is determined by dominating the first bit . 8. For a control system for a vehicle including a plurality of subscribers (1, 2,..., I..., N in FIG. 1) and a bus line interconnecting said subscribers for transmitting messages. in the data processing device in each subscriber, the bus line
In serial interface module for transmitting data via, IMP of calculated center apparatus (FIG. 14 for processing the data contained in the message
), A message storage unit (DPRAM in FIG. 14), the said storage unit and said computer system, a bus line for interconnecting to transmit messages between them, for connecting to the bus line it includes components, and means for transmitting a message, where the message storage unit identifier Contact
And a data field , each of the messages including an identifier in a head portion, the identifier indicating the content and priority of the message , and a table in the identifier. The assigned priority determines the permission of the message to use the bus line and the control segment
A pending bit is included, and the pending bit is transmitted on the bus line.
Indicates that the interrupt routine in the transfer or computer unit has not yet completed
Data processing apparatus, characterized in that that.