JP2540834B2 - MOS image sensor - Google Patents

Description

The present invention relates to a MOS type image sensor.

(Prior Art) Conventional MOS image sensors (surface sensor, line sensor) have a two-layer structure in which a diffusion layer is formed on a silicon substrate and a three-layer structure by two diffusion steps. There is.

FIG. 3 shows an MO having a three-layer structure formed by the two diffusion steps.
The sectional view of the light-receiving part of both ends of an S type line sensor is shown. In FIG. 3, reference numeral 25 is a substrate made of an N-type semiconductor of one conductivity type, and 23 is a potential well made of a P-type semiconductor having an opposite conductivity type to the substrate provided in the substrate 25 in common for all pixels (hereinafter referred to as a potential well). P
-We11), 21 and 26 are N ⁺ type semiconductors having the same conductivity type as the substrate that defines each pixel provided in the P-well, and are composed of the above three layers. All of these three layers are neutral regions. Reference numerals 22, 24, and 27 are depletion layers of the P-N junction portions of the above three layers.

In this example, a P-well is formed by forming a P-type semiconductor diffusion layer on an N-type semiconductor substrate in common for all pixels, and the P-well is formed.
A plurality of N ⁺ -type semiconductor diffusion layers are formed in the column so as to be independently arranged in columns. The junction capacitance between the N ⁺ type semiconductor and the P-well constitutes a light receiving section. A gate oxide film, a metal gate, and a wiring (not shown) are formed on the N ⁺ semiconductor to form a MOS switch for each pixel. The MOS switch is conductively controlled pixel by pixel to detect the charging current.

In the conventional three-layer structure as shown in FIG. 3, the number of electron-hole pairs corresponding to the light intensity is increased in the layers of the N ⁺ type semiconductors 21 and 26 for the incident light P1 and P2 to each pixel. appear. Depletion layer 22,
27 is previously charged to a constant voltage and recombines with electron-hole pairs generated by incident light. The charge current at the time of recharging the depletion layers 22 and 27 after a fixed time is detected as a signal. At this time, the incident light having a long wavelength reaches the P-well 23 which is deeper than the layers of the N ⁺ type semiconductors 21 and 26 and the substrate 25 which is deeper, and causes smear. However, in the three-layer structure shown in FIG. 3, the electron-hole pairs generated in the substrate 25 are isolated from each pixel by the depletion layer 24, that is, the N ⁺ type semiconductors 21 and 26. It is configured to prevent the diffusion of electron-hole pairs into the N ⁺ semiconductors 21 and 26. Therefore, there is a feature that signals are not mixed between pixels and crosstalk can be reduced.

[Problems to be solved by the invention]

However, in the conventional three-layer structure as described above, P-we
For the electron-hole pair generated in ll23, there is no potential barrier or junction that traps carriers between the two pixels, so the electron-hole pair can be easily transferred to the adjacent pixel. Spread. Therefore, there is a problem that crosstalk is reduced but not completely eliminated as compared with the conventional two-layer structure. That is, the electron-hole pairs generated in the N-type semiconductor substrate 25 (deep layer) are not mixed between the pixels, but the electron-hole pairs generated in the P-well 23 are mixed between the pixels. As a result, smears could not be completely removed, and bleeding at the edge portions of the shade of the image could not be completely removed, degrading image quality. This is P,
The same applies to the case where N is completely opposite to that shown in FIG. 3, that is, the N-well is formed on the P-type semiconductor substrate and the P-type semiconductor (P ⁺ diffusion) light receiving portion is formed on the N-well. is there.

The present invention solves these drawbacks and prevents electron-hole pairs generated in a deep layer (substrate) as well as electron-hole pairs generated in a potential well from diffusing beyond each pixel. Signals do not mix between pixels, that is, there is no crosstalk
The purpose is to propose the structure of a MOS type line sensor.

[Means for solving problems]

In order to solve the above problems, the present invention is configured to separate wells for each pixel.

[Action]

In the present invention, since the substrate and the well are completely separated in potential for each pixel, there is no mixing of signals between pixels, and crosstalk can be prevented.

〔Example〕

FIG. 1 is a plan view of two pixels of an embodiment of a MOS type line sensor of the present invention. In FIG. 1, 3 is a gate,
Reference numeral 4 is a read line, and 5 is a wiring for applying a constant voltage to the P-wells 13 and 18. In the case of P-well, it is at ground potential.
Reference numeral 6 is a contact hole for electrically connecting layers formed in the thickness direction of the device, 7 is a gate oxide film,
Reference numeral 8 is a diffusion of N ⁺ type semiconductor forming the drain of the MOS switch. Light receiving portions 11 and 16, gate oxide film 7, gate 3,
The drain 8 and the read line 4 form a switching element of a MOS type FET whose sources are the light receiving portions 11 and 16. Well 13,
18 are provided on the semiconductor substrate independently for each pixel.

The operation of one cycle for one pixel including the light receiving portion 11 of the MOS line sensor configured as described above will be described step by step.

First, raise the potential of the gate 3 and switch on the MOS type FET.
After turning on, the junction capacitance between the N ⁺ type semiconductor diffusion 11 and the P-well 13, which is the light receiving portion, is charged to a constant voltage through the read line 4. When charging is complete, turn off the MOS FET switch.
Electrons and holes generated according to the light incident on the light receiving unit 11 are
The charge previously charged to a constant voltage in the junction capacitance of the light receiving unit 11 is discharged. After a certain period of time, the gate 3 is turned on and the readout line 4
Then, the battery is charged again to a constant voltage, and the amount of charge discharged from the charging current is detected.

 FIG. 2 is a sectional view taken along the line 9-10 of FIG.

Minority carriers (electrons) of those generated in the P-well 13 among electron-hole pairs generated in the N ⁺ type semiconductor neutral region 11, the depletion layer 12, and the P-well 13 which are the light receiving regions by the incident light P1.
Part of it moves upward to discharge the electric charge accumulated in the junction capacitance, that is, the junction capacitance 12 between the N ⁺ type semiconductor 11 and the P-well 13 as described above. On the other hand, the other part moves downward and depletion layer 14, N
Along with the electron-hole pairs generated in the mold semiconductor substrate 15, a current flows out from the wiring 5 in FIG. 1, and the electric charge charged in the N ⁺ diffusion of the adjacent light receiving portion 21 is not discharged. Therefore, crosstalk does not occur.

 The scanner circuit is omitted in FIG.

In order to form such a structure, that is, the P-well is separated for each pixel, the photomask conventionally used when forming the P-well may be changed to a photomask separated for each pixel. .

In this way, without increasing the manufacturing process,
All wells are formed by the same diffusion process. That is, all wells have the same diffusion depth and concentration. Therefore, each light receiving portion and the MOS transistor are arranged on the well having the same diffusion depth and diffusion concentration as in the conventional case. Therefore, it is possible to prevent the occurrence of crosstalk without changing the light receiving characteristic from the conventional one.

In the embodiment, the N-type is used for one conductivity type and the P-type is used for the opposite conductivity, and a P-well is formed on a substrate made of an N-type semiconductor.
Although explained by the example of forming the N ⁺ type semiconductor in the −well,
The present invention is not limited to this, but can be applied to the present invention in a configuration in which P and N are reversed, that is, an N-well is formed on a substrate made of a P-type semiconductor and a P ⁺ diffusion light receiving portion is formed in the N-well. Of course. Further, although two pixels of the line sensor are shown in the embodiment, the present invention can be applied to a two-dimensional MOS type area sensor as well as a multi-pixel line sensor.

(Effects of the Invention) As described above, according to the present invention, in any of the layers stacked in the thickness direction of the device, a potential barrier or a junction or the like is generated between pixels for holes and electrons. It has a structure that captures all of the pixels, and each layer is completely separated for each pixel. The holes and electron pairs generated in each layer do not diffuse to other pixels, crosstalk is eliminated, and there is no smear. Type image sensor is obtained.

[Brief description of drawings]

1 is a plan view of an apparatus according to the present invention, FIG. 2 is a sectional view of FIG. 1, and FIG. 3 is a sectional view of a conventional apparatus. (Explanation of symbols of main parts) 3 ... Gate 4 ... Readout line 5 ... Well terminal 6 ... Contact hole 7 ... Gate oxide film 8 ... MOS type FET drain 11, 16, 21, 26 ... ... N ⁺ neutral region (light receiving portion) 13, 18, 23 ... well neutral region (P-well) 15, 25 ... semiconductor substrate neutral region 14, 17, 19, 21, 24, 27 ...... Depletion layer

Claims (1)

(57) [Claims] 1. A semiconductor substrate of one conductivity type is provided with a plurality of well diffusions of a conductivity type opposite to that of the semiconductor substrate, the well diffusions being electrically separated from each other, and each of the well diffusions is of the same conductivity type as the semiconductor substrate. 1. A MOS type image sensor, comprising: one light receiving part of the above, and one MOS switch using the light receiving part as a source.