JP2539392B2 - Elevator control device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an address setting circuit for an elevator input / output board, and in particular, even when the input / output board is increased or decreased depending on the size or specifications of the building, On the other hand, the present invention relates to an elevator control device that can be configured as an optimum input / output system.

[Conventional technology]

In the conventional elevator control device, as shown in FIGS. 9 and 10, a connector for inserting an input / output board and a circuit for setting each address on the backboard are provided, and the input / output board is connected to those connectors. By doing
Either select the address of the connected I / O board, or provide the input / output board with a switch that has multiple switches corresponding to the bits of the address data, and use the address when the I / O board is used. Switch each bit of the data one bit at a time
It was configured to be set to i "or" Low "and used as the address data required for each I / O board.

Incidentally, JP-A-52-142923 and the like can be cited as this type of prior art.

[Problems to be solved by the invention]

Among the above-mentioned conventional technologies, the method in which a connector for inserting an I / O board and a circuit for setting address data required for each I / O board on the backboard side is provided is the scale and specifications of the building to be delivered, such as an elevator. If the number of I / O points increases or decreases in accordance with the above, the number of unnecessary connectors that do not insert the I / O board may increase depending on the delivery destination. We had no choice but to deal with it by adding and manufacturing a connector with data and a backboard.

Unlike the above, the other conventional method using a display switch has an advantage that the address data can be freely set in each input / output board as needed, but a switch corresponding to a bit in the address data is used. Since it was necessary to set each one, there were many address setting errors, and as a result, there was a problem that the I / O board was erroneously selected or could not be selected. Further, since the above-mentioned display switch is a system for connecting terminals by contacting two contacts, if used in a low voltage and low current circuit, the input / output board can be selected after delivery due to contact failure between the contacts. There was a problem that it could not be done.

An object of the present invention is to standardize an input / output board in order to eliminate the above-mentioned drawbacks of the prior art, and the I / O address necessary for this input / output board can be easily set and confirmed when the input / output board is used. Furthermore, it is to provide a highly reliable method for setting the I / O address of the I / O board while being able to freely deal with the addition and change of the I / O address.

[Means for solving problems]

The purpose is to insert a connecting part into an input / output board having a plurality of input / output circuits and provide a socket or a connector that can be electrically connected.
By configuring so that all the bits necessary for selecting the I / O board in the address data can be specified at one time, it is possible to easily respond to address changes of the I / O board. It is possible to reduce such accidents.

[Action]

In the input / output system that sends and receives micro computer and multiple I / O boards by I / O address and I / O data, the socket of I / O board must be
Insert a connection component with different I / O addresses set in each I / O board, and send I / O address data from the microcomputer to the I / O board. This time,
A plurality of specific bit values in the I / O address data,
The values of a plurality of specific bits in the address data set by the connecting parts on the I / O board are compared, and when they match, another bit of the address data in the I / O board is decoded to select the I / O board. It is configured to do.

As a result, even if the buildings to be delivered have a wide variety of scales and specifications, extra components and equipment will be attached as before, or individual I / O boards will be manufactured for each delivered building. This eliminates the need for standardization of I / O boards, and the required number of I / O boards and the number of I / O boards required for each building to be delivered.
By simply setting the I / O address so that it becomes different address data, it becomes possible to freely cope with the variety of buildings.

In addition, I / O input from the microcomputer is provided by providing multiple sets of connection parts for I / O address setting of the I / O board.
When the value of the specified bit of the address data matches the value of the specified bit of the I / O addresses of the multiple sets set by the above-mentioned connecting parts, the other bits of the address data in the I / O board are decoded and input. It is configured to select the output board.

This enables I / O input from the micro computer.
Since the data of the address and the I / O address set on the I / O board can be checked at least twice, there is a mistake in setting the I / O address on the I / O board. It can prevent malfunction,
The reliability can be improved.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 is a block diagram showing the overall structure of the present invention. 1 is a microprocessor (hereinafter abbreviated as MPU), 2
Is ROM, 3 is RAM, 5 is parallel interface (hereinafter PIA
Abbreviated. ), According to the scale of each input / output, PIA ₁ ~
It consists of N PIA _N. 8 is an input / output board; 7 is an input / output board 8; and an address setting circuit for selecting a specific input / output board from a plurality of input / output boards 8.
Reference numeral 6 is a connector for electrically connecting the PIA 5 and the input / output board 8, and 6 to 8 are connectors 1 like the PIA 5.
˜N connectors N, A ₁ ˜A _N , I / O ₁ ˜I / O _N.

FIG. 2 shows a detailed circuit of the address selection circuit 7 in the overall configuration of FIG.

The configuration will be described with reference to FIG. 2. S is a socket for setting the I / O address of the input / output board 8. One end S1 to S8 of the socket S is connected to GD, and the other end is connected to the input / output board 8. I / O address bus AS for setting the address of
Via SW1 to SW8 via pull-up resistor R and
It is connected to one of the inputs of the address data comparison circuits COM1 and COM2. Further, the address data comparison circuit COM1
And the other input of COM2 is connected to MP via the address bus A.
It is connected to a specific bit of U1's address.
The output signal V1 of is connected to the input terminal for setting the comparison condition of COM2.

Next, the operation will be described. Both ends S1 to S8 of the socket S
At first, nothing is connected between SW1 and SW8, so it is in the open state. Therefore, Vcc is applied to SW1 to SW8 of the socket S by pull-up resistor R, and the output set by the socket S. All data are in the "Hi" state. In such a state, S1 to S4 of socket S
1 block, the remaining S5 to S8 are the other 1 block, and S1 and S5, S2 and S6, S3 and S7, and S4 and S8 in each block.
Is the corresponding bit of the address data. Next, for example, S1 and SW1 in the socket S are short-circuited with a connecting part, and S5 and SW5 of another block corresponding to S1 are short-circuited with a connecting part.

As a result, the output signal of the S-socket becomes "Low" only in SW1 and SW5, and becomes "Hi" in the other SW2-4 and SW6-8.

Next, from the MPU1, address data comparison circuits COM1 and CO
I / O address data A _{4 to} A ₇ to M2 via address bus A
, But the address data comparison circuits COM1 and COM2
Is such that an output signal is generated when the input terminal for setting the comparison condition is "Hi", and when the bits of the A and B inputs match, such as A ₀ = B _{0 to} A ₄ = B ₀ . because you have configured, the address data comparison circuit COM1 _{is, SW1 = A 4, SW2 =} A 5, SW3 = A 6,
Generates output signal V ₁ when all SW4 = A ₇ match. However, input for setting the comparison condition of the address data comparison circuit COM2 is because when the timing described above, "Hi" and not summer, the temporary, SW5 = A ₄ to SW
Even if 8 = A ₇ match, the decoder input signal is not output and the I / O board is not selected.

Next, the output signal of the address data comparison circuit COM1 described above.
After V ₁ switches from “Low” to “Hi”, the same I / O address data A _{4 to} A ₇ is input from the MPU 1 to the address data comparison circuit COM 2 again. As a result, when SW5 = A ₄ ~SW8 = A ₇ are satisfied, the address data comparison circuit COM2 is a decoder input signal V ₂ is generated, and performs an operation for selecting the input and output board.

In this embodiment, I / O is provided between the elevator control micro computer (1) and the plurality of input / output boards (8).
In the control device that operates by communicating with the O address and the I / O data, the socket (S) as the I / O address setting means provided on the input / output board (8) (in the address setting circuit attached) , A plurality of specific bits (A4 to A) in the I / O address input from the computer (1).
7) and I / O board (address setting circuit attached to)
Setting bit in the I / O address of (SW1 to SW4 or SW5 to SW
8) two comparison means (COM1 and COM2) for comparing with
In response to the comparison result of one of these comparison means being responsive to the comparison result of the comparison means of this other comparison means and the means (V1) permitting the comparison operation of the other comparison means , A means (DEC) for inputting the outputs (A1 to A3) of the computer.

Further, the socket (S) as the I / O address setting means sets the I / O addresses of the I / O board (8) (address setting circuit attached thereto) into two blocks (SW1 to SW1).
SW4 and SW5 to SW8) are provided, and means for changing the settings so that the corresponding bits for each block match each other is provided.

According to the present embodiment, by providing a socket on the I / O board and short-circuiting both terminals of the socket with a connecting component, the address of each I / O board can be freely set, and the I / O board can be added or changed. On the other hand, the address of the input / output board can be set without adding or changing the parts or circuit configuration of the input / output board.

Further, since the socket is divided into a plurality of blocks and the I / O board is selected when a specific bit in the address data set in each block matches, the address of the I / O board is selected. This has the effect of preventing double selection and erroneous selection due to setting errors. In particular, in an elevator in which a high-voltage / high-voltage circuit that controls an elevator drive motor and a low-voltage / light-current device such as a computer must be mounted in the same control panel, the noise generated from the high-voltage / high-voltage circuit is extremely large. As described above, since the address comparison timing is purposely shifted so as to be in two stages, even if noise is generated, the same timing will be obtained in both times, and the same error data will be obtained in both times. The probability is so small that
The problem of mistakenly selecting the I / O board is eliminated, and the reliability can be greatly improved.

FIG. 3 shows an example of a configuration in which address data A _{1 to} A ₃ for selection in the input / output board and a decoder DEC are added to FIG.

The operation will be described with reference to FIG. 3. The boat selection of the input / output board is performed in the same manner as in FIG.
Other bit signals in address data for on-board selection
Enter A _{1 to} A ₃ . As a result, the decoder DEC outputs its output Y ₀ ~ depending on the data values of the in-board selection signals A ₁ ~ A _3.
By generating one output in the Y _7, in O board Y ₀ to Y ₇
The input / output circuit corresponding to is selected.

In this embodiment, "a control device for communicating and operating between a control microcomputer MPU and a plurality of input / output boards 7 by I / O addresses A1 to A7 and I / O data, the plurality of input / output boards 7 Is an I / O address input section for inputting the I / O addresses A1 to A7
71, 72, an I / O data input section 73 for inputting the I / O data, a plurality of input / output ports 74 for inputting / outputting according to the I / O data, and for each of the plurality of input / output boards 7. Address setting means 75 for setting different addresses on each board by inserting different address changing parts, and specifying a plurality of I / O addresses input from the I / O address input section 71. When the address collating unit 76 that collates the address of the bits A4 to A7 and the setting value set by the address setting unit 75, and the address collating unit 76 detects a match,
Output Y0 for selecting the corresponding output port among the plurality of input / output ports 74 according to the address of the other plurality of bits A1 to A3 of the I / O address input from the I / O address input section 72 ~ Y7 output I / O port selection means (decoder) DEC ”.

According to this embodiment, an address for selection of input and output boards A ₄ and 4 bits of to A _7, further address for selection of the individual input and output circuits in the input and output board A ₁ to A ₃ Of 3
Since this is a bit, there is an effect that a maximum of 2 ⁴ × 2 ³ = 128 types of input / output circuits can be selected.

FIG. 4 shows a configuration example in which address data A ₀ for separately selecting input and output is added to FIG.

The operation will be described with reference to FIG. 4. The address data A ₀ contacts the input terminal C2B of the decoder DEC so that the outputs Y _{0 to} Y ₇ of the decoder DEC operate when A ₀ is “Low”. It is what constitutes.

According to the present embodiment, when A ₀ is “Low”, only the output board can be selected from the input / output boards. Therefore, the data bus of the input / output double selection can be selected. Since it can prevent collisions and can be selected by dividing it into input and output, it is 128 × 2 times = 2 more than in Fig. 3.
The effect is that 56 types of input / output circuits can be selected.

Although FIG. 4 has described the selection of the output board using A ₀ and the input G2B of the decoder DEC, A ₀ becomes “Hi” by adding an inverter to the input stage of G2B.
Under this condition, the same operation as described above can be performed, which can be applied to the selection of the input board, and the same effect as described above can be obtained.

FIG. 5 shows an embodiment showing a structure for setting an address in the input / output board in FIGS. 1 to 4.

 The structure and operation will be described with reference to FIG.

As shown in FIG. 2, the socket S has lower terminals S1 to S8.
Is connected to GD, and the upper terminals SW1 to SW8 are connected to Vcc via a pull-up resistor R. Next, it can be inserted into the socket S and the upper and lower terminals SW1 to SW4 and S1 to S4 and SW5 to SW8
Prepare connecting parts 91 to 94 that can short-circuit S5 to S8 with any number. This connecting part will be described in detail with reference to the embodiment shown in FIG. 5. The connecting parts 91, 9 marked with No. 1 mark will be described.
2 has only a lead terminal that can be connected to the terminal portion corresponding to the upper terminal SW1 (or SW5) of the socket S, and has lead terminals at the terminal portions corresponding to the other SW2 to SW4 (or SW6 to SW8). Without a structure that cannot be connected.

Also, the connecting parts marked with No. 2 93, 94 are No.
Different from 1, there is a lead terminal only in the terminal part corresponding to SW2 (or SW6) and there is no lead terminal in other terminal parts.

Next, connecting parts 91-94 marked with No. 1 and No. 2 marks
For the terminal parts corresponding to S1 to S88,
S corresponding to W1 (or SW5) and SW2 (or SW6)
Only 1 (or S5) and S2 (or S6) may have lead terminals, or all terminals S1 to S4 (or S5 to S6) may have lead terminals.

Therefore, if two sockets with the above-mentioned No. 1 mark are jointly connected to the socket S, SW1 of the socket S
, S1 and SW5 and S5 are short-circuited, and as a result, the address data set in the I / O board becomes
Both of them match the input I / O address data from MPU1 and this input / output board is selected.

Unlike the above, if the connecting parts 91, 92 with the No. 1 mark are connected to one of the terminals of the S socket and the connecting parts 93, 94 with the No. 2 mark are connected to the other terminal of the S socket, Since the short-circuited part of each pin is different, such as SW1 and S1 and SW6 and S6, one of them does not match the I / O address data from MPU1 and this I / O board is not selected.

According to this embodiment, since the I / O address required for selecting each input / output board can be freely set, added, and changed, the degree of freedom for adding and changing the building system is increased. effective. Also, as mentioned above, I / O
Since the setting of the address and the production of the input / output board can be performed separately, there is an effect that the standardization of the input / output board and the cost reduction due to the mass production can be achieved accordingly.

FIG. 6 shows another embodiment in which the address of the input / output board can be set by a method different from that of FIG.

From FIG. 6, the difference from FIG. 5 is that the required No. 1 to 8 between the terminals 9a and 9b for setting the I / O address are connected by lapping or soldering. is there.

As a result, it is more difficult to change the I / O address of the I / O board after setting it, as compared with the embodiment shown in FIG. 5, but problems such as poor contact due to the connecting parts 91 to 94 and the socket S. There is no point and there is an effect that reliability can be improved.

FIG. 7 is a plan view showing a plurality of input / output boards having the I / O address setting circuits shown in FIGS.
Back board B between the MPU1 printed board and the I / O board 8
2 shows an embodiment in which an I / O address and data are sent and received via the connector 6 and the connector 6.

According to this embodiment, the setting of the I / O address required for the I / O board 8 can be made completely different from the positions of the backboard B and the connector 6, so that the I / O of the I / O baud 8 is set by the address selection circuit 7. After the address is set, the I / O board 8 can be inserted into any connector 6 of the backboard B to operate, so that the system configuration of the I / O board can be handled very freely.

Unlike FIG. 7, FIG. 8 shows another embodiment in which the I / O address and the data with the MPU 1 are sent and received by the flat cable F without using the backboard B. .

In the case of the embodiment shown in FIG. 7, it is necessary to prepare in advance the size of the backboard B and the number of connectors 6 that can be inserted in consideration of the necessary amount. However, the size of the backboard B and the number of points of the connector 6 are costly.

Therefore, in the embodiment of FIG. 8, the required number of input / output boards 8 is increased according to the scale and specifications of the building,
The connection between the MPU1 and the I / O board 8 will be a structure in which they are sequentially connected by a flat cable.

According to this, there is an effect that an extra connecting part or connecting part is eliminated, and the system can be configured with the smallest number of parts according to each building.

〔The invention's effect〕

According to the present invention, it is possible to easily set and change the I / O address required for selecting the I / O board, and to set and change all the necessary bits in the I / O address data at once. Since it is possible to deal with various building scales and specifications freely, standardization of I / O boards reduces cost, reduces maintenance types, and prevents accidents due to I / O address setting errors and contact failures. Therefore, there is an effect that the reliability can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing the overall structure of the present invention, and FIGS.
FIG. 4 is an embodiment diagram showing an I / O address selection circuit according to the present invention, FIGS. 5 to 6 are one embodiment diagram showing an I / O address setting method according to the present invention, and FIG. Insert the I / O board according to the present invention into the rack and use the backboard to
FIG. 8 is a block diagram showing the overall configuration of the prior art, FIG. 9 is a diagram showing another configuration showing the configuration connected to the MPU by a flat cable, and FIG.
FIG. 10 is a circuit diagram showing an I / O address selection circuit of the prior art FIG. 1 ... MPU, 6 ... connector, 7 ... address setting circuit, 8 ... input / output board, S ... address setting socket, A ... address bus, AS ... address setting, data bus, A ₄ ~ A ₇ ... I / O address data, COM1, 2 ... address comparison circuit, A _{1 to} A ₃ ... in-board selection address data, A ₀ ... output board strobe address data.

Claims (2)

(57) [Claims] 1. A controller for communicating between an elevator control microcomputer (1) and a plurality of input / output boards (8) by means of I / O addresses and I / O data, wherein the input / output boards (8) are operated. I / O address setting means (S), a plurality of specific bits ((A4 to A7) in the I / O address input from the computer (1), and I / O board I / O
In response to two comparison means (COM1 and COM2) comparing the setting bits (SW1 to SW4 or SW5 to SW8) in the O address and one of these comparison means being matched, the other The means (V1) for permitting the comparison operation of the comparison means and the means (DEC) for inputting the outputs (A1 to A3) of the computer in response to the comparison result of the other comparison means Elevator control device characterized by 2. The I / O address setting means (S) according to claim 1, wherein the I / O address of the input / output board is divided into two blocks (SW1 to SW4 and SW5 to SW).
An elevator control device, characterized in that it is divided into 8) and is provided with means for changing the settings so that the corresponding bits for each block match.