JP2537347B2 - Speed control device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a speed control device, and more particularly to a speed control device that controls a rotation speed of a motor using a phase locked loop (PLL) circuit.

[Prior Art] FIG. 5 is a schematic block diagram of a conventional speed control device using a PLL circuit.

First, a conventional speed control device will be described with reference to FIG. A command pulse is externally applied to the phase difference detection circuit 1, and a rotation signal corresponding to the rotational speed is applied from a rotary encoder 8 that detects the rotational speed of the motor 6. The phase difference detection circuit 1 detects the phase difference between the command pulse and the rotation signal and gives a detection signal having a pulse width corresponding to the phase difference to the loop filter 2. The loop filter 2 removes a high frequency component included in the detection signal, and outputs a detection signal having a pulse width corresponding to the phase difference to the phase advance circuit 3 as an analog signal. The phase advance circuit 3 is a filter for ensuring a phase margin.

The output of the phase advance circuit 3 is given to the current control circuit 4. The current control circuit 4 is supplied with a detection signal from a current detector 7 that detects the current supplied to the motor 6. The current control circuit 4 controls the current supplied from the power amplification circuit 5 to the motor 6 by removing the influence of the induced voltage coefficient generated in the motor 6. Then, the power amplification circuit 5 drives the motor 6 based on the output of the current control circuit 4.
The rotation number of the motor 6 is detected by the rotary encoder 8, and a rotation signal corresponding to the rotation number is given to the phase difference detection circuit 1 as described above.

[Problems to be Solved by the Invention] The speed control device using the PLL circuit shown in FIG. 5 described above is widely used in a highly accurate rotation speed control system. However, in recent years, along with the stability of the number of rotations in a steady state where the phase is locked, the applications for starting and stopping at high speed are increasing. For example, in a magnetic disk inspection device, the rotation speed is 3600 rpm from the stopped state.
It is necessary to start up in about 2 seconds until it reaches the limit, and inspect the disk in a state where it is rotating with high accuracy in a steady state (3600 rpm), and then stop in about 2 seconds to complete a series of operations.

However, the PLL circuit can perform the pull-in operation with high accuracy and at high speed after the phase is locked or near the phase lock, but when it is far from the locked state, the acceleration or deceleration torque is small, It is not suitable for such rapid acceleration / deceleration. In particular, when the phase lead circuit 3 is provided to ensure stability as shown in FIG. 5, it is used in a high gain part in a relatively high frequency range at the time of locking, and stability is maintained. Is dripping
However, at the time of rapid acceleration / deceleration, the power amplifier circuit is used in a substantially saturated state, so that a gain in a low frequency range (direct current) is required, but this is not satisfied.

Therefore, a main object of the present invention is to provide a speed control device capable of not only ensuring stability in a steady state but also controlling speed by following rapid acceleration / deceleration such as starting and stopping. is there.

[Means for Solving Problems] The present invention detects phase difference between a command signal and a motor rotation signal detected by an encoder, and a high frequency component from a detection signal of the phase difference detecting means. Phase synchronization including a loop filter for removing, a phase control means including a capacitor for controlling the phase of the output of the loop filter to advance, and a motor drive means for driving a motor based on the output of the phase control means In the speed control device composed of the coupling loop, in response to the frequency difference detecting means for detecting the frequency difference between the command signal and the rotation signal of the motor, and the frequency difference detecting means detecting the predetermined frequency difference,
And a switch means for increasing the gain in the low frequency range by disabling the capacitor to eliminate the phase lead.

[Operation] The speed control device of the present invention detects that the frequency difference between the command signal and the rotation signal of the motor increases during rapid acceleration / deceleration, and disables the capacitor included in the phase control means to disable the phase control means. The acceleration / deceleration torque can be increased by greatly increasing the DC gain and accelerating / decelerating the motor with the maximum output of the driving means.

[Embodiment of the Invention] FIG. 1 is a schematic block diagram of an embodiment of the present invention, FIG. 2 is a specific block diagram of the frequency difference detection circuit shown in FIG. 1, and FIG. FIG. 3 is a specific block diagram of the phase lead circuit and switch means shown in FIG. 1.

The configuration of an embodiment of the present invention will be described with reference to FIGS. The phase difference detection circuit 1, the loop filter 2, the phase advance circuit 3, the current control circuit 4, the power amplification circuit 5, the motor 6, and the current detector 7 in FIG.
And the rotary encoder 8 are the same as those shown in FIG.
The fifth point is that the frequency difference detection circuit 9 and the switch means 10 are provided.
Different from the figure. The frequency difference detection circuit 9 detects the frequency difference between the command pulse given to the phase difference detection circuit 1 and the rotation signal detected by the rotary encoder 8 according to the rotation speed of the motor 6. When the frequency difference between the command pulse and the rotation signal exceeds a predetermined value, the frequency difference detection circuit 9 closes the switch means 10 and short-circuits both ends of the capacitor C included in the phase advance circuit 3. As shown in FIG. 2, the frequency difference detection circuit 9 includes an f / V conversion circuit 91 that converts the command pulse frequency f1 into a voltage, an f / V conversion circuit 92 that converts the rotation signal frequency f2 into a voltage, It is configured by a comparator 93 that compares the outputs of the f / V conversion circuits 91 and 92.

Further, the phase advance circuit 3 includes an operational amplifier 31 as shown in FIG. One end of the operational amplifier 31 is grounded, the other end is connected in parallel with a series circuit including a capacitor C and a resistor R1, and the resistor R2, and the resistor R3 is connected between the other end and the output end. It The switch means 10 is connected to both ends of the capacitor C. The switch means 10 is composed of, for example, a relay or an analog switch.

FIG. 4 is a diagram showing gain-frequency characteristics of the phase lead circuit when the capacitor is short-circuited and when the capacitor is not short-circuited.

Next, the specific operation of the embodiment of the present invention will be described with reference to FIGS. When the motor 6 is stopped, the rotary encoder 8 does not output a rotation signal. At this time, when the command pulse is applied to the phase difference detection circuit 1, the frequency difference detection circuit 9 detects the frequency difference between the command pulse and the rotation signal. That is, the f / V conversion circuit 91 of the frequency difference detection circuit 9 determines the frequency f of the command pulse.
1 is converted into voltage V1 and applied to one input terminal of the comparator 93. On the other hand, the f / V conversion circuit 92 converts the frequency f2 of the rotation signal into the voltage V2, but since the motor 6 is not rotating, the voltage V2 of almost 0 V is output and given to the other input end of the comparator 93.

The comparator 93 compares the voltages V1 and V2, detects that the difference between them is large, and closes the switch means 10. As a result, the capacitor C of the phase advance circuit 3 is short-circuited and disabled. At this time, if the resistor R1 is made smaller than R2, the gain of the phase advance circuit 3 in the low frequency range is significantly increased as shown in FIG. 4 (b). Therefore, the operational amplifier 31 operates in a substantially saturated state. Since the output of the operational amplifier 31 becomes the current command value for the current control circuit 4, the current control circuit 4 drives the motor 6 by the power amplification circuit 5 so as to supply the maximum current to the motor 6. Thereby, the motor 6 is rapidly accelerated. In this acceleration mode, the PLL circuit mode does not operate at all, but operates in an open state.

When the motor 6 rotates, the rotary encoder 8 outputs a rotation signal according to the number of rotations and gives it to the phase difference detection circuit 1. When the frequency of the command pulse and the rotation signal becomes equal to or lower than a predetermined value, the frequency difference detection circuit 9 switches the switch means 10
open. Thereby, the capacitor C of the phase advance circuit 3
Is enabled and, as shown in FIG. 4 (a), an operational amplifier
The low-frequency gain of 31 is reduced, and the phase-advancing operation of the phase-advancing circuit 3 acts, so that the steady-state PLL described in FIG.
Move to control mode.

When a command pulse having a relatively low frequency for decelerating the motor 6 is given to the phase difference detection circuit 1, the frequency difference detection circuit 9 causes the frequency difference between the rotation signal of the relatively high frequency from the rotary encoder 8 and the detection pulse. Is detected and the switch means 10 is closed again. As a result, the capacitor C of the phase advance circuit 3 is disabled, the gain of the operational amplifier 31 in the low frequency range is increased, and the operational amplifier 31 is saturated as in the acceleration. And this operational amplifier
Based on the output of 31, the current control circuit 4 has the power amplification circuit 5
On the other hand, the motor 6 is driven so as to be decelerated by the maximum current. As a result, the motor 6 is rapidly decelerated.

As described above, according to this embodiment, when the motor 6 is rapidly accelerated or decelerated, the PLL control mode is opened and the motor 6 is driven with the maximum current in the open state. Alternatively, the torque during deceleration can be increased. Then, in the steady state, the rotation speed of the motor 6 can be locked to the phase of the command pulse to perform speed control with high accuracy.

In the above embodiment, the case where the rotary type motor is used as the motor 6 has been described, but it goes without saying that the present invention can be applied to speed control of a linear motor without being limited to this.

Further, in the above-mentioned embodiment, the frequency difference detection circuit 9 is set to f / V.
Although the conversion circuits 91 and 92 and the comparator 93 are used, the present invention is not limited to this, and the command pulse and the detection pulse from the rotary encoder 8 may be respectively counted by the up / down counter and the respective count values may be compared. Good.

As described above, according to the present invention, the frequency difference between the command signal and the rotation signal of the motor detected by the encoder is detected, and when the frequency difference is large, the capacitor included in the phase control means is I disabled it and drastically increased the gain in the low frequency range to drive the motor,
The torque during acceleration / deceleration can be extremely increased. Moreover, when the number of rotations of the motor becomes normal, the capacitor of the phase control means is enabled, so that the speed of the motor can be controlled with high accuracy.

[Brief description of drawings]

FIG. 1 is a schematic block diagram of an embodiment of the present invention.
FIG. 2 is a specific block diagram of the frequency difference detection circuit shown in FIG. FIG. 3 is a concrete block diagram of the phase advance circuit and switch means shown in FIG. FIG. 4 is a diagram showing gain-frequency characteristics of the operational amplifier when the capacitor is short-circuited and when the capacitor is not short-circuited. FIG. 5 is a schematic block diagram of a conventional speed control device. In the figure, 1 is a phase difference detection circuit, 2 is a loop filter, 3 is a phase lead circuit, 4 is a current control circuit, 5 is a power amplifier circuit, 6 is a motor, 7 is a current detector, 8 is a rotary encoder, and 9 is Frequency difference detection circuit, 10 is switch means,
31 is an operational amplifier, 91 and 92 are f / V conversion circuits, 93 is a comparator, C is a capacitor, and R1, R2, and R3 are resistors.

Claims (1)

(57) [Claims] 1. A phase difference detecting means for detecting a phase difference between a command signal and a rotation signal of a motor detected by an encoder, and a loop filter for removing a high frequency component from a detection signal of the phase difference detecting means. A phase-locked coupling loop composed of phase control means including a capacitor for controlling the phase of the output of the loop filter to advance, and motor drive means for driving the motor based on the output of the phase control means. In the speed control device described above, a frequency difference detection unit that detects a frequency difference between the command signal and the rotation signal of the motor, and the frequency difference detection unit detects the predetermined frequency difference, A speed control device comprising: a switch means for disabling to eliminate phase lead and increasing a gain in a low frequency range.