JP2532081Y2 - IC test equipment - Google Patents

Description

[Detailed description of the invention] "Industrial application field" This invention relates to an IC test apparatus for testing whether or not an IC operates normally.

[Prior Art] FIG. 3 shows a configuration of a conventional IC test apparatus. 1 in the figure is IC
The test apparatus main body 2 is a pin electronics board, and 3 is an IC under test.

In other words, the IC under test 3 is the pin electronics board 2
Is connected to the IC test apparatus main body 1 via the PC and an operation test is performed. The pin electronics board 2 performs an operation of supplying a test pattern signal to each terminal (hereinafter referred to as a pin) of the IC under test 3 and taking in a response output signal of the IC 3 under test.

The figure shows a configuration of a test pattern signal driving circuit for one pin and a signal capturing circuit. In other words, 4A is a drive circuit that supplies a test pattern signal to the pin of IC3 under test.
B indicates a signal capturing circuit that captures a response output signal output to a pin of the IC under test 3. This signal acquisition circuit 4B is constituted by a voltage comparator, and outputs a response output signal as an H logic signal and an L logic signal.
An operation of determining and taking in any of the logic signals is performed.

5 is a terminating resistor. One end of the terminating resistor 5 is connected to and separated from a connection point (hereinafter referred to as an input / output point I / 0) between the drive circuit 4A and the signal acquisition circuit 4B by a relay 6, and the other end is connected to the first terminal.
It is connected to a bias voltage source 7 (for example, -0.8 V). The relay 6 is turned on in the test mode and functions as a terminating resistor of the driving circuit 4A and a terminating resistor of the output circuit of the IC 3 under test.

Reference numeral 8 denotes a calibration amplifier. The calibration amplifier 8 is connected to the input / output point I / 0 by the relay 9 in the phase calibration mode, and supplies a phase calibration signal to the input / output point I / 0.

 The phase calibration is performed as follows.

The relay 6 is turned off and the relay 9 is turned on. In this state, a phase calibration signal is supplied to the input / output point I / 0 through the calibration amplifier 8. The signal acquisition circuit 4B captures the calibration signal given to the input / output point I / 0, and adjusts the variable delay element 11 inserted in the path of the signal acquisition circuit 4B to adjust the signal.
Adjust the phase of the 4B path. This phase adjustment is performed by the IC under test
Is performed for each signal capturing circuit connected to each pin, and the variation in the phase of the signal capturing circuit system for each pin is made uniform.

After the phase adjustment of the path of the signal acquisition circuit 4B is completed, the relay 9 is turned off, the calibration amplifier 8 is disconnected from the circuit, and the drive circuit 4A outputs a phase calibration signal. The phase calibration signal is captured by the signal capturing circuit 4B, and the phase of the signal is adjusted by operating the variable delay element 12 provided on the path of the drive circuit 4A. This adjustment is performed for each pin so that the phase of the drive circuit system matches each pin. Thus, the phase calibration of the pin electronics board 2 is completed.

"Issues to be solved by the invention" I / O points I / O of the pin electronics board 2
0 is connected to two relays 6 and 9. As the relay, a high-speed relay is used, and a relay excellent in high-frequency characteristics is used in consideration of not deteriorating a signal transmission waveform.
Therefore, there is a disadvantage that the cost is increased. Furthermore, the relay 6 and 9 has a stray capacitance C ₁ and C _2, the stray capacitances C ₁ and C ₂ is to be connected to the input and output points I / 0, deteriorates the signal waveform at this point There are drawbacks.

That is, the waveforms of the test pattern signal supplied to the IC under test 3 and the response output signal output from the IC under test 3 are deteriorated, and the performance of the IC test apparatus is deteriorated due to the deterioration of the waveform.

The purpose of this invention is to reduce the stray capacitance at the input / output point I / 0 and to provide an IC test device with good performance.

[Means for Solving the Problems] In the present invention, a calibration signal generation function is added to the terminating resistor, thereby eliminating the need for a calibration amplifier and reducing the number of relays by one.

That is, in the first invention of this application, a switching element is connected to both ends of the terminating resistor, and in the calibration mode, the switching element is turned on and off alternately to vary the current flowing through the terminating resistor, and this current is changed. A voltage waveform is generated in the terminating resistor by the fluctuation of the voltage, and this voltage waveform is used as a calibration signal, and both the switch elements are controlled to be in an off state in the test mode. In this state, the terminating resistor operates as an original terminating resistor.

In the second invention of this application, a second bias voltage source for giving another logical value of the calibration signal in addition to the original first bias voltage source to the other end side of the terminating resistor, and the other end of the terminating resistor to the first end. A switching circuit alternately connected to the bias voltage source and the second bias voltage source is provided, and the switching operation of the switching circuit gives a calibration signal waveform to the terminating resistor.

In this way, by providing the terminating resistor with the function of generating a calibration signal, a calibration amplifier becomes unnecessary. As a result, there is no need for a relay for connecting and disconnecting the calibration amplifier, the number of relays can be reduced by one, and there is an advantage that the stray capacitance at the input / output point I / 0 can be reduced.

[Embodiment] Fig. 1 shows an embodiment of the first invention of this application. In FIG. 1, parts corresponding to those in FIG. 3 are denoted by the same reference numerals.

In the first invention of this application, switching elements Q ₁ and Q ₂ are connected to both ends of the terminating resistor 5. In this example, switch element Q ₁
The Q ₂ shows a case where the configuration of transistors. Connect the collectors of the transistors constituting the switching elements Q _1, Q ₂ at both ends of the termination resistor 5, the emitter common connection, to connect the common connection point through a current source circuit 13 to the negative power supply, for example.

The base of the transistor constituting the two switching elements Q _1, Q ₂ connects the calibration signal source 14, switching elements Q _1, Q ₂
Are turned on and off alternately. Since the switching elements Q ₁ and Q ₂ are turned on and off alternately, especially when the switching element Q ₂ is turned on, a current flows from the first bias voltage source 7 to the terminating resistor 5, Generates a voltage drop. The amplitude of this voltage drop can be set by the current i ₁ flowing through the current source circuit 13, it is possible by setting the current value to obtain a legitimate amplitude of the calibration signal.

Therefore, by turning on the relay 6, a calibration signal can be given to the input / output point I / 0.
The phase of the path of B can be adjusted.

Uncalibrated mode controls nic4 third switching element Q _3. Third switching element Q ₃ switching elements Q _1, Q ₂ by is controlled to the ON state is turned off, the terminating resistor 5 is in a state of operating as the original termination resistor. In the test mode, some elements do not require the terminating resistor 5 depending on the type of the IC 3 under test. In such a case, the relay 6 is turned off. For this purpose a relay 6 is present.

 FIG. 2 shows an embodiment of the second invention of this application.

In the second invention of this application, a first resistor is provided at the other end of the terminating resistor 5.
In addition to the bias voltage source 7, a second bias voltage source 7A for providing the other logical value of the calibration signal is provided.
Is provided with a switching circuit 15 for switching the other end side to the first bias voltage source 7 and the second bias voltage source 7A.

The switching circuit 15, for example of two different in conductivity type switching element Q _1, Q ₂ are connected in common emitter constitutes the complementary connecting circuit, calibration signal source 14 to the base of the two switching elements Q _1, Q ₂ To turn on and off alternately by giving a calibration signal from the first bias voltage source 7 to the other end of the terminating resistor 5.
And the second bias voltage source 7A are connected alternately to generate a calibration signal.

The test mode to maintain the switching element Q ₁ to ON-state by outputting the H logic signal from the calibration signal source 14, in a state the other end of the termination resistor 5 is connected to a first bias voltage source 7, the original Operate as a terminating resistor.

"Effects of the Invention" As described above, according to the invention, a calibration signal generation function is added to the terminating resistor, so that a conventional calibration amplifier is not required. As a result, a relay for disconnecting the calibration amplifier from the input / output point I / 0 becomes unnecessary, and only a relay for disconnecting the terminating resistor 5 from the input / output point I / 0 can be used.

Therefore, only one relay is connected to each input / output point I / 0 for each pin, and the stray capacitance at the input / output point I / 0 can be halved. The deterioration of the signal waveform output from the IC 3 can be reduced, and in this regard, the performance of the IC test apparatus can be improved.

Also, since the number of relays can be halved in correspondence with the number of pins, the number of expensive relays can be reduced. As a result, cost reduction can be expected.

[Brief description of the drawings]

FIG. 1 is a connection diagram showing an embodiment of the first invention of this application, FIG. 2 is a connection diagram showing an embodiment of the second invention of this application, and FIG.
FIG. 1 is a connection diagram for explaining a conventional technique. 1: IC test equipment main unit, 2: Pin electronics board, 3:
Tested IC, 4A: driving circuit, 4: signal acquisition circuit, 5: terminating resistor, 6: Relay, 7: first bias voltage source, 7A: second bias voltage source, Q _1, Q _2: terminating resistor Switch element that adds a calibration signal generation function to the detector. 14: Calibration signal source.

Claims (2)

(57) [Scope of request for utility model registration] 1. A drive circuit for supplying a signal to an input / output terminal of an IC under test; B. a signal capture circuit for capturing a logic signal output from an input / output terminal of the IC under test; A. A relay with one end connected to the connection point of the signal acquisition circuit, D. A termination resistor with one end connected to the other end of this relay, and E. A bias connected to the other end of this termination resistor. A voltage source; F. a pair of switch elements each having one end connected to both ends of the terminating resistor; G. a constant current supply source connected to each other end of the pair of switch elements; And a calibration signal source for alternately controlling the switch elements. 2. A driving circuit for supplying a signal to an input / output terminal of an IC under test; B. a signal fetching circuit for capturing a logical signal output from an input / output terminal of the IC under test; A relay having one end connected to the connection point of the signal acquisition circuit; D. a termination resistor having one end connected to the other end of the relay; and E. a termination resistor provided at the other end of the termination resistor. G. one bias voltage source; F. a second bias voltage source that sets the voltage of the first bias voltage source to one logical value of the calibration signal and provides the other logical value of the calibration signal; A switching circuit for generating a calibration signal by alternately connecting the terminals to the first bias voltage source and the second bias voltage source.