JP2025524798A - Precise feedback control of bias voltage regulated waveform for plasma etching process - Google Patents

Abstract

A bias electrode and a middle electrode are disposed within the substrate support. A lower portion of the substrate support is between the bias electrode and the middle electrode. An upper portion of the substrate support is between the middle electrode and the top surface of the substrate support. A voltage supply system supplies a bias voltage regulated radio frequency waveform to the bias electrode. A voltage measurement system measures a first voltage on the bias electrode and a second voltage on the middle electrode. A controller uses the first voltage, the second voltage, the capacitance of the lower portion of the substrate support, and the capacitance of the top portion of the substrate support to determine a voltage on a top surface of a substrate that is on the top surface of the substrate support. The controller communicates the voltage on the top surface of the substrate to the voltage supply system.
[Selected Figure] Figure 3A

Description

Plasma processing systems are used to fabricate semiconductor devices (e.g., chips/dies) on semiconductor wafers. In plasma processing systems, semiconductor wafers are exposed to various types of plasma to produce desired changes in the state of the semiconductor wafer, such as material deposition and/or material removal and/or material implantation and/or material modification. During plasma processing of semiconductor wafers, radio frequency (RF) power is transmitted through process gases in a chamber, converting the process gases into plasma upon exposure to the semiconductor wafer. Reactive components of the plasma, such as radicals and ions, interact with materials on the semiconductor wafer, producing desired effects on the semiconductor wafer. In some plasma processing systems, a bias voltage is applied at the level of the semiconductor wafer to attract charged components in the plasma to the semiconductor wafer.

As the semiconductor industry continues to drive chip size reduction and chip performance improvement, denser and higher aspect ratio features must be used to define the transistors on a chip, making them more sensitive to manufacturing process variations. As feature sizes on chips shrink, variations of just a few atoms in some manufacturing processes can necessitate improved etch uniformity control. Uniformity of ion flux, ion energy, and ion angular distribution across a semiconductor wafer is a requirement for plasma etching and deposition for microelectronics manufacturing. Furthermore, achieving substantially uniform ion flux, ion energy, and ion angular distribution at the edge of a semiconductor wafer is a significant challenge, since approximately 10% of the dies on a substrate are affected by the results of manufacturing processes occurring within a radial distance of approximately 5 mm from the outer periphery of the semiconductor wafer. It is against this background that the various embodiments described herein arise.

In an exemplary embodiment, a system includes a bias electrode disposed within a substrate support. The substrate support has an upper surface configured to support a substrate. The system also includes a middle electrode disposed within the substrate support, such that a lower portion of the substrate support is between the bias electrode and the middle electrode and an upper portion of the substrate support is between the middle electrode and the upper surface of the substrate support. The system also includes a voltage supply system connected to supply a bias voltage regulated radio frequency waveform to the bias electrode. The system also includes a voltage measurement system connected to measure a first voltage on the bias electrode and a second voltage on the middle electrode. The system also includes a controller configured to determine a voltage on the upper surface of the substrate when present on the upper surface of the substrate support using the measured first voltage, the measured second voltage, the capacitance of the lower portion of the substrate support, and the capacitance of the upper portion of the substrate support. The controller is configured to communicate information related to the voltage on the upper surface of the substrate to the voltage supply system.

In an exemplary embodiment, a substrate support system for a plasma processing system is disclosed. The substrate support system includes a substrate support having an upper surface configured to support a substrate. The substrate support system also includes a bias electrode disposed within the substrate support. The bias electrode is configured to control a voltage on the upper surface of the substrate. The bias electrode is connected to receive a bias voltage regulated radio frequency waveform from a voltage supply system. The bias electrode is configured to electrically receive a first connector for measuring a first voltage on the bias electrode. The substrate support system also includes a middle layer electrode disposed within the substrate support such that a lower portion of the substrate support is between the bias electrode and the middle layer electrode and an upper portion of the substrate support is between the middle layer electrode and the upper surface of the substrate support. The middle layer electrode is configured to electrically receive a second connector for measuring a second voltage of the middle layer electrode.

In an exemplary embodiment, an edge ring system for a plasma processing system is disclosed. The edge ring system includes an edge ring configured to circumscribe a substrate support. The edge ring system also includes an edge ring electrode disposed within the edge ring. The edge ring electrode is configured to control a voltage on an upper surface of the edge ring. The edge ring electrode is connected to receive a bias voltage regulated radio frequency waveform from a voltage supply system. The edge ring electrode is configured to electrically receive a first connector to measure a first voltage on the edge ring electrode. The edge ring system also includes an edge ring middle electrode disposed within the edge ring such that a lower portion of the edge ring is between the edge ring electrode and the edge ring middle electrode and an upper portion of the edge ring is between the edge ring middle electrode and the upper surface of the edge ring. The edge ring middle electrode is configured to electrically receive a second connector to measure a second voltage on the edge ring middle electrode.

In an exemplary embodiment, a method for controlling a voltage on a substrate is disclosed. The method includes supplying a bias voltage-regulated radio frequency waveform to a bias electrode in a substrate support by operating a voltage supply system. The method also includes measuring a first voltage on the bias electrode at a given time. The method also includes measuring a second voltage on a middle layer electrode at a given time. The middle layer electrode is positioned within the substrate support such that a lower portion of the substrate support is between the bias electrode and the middle layer electrode and an upper portion of the substrate support is between the middle layer electrode and a top surface of the substrate support. The method also includes determining, at a given time, a voltage on a top surface of the substrate when present on the top surface of the substrate support using the measured first voltage, the measured second voltage, the capacitance of the lower portion of the substrate support, and the capacitance of the upper portion of the substrate support.

Other aspects and advantages of the embodiments disclosed herein will become more apparent from the following detailed description and accompanying drawings.

FIG. 1A is a side cross-sectional view of a plasma processing system according to some embodiments.

FIG. 1B is a top view of a substrate disposed on a substrate support, according to some embodiments, and is referenced as view AA of FIG. 1A.

FIG. 2 illustrates the voltage on the top surface of the substrate in response to a bias RF generator supplying a constant amplitude RF voltage to a bias electrode, with two different ion flux conditions present at the top surface of the substrate, according to some embodiments.

FIG. 3A is a side cross-sectional view of a plasma processing system according to some embodiments.

FIG. 3B is a top view of a substrate disposed on a substrate support with an edge ring surrounding the substrate support, according to some embodiments, and is referenced as view AA of FIG. 3A.

FIG. 3C is a top view of a middle layer electrode in a substrate support and an edge ring middle layer electrode in an edge ring, according to some embodiments, and is referenced as view BB of FIG. 3A.

FIG. 3D illustrates a bias voltage supply system that is an example of the bias voltage supply system of FIG. 3A, according to some embodiments.

FIG. 3E illustrates an example of a voltage supply system within the bias voltage supply system of FIG. 3D, according to some embodiments.

FIG. 3F shows an example of a bias voltage adjusted waveform generated by the voltage supply system of FIG. 3E, along with the corresponding bias voltage waveform on the top surface of the substrate and the corresponding bias voltage waveform on the top surface of the edge ring, according to some embodiments.

FIG. 3G illustrates a bias voltage supply system that is an example of the bias voltage supply system of FIG. 3A, according to some embodiments.

FIG. 4 is an illustrative diagram of a controller, according to some embodiments.

FIG. 5 shows an example of a bias voltage adjusted waveform supplied to the bias electrode by the bias voltage supply system of FIG. 3A and the corresponding voltage waveform resulting on the top surface of the substrate, according to some embodiments.

FIG. 6 illustrates a voltage waveform on a middle layer electrode in a substrate support that corresponds to a bias voltage adjusted waveform supplied to the bias electrode by a bias voltage supply system such as that shown in FIG. 5, according to some embodiments.

FIG. 7 shows an example of a bias voltage adjusted waveform supplied to the bias electrode by the bias voltage supply system of FIG. 3A and the corresponding voltage waveform resulting on the top surface of the substrate, according to some embodiments.

FIG. 8 illustrates a feedback-controlled bias voltage regulated waveform supplied to the bias electrode by the bias voltage supply system of FIG. 3A and the corresponding voltage waveform resulting on the top surface of the substrate, according to some embodiments.

FIG. 9 illustrates another feedback-controlled bias voltage regulated waveform supplied to the bias electrode by the bias voltage supply system of FIG. 3A and the corresponding voltage waveform resulting on the top surface of the substrate, according to some embodiments.

FIG. 10A shows a flowchart of a method for controlling voltage on a substrate, according to some embodiments.

FIG. 10B shows a flowchart of an optional extension of the method of FIG. 10A for controlling voltage on a substrate, according to some embodiments.

FIG. 10C shows a flowchart of an optional extension of the method of either FIG. 10A or FIG. 10B, according to some embodiments.

FIG. 10D shows a flowchart of an optional extension of the method of FIG. 10C for controlling the voltage on the edge ring, according to some embodiments.

In the following description, numerous specific details are set forth to provide a thorough understanding of the present disclosure. However, it will be apparent to one of ordinary skill in the art that embodiments of the present disclosure may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail in order to avoid unnecessarily obscuring the present disclosure.

1A is a vertical cross-sectional view of a plasma processing system 100 according to some embodiments. The plasma processing system 100 includes a chamber 101. A coil 109 is disposed above a window 107 of the chamber 101. In various embodiments, the window 107 is formed from a dielectric material, such as quartz or another similar material, that allows RF power to be transmitted from the coil 109 through the window 107 to a plasma processing region 102 within the chamber 101. The chamber 101 is electrically connected to a reference ground potential 104. The plasma processing system 100 includes a TCP (transformer coupled plasma) RF generator 113 connected to transmit RF power to the coil 109 through an impedance match network 111, as shown by connection 115.

The plasma processing system 100 is also mounted to provide a controlled flow of a process gas or process gas mixture to the plasma processing region 102, as indicated by arrow 117. When RF power is transmitted into and through the plasma processing region 102, the RF power converts the process gas/mixture into a plasma 119 within the plasma processing region 102 upon exposure to a substrate 105 supported on a substrate support 103 within the chamber 101. The substrate support 103 has an upper surface 103T configured to support the substrate 105 while the upper surface 105T of the substrate 105 is processed by a plasma 119 generated above the substrate support 103. In some embodiments, the substrate support 103 is an electrostatic chuck configured to generate an electrostatic force that holds the substrate 105 against the upper surface 103T of the substrate support 103.

In various embodiments, the plasma 119 is generated to cause a change to the substrate 105 in a controlled manner. In various manufacturing processes, the change to the substrate 105 can be a change to the material or surface state on the substrate 105. For example, in various manufacturing processes, the change to the substrate 105 can include one or more of etching material from the substrate 105, depositing material onto the substrate 105, implanting material into the substrate 105, and/or modifying material present on the substrate 105. Also, in some embodiments, the plasma 119 is generated in the plasma processing region 102, where the substrate 105 is not present, to provide cleaning of the chamber 101. It should be understood that the plasma processing system 100 can be any type of plasma processing system in which RF power is delivered to a process gas/mixture in the plasma processing region 102 to generate the plasma 119 above the substrate 105 supported on the upper surface 103T of the substrate support 103. The plasma processing system 100 is also configured to remove gases and processing by-products from the plasma processing region 102 through an exhaust system, as indicated by arrow 121.

FIG. 1B is a top view of a substrate 105 disposed on a substrate support 103, according to some embodiments, and is referenced as the A-A view of FIG. 1A. In some embodiments, the substrate 105 is a semiconductor wafer undergoing a manufacturing process. However, it should be understood that in various embodiments, the substrate 105 can be essentially any type of substrate that is subjected to a plasma-based manufacturing process. For example, in some embodiments, the substrate 105 is formed from silicon, sapphire, GaN, GaAs, or SiC, and/or other substrate materials, and can include glass panels/substrates, metal foils, metal sheets, polymeric materials, etc. Additionally, in various implementations, the substrate 105 can vary in form, shape, and/or size. For example, in some embodiments, the substrate 105 is a semiconductor wafer having an outer diameter of 200 mm, 300 mm, 450 mm, or other sizes. Also, in some embodiments, the substrate 105 is a non-circular substrate, such as a rectangular substrate for a flat panel display, among other shapes.

1A, in some embodiments, the bias electrode 123 is disposed within the substrate support 103 below the upper surface 103T of the substrate support 103. In some embodiments, the substrate support 103 is formed from a dielectric material, such as a ceramic material or other type of dielectric material, and the bias electrode 123 is formed from a conductive material. In some embodiments, the plasma processing system 100 includes a bias RF generator 125 connected to deliver bias RF power to the bias electrode 123 through an impedance match network 127, as shown by connection 129. The bias electrode 123 is configured to apply a bias voltage to the upper surface 105T of the substrate 105 to attract charged components of the plasma 119 toward or away from the substrate 105.

It should be understood that in various embodiments, operation of the plasma processing system 100 can include many other additional operations, such as controlling the temperature of the substrate 105 and/or applying additional RF power to one or more electrodes disposed within the substrate support 103 to generate additional plasma, among other additional operations. Also, in various embodiments, the plasma processing system 100 operates according to a predetermined recipe that defines a time schedule for controlling one or more of the supply of process gas(es) to the plasma processing region 102, the pressure and temperature within the plasma processing region 102, the supply of RF power to the coil 109, and the supply of bias RF power to the bias electrode 123, among any other process parameters essentially related to the operation of the plasma processing system 100.

The bias RF generator 125 is used to bias the processing of the substrate 105 with a sinusoidal voltage. When an RF signal is supplied to the bias electrode 123, the voltage on the upper surface 105T of the substrate 105 oscillates periodically at the frequency of the RF signal. This approach to supplying an RF bias voltage to the substrate 105 does not control the distribution of impinging ion energy for etching features on the upper surface 105T of the substrate 105. In some embodiments, the bias RF generator 125 has a one-dimensional control knob for RF voltage amplitude, and therefore the bias RF generator 125 cannot independently control the ion flux incident on the substrate 105. In these embodiments, the ion flux incident on the substrate 105 is determined by the RF power supplied to the coil 109 from the TCPRF generator 113 and the amplitude of the RF bias voltage on the upper surface 105T of the substrate 105, which directly affects the energy of ions incident on the upper surface 105T of the substrate 105. In some embodiments, the bias RF generator 125 can regulate the output RF power in either a power regulation mode or a voltage regulation mode.

2 illustrates the voltage on the top surface 105T of the substrate 105 in response to the supply of a constant amplitude RF voltage to the bias electrode 123 by the bias RF generator 125, with two different ion flux conditions present at the top surface 105T of the substrate 105, according to some embodiments. Curve V(output) 201 represents the constant amplitude RF voltage supplied to the bias electrode 123 by the bias RF generator 125. Curve V(substrate top surface 1 ampere) 203 represents the voltage on the top surface 105T of the substrate 105 in response to the supplied RF bias voltage V(output) 201, with an ion current of 1 ampere present on the top surface 105T of the substrate 105. Curve V(substrate top surface 0.5 amperes) 205 represents the voltage on the top surface 105T of the substrate 105 in response to the supplied RF bias voltage V(output) 201, with an ion current of 0.5 amperes present on the top surface 105T of the substrate 105. 2 illustrates that even with a constant amplitude RF bias voltage supplied to the bias electrode 123 by the bias RF generator 125, the voltage on the upper surface 105T of the substrate 105 can vary depending on the density of the plasma 119 and the ion flux incident on the substrate 105. Furthermore, plasma-induced variations in the voltage behavior on the upper surface 105T of the substrate 105 create challenges for transferring the fabrication recipe for the substrate 105 from one processing chamber to another, and for modifying the fabrication recipe for the substrate 105.

Figure 3A is a vertical cross-sectional view of a plasma processing system 300 according to some embodiments. The plasma processing system 300 is a modification of the plasma processing system 100 of Figure 1A. The plasma processing system 300 includes a chamber 101, a window 107, and a plasma processing region 102 within the chamber 101. The plasma processing system 300 also includes a TCPRF generator 113, an impedance match network 111, connections 115, and a coil 109 positioned above the window 107. The plasma processing chamber 300 also provides for the delivery of process gas into the plasma processing region 102, as indicated by arrow 117, and the removal of process gas and by-products from the plasma processing region 102, as indicated by arrow 121. RF power supplied from the TCPRF generator 113 to the plasma processing region 102 via the coil 109 and the RF-transparent window 107 converts the process gas into a plasma 119 within the plasma processing region 102 upon exposure to the substrate 105.

The plasma processing system 300 includes a substrate support 301 that is a modification of the substrate support 103 described with respect to FIG. 1A. The substrate support 301 has an upper surface 301T configured to support the substrate 105 during processing. In some embodiments, the substrate support 301 is an electrostatic chuck configured to generate an electrostatic force that holds the substrate 105 against the upper surface 301T of the substrate support 301. The substrate support 301 also includes a bias electrode 123 disposed within the substrate support 301 below the upper surface 301T of the substrate support 301. In some embodiments, the substrate support 301 is formed from a dielectric material, such as a ceramic material or other type of dielectric material, and the bias electrode 123 is formed from a conductive material. In the substrate support 301, the bias electrode 123 is configured to apply a bias voltage to the upper surface 105T of the substrate 105 to attract charged components of the plasma 119 toward or away from the substrate 105.

In the plasma processing system 300, an edge ring 315 surrounds the substrate support 301 such that the top surface 301T of the substrate support 301 is circumscribed by the edge ring 315. FIG. 3B is a top view of a substrate 105 disposed on the substrate support 301 with the edge ring 315 surrounding the substrate support 301, according to some embodiments, and is referenced as the A-A view of FIG. 3A. An edge ring electrode 323 is disposed within the edge ring 315. In some embodiments, the edge ring 315 is formed from a dielectric material, and the edge ring electrode 323 is formed from a conductive material. In some embodiments, the substrate support 301 extends radially outward below the edge ring 315, such that the outer diameter of the substrate support 301 provides a support structure upon which the edge ring 315 is disposed. However, it should be understood that the edge ring 315 circumscribes the top surface 301T of the substrate support 301 regardless of how the edge ring 315 is vertically supported.

The bias electrode 123 is electrically connected to a bias voltage supply system 333, as indicated by connection 335. The edge ring electrode 323 is also electrically connected to the bias voltage supply system 333, as indicated by connection 337. The bias voltage supply system 333 is configured to control the voltage on the bias electrode 123 and the voltage on the edge ring electrode 323. The bias electrode 123 is configured to control the voltage on the upper surface 105T of the substrate 105 when the substrate 105 resides on the upper surface 301T of the substrate support 301. The voltage applied to the bias electrode 123 may be different from the corresponding voltage on the upper surface 105T of the substrate 105 due to various materials present between the bias electrode 123 and the upper surface 105T of the substrate 105, such as the material of the substrate 105 itself combined with dielectric materials and other materials present in the substrate support 301 above the bias electrode 123. In some embodiments, the material present between bias electrode 123 and top surface 105T of substrate 105 can be represented electrically as a substantially fixed capacitance. A voltage measurement device 311 is connected to measure the voltage on bias electrode 123, as shown by connection 313.

In addition to the bias electrode 123, the substrate support 301 also includes a middle layer electrode 302. The middle layer electrode 302 is positioned within the substrate support 301 such that a lower portion 303 of the substrate support 301 is between the bias electrode 123 and the middle layer electrode 302, and an upper portion 305 of the substrate support 301 is between the middle layer electrode 302 and the top surface 301T of the substrate support 301. In some embodiments, the middle layer electrode 302 is positioned near where a clamping voltage is applied to hold the substrate 105 on the substrate support 301. In various embodiments, the middle layer electrode 302 can be configured in various ways. For example, in some embodiments, the middle layer electrode 302 is substantially disk-shaped. In some embodiments, the middle layer electrode 302 has a lattice shape. In some embodiments, the middle layer electrode 302 has a spoked shape. In some embodiments, the middle layer electrode 302 is configured as a set of concentrically spaced annular rings. The mid-layer electrode 302 can be configured in essentially any manner, but it should be understood that the voltage measured on the mid-layer electrode 302 should be representative of the voltage that exists across/through the substrate support 301 at the vertical location of the mid-layer electrode 302 within the substrate support 301. In some embodiments, one or more clamp electrodes disposed within the substrate support 301 are used as the mid-layer electrode 302, where a known clamp voltage is applied to the one or more clamp electrodes to generate an attractive electrostatic force that holds the substrate 105 onto the substrate support 301. A voltage measurement device 307 is connected to measure the voltage on the mid-layer electrode 302, as shown by connection 309.

The edge ring electrode 323 is configured to control the voltage on the top surface 315T of the edge ring 315. The voltage applied to the edge ring electrode 323 may be different from the corresponding voltage on the top surface 315T of the edge ring 315 due to dielectric and other materials present in the edge ring 315 above the edge ring electrode 323. In some embodiments, the material present between the edge ring electrode 323 and the top surface 315T of the edge ring 315 can be electrically represented as a substantially fixed capacitance. A voltage measurement device 325 is connected to measure the voltage on the edge ring electrode 323, as shown by connection 327.

In addition to the edge ring electrode 323, the edge ring 315 also includes an edge ring middle layer electrode 317. The edge ring middle layer electrode 317 is positioned within the edge ring 315 such that the lower portion 319 of the edge ring 315 is between the edge ring electrode 323 and the edge ring middle layer electrode 317, and the upper portion 321 of the edge ring 315 is between the edge ring middle layer electrode 317 and the top surface 315T of the edge ring 315. A voltage measurement device 329 is connected to measure the voltage of the edge ring middle layer electrode 317, as shown by connection 331. In various embodiments, the edge ring middle layer electrode 317 can be configured in various ways. For example, in some embodiments, the edge ring middle layer electrode 317 is shaped as an annular ring. In some embodiments, the edge ring middle layer electrode 317 has a lattice/spoke shape in which one or more annular rings are electrically connected to a set of spaced, radially oriented lattice/spoke structures. In some embodiments, the edge ring middle electrode 317 is configured as a set of concentrically spaced annular rings. The edge ring middle electrode 317 can be configured in essentially any manner, but it should be understood that the voltage measured on the edge ring middle electrode 317 should be representative of the voltage that exists across/through the edge ring 315 at the vertical location of the edge ring middle electrode 317 within the edge ring 315.

Figure 3C is a top view of the middle electrode 302 in the substrate support 301 and the edge ring middle electrode 317 in the edge ring 315, referenced as the B-B perspective of Figure 3A, according to some embodiments. In some embodiments, the voltage measurement devices 311, 325, 307, and 329 and their associated connections 313, 327, 309, and 331 are part of a voltage measurement system of a bias voltage supply system 333. In some embodiments, the middle electrode 302 in the substrate support 301 and the edge ring middle electrode 317 in the edge ring 315 are at substantially equal vertical heights within the plasma processing system 300, as depicted in Figure 3A. However, in some embodiments, the middle electrode 302 in the substrate support 301 and the edge ring middle electrode 317 in the edge ring 315 are at different vertical heights within the plasma processing system 300.

3D illustrates bias voltage supply system 333A, an example of bias voltage supply system 333 of FIG. 3A, according to some embodiments. Bias electrode 123 and edge ring electrode 323, along with their associated electrical connections 335 and 337, respectively, can be considered components of bias voltage supply system 333A. Bias voltage supply system 333A includes voltage supply system 341 having an output electrically connected to bias voltage supply node 345 through filter 343, as shown by connections 347 and 349. Voltage supply system 341 is configured to generate a predetermined bias voltage regulated waveform 342 on bias voltage supply node 345 as a function of time. In some embodiments, predetermined bias voltage regulated waveform 342 includes a bias voltage step portion (Vstep) 342A and a time-varying bias voltage portion (dV/dT) 342B. In some embodiments, the predetermined bias voltage adjusted waveform 342 is defined as an ongoing series of pulse cycles, each pulse cycle including an ON period and an OFF period. The voltage supply system 341 is connected in two-way data/signal communication with a controller 351, which is programmable to direct operation of the voltage supply system 341 to generate essentially any form of predetermined bias voltage adjusted waveform 342 required for a particular plasma processing operation on the substrate 105.

FIG. 3E illustrates an example of a voltage supply system 341, according to some embodiments. The voltage supply system 341 includes a first voltage source 344A and a second voltage source 344B, which are electrically connected in series with each other such that their output voltages are summed. In some embodiments, each of the first voltage source 344A and the second voltage source 344B is a DC voltage source. The first voltage source 344A is configured to generate a constant voltage magnitude over time according to a predetermined pulse schedule corresponding to the predetermined bias voltage adjusted waveform 342. For example, FIG. 3E illustrates an example of a pulse voltage waveform 385 generated and output by the first voltage source 344A, which ultimately results in a bias voltage step portion (Vstep) 342A of the predetermined bias voltage adjusted waveform 342. The output of the first voltage source 344A is electrically connected to the input of the second voltage source 344B, as indicated by electrical connection 383. The output of second voltage source 344B is electrically connected to the output of voltage supply system 341, as indicated by electrical connection 347. Second voltage source 344B is configured to generate a time-varying pulsed voltage waveform 387, which ultimately results in a time-varying bias voltage portion (dV/dT) 342B of predetermined bias voltage adjusted waveform 342. In some embodiments, time-varying pulsed voltage waveform 387 varies substantially linearly as a function of time during the ON period of each pulse cycle. Also, in some embodiments, time-varying pulsed voltage waveform 387 increases in magnitude substantially linearly as a function of time during the ON period of each pulse cycle. At the output of second voltage source 344B, pulsed voltage waveform 385 is combined with time-varying pulsed voltage waveform 387 to generate predetermined bias voltage adjusted waveform 342. Thus, the output voltage provided by voltage supply system 341 to bias voltage supply node 345 is a combination of pulsed voltage waveform 385 generated by first voltage source 344A and pulsed voltage waveform 387 generated by second voltage source 344B. First voltage source 344A and second voltage source 344B are each connected in two-way data/signal communication with controller 351, which directs operation of first voltage source 344A and second voltage source 344B to synchronize the phase and duty cycle of pulsed voltage waveforms 385 and 387 to generate predetermined bias voltage regulated waveform 342.

3D , bias voltage supply system 333A includes a splitter circuit 353 configured to apply the voltage present on bias voltage supply node 345 to each of bias electrode 123 and edge ring electrode 323 in a controlled manner. Splitter circuit 353 includes a first branch circuit 355 and a second branch circuit 357. First branch circuit 355 is electrically connected between bias voltage supply node 345 and bias electrode 123. First branch circuit 355 includes a series capacitor 359 and a shunt capacitor 361. In some embodiments, each of series capacitor 359 and shunt capacitor 361 is a respective variable capacitor whose capacitance setting can be remotely controlled by controller 351 in bidirectional data/signal communication with splitter circuit 353. In some embodiments, first branch circuit 355 includes a switching device 360 implemented to bypass series capacitor 359, thereby switchably electrically connecting bias voltage supply node 345 to the input terminal of series capacitor 359 or directly to bias electrode 123 via electrical connection 335. In this manner, controlling switching device 360 either electrically connects series capacitor 359 in series between bias voltage supply node 345 and bias electrode 123, or effectively electrically removes series capacitor 359 from being disposed between bias voltage supply node 345 and bias electrode 123. Also, in some embodiments, first branch circuit 355 includes a switching device 362 implemented to electrically connect or disconnect shunt capacitor 361 to electrical connection 335 extending from the output of first branch circuit 355 to bias electrode 123. In this manner, by controlling the switching device 362, the shunt capacitor 361 is either electrically connected between the bias electrode 123 and the reference ground potential 367, or the shunt capacitor 361 is effectively electrically removed from the first branch circuit 355.

The second branch circuit 357 is electrically connected between the bias voltage supply node 345 and the edge ring electrode 323. The second branch circuit 357 includes a series capacitor 363 and a shunt capacitor 365. In some embodiments, the series capacitor 363 and the shunt capacitor 365 are each individual variable capacitors whose capacitance settings can be remotely controlled by a controller 351 in bidirectional data/signal communication with the divider circuit 353. In some embodiments, the second branch circuit 357 includes a switching device 369 implemented to bypass the series capacitor 363, thereby switchably electrically connecting the bias voltage supply node 345 to the input terminal of the series capacitor 363 or directly to the bias electrode 323 via the electrical connection 337. In this manner, controlling the switching device 369 either electrically connects the series capacitor 363 in series between the bias voltage supply node 345 and the edge ring electrode 323, or effectively electrically removes the series capacitor 363 from being disposed between the bias voltage supply node 345 and the edge ring electrode 323. Additionally, in some embodiments, the second branch circuit 357 includes a switching device 371 mounted such that the shunt capacitor 365 can be electrically connected to or disconnected from the electrical connection 337 extending from the output of the second branch circuit 357 to the edge ring electrode 323. In this manner, controlling the switching device 371 either electrically connects the shunt capacitor 365 between the edge ring electrode 323 and the reference ground potential 367, or effectively electrically removes the shunt capacitor 365 from the second branch circuit 357.

In some embodiments, the first branch circuit 355 is configured to decouple the series capacitor 359 from the shunt capacitor 361, and the second branch circuit 357 is configured to couple the series capacitor 363 to the shunt capacitor 365. More specifically, in these embodiments, the switching devices 360 and 362 are configured to electrically connect the bias voltage supply node 345 directly to the bias electrode 123, and the switching devices 369 and 371 are configured to control the bias voltage transmitted from the bias voltage supply node 345 to the edge ring electrode 323 by the series capacitor 363 and the shunt capacitor 365. Thus, in these embodiments, the bias voltage adjusted waveform 342 output by the voltage supply system 341 is supplied to the bias electrode 123, and a modified version of the bias voltage adjusted waveform 342 output by the voltage supply system 341 is supplied to the edge ring electrode 323.

In some embodiments, the first branch circuit 355 is configured to couple the series capacitor 359 and the shunt capacitor 361, and the second branch circuit 357 is configured to couple the series capacitor 363 and the shunt capacitor 365. More specifically, in these embodiments, the switching devices 360 and 362 are configured such that the bias voltage transmitted from the bias voltage supply node 345 to the bias electrode 123 is controlled by the series capacitor 359 and the shunt capacitor 361, and the switching devices 369 and 371 are configured such that the bias voltage transmitted from the bias voltage supply node 345 to the edge ring electrode 323 is controlled by the series capacitor 363 and the shunt capacitor 365. Thus, in these embodiments, a first modified version of the bias voltage adjusted waveform 342 output by the voltage supply system 341 is supplied to the bias electrode 123, and a second modified version of the bias voltage adjusted waveform 342 output by the voltage supply system 341 is supplied to the edge ring electrode 323.

Furthermore, in some embodiments, the series capacitor 359 can be coupled to the first branch circuit 355 with the shunt capacitor 361 disconnected. In some embodiments, the shunt capacitor 361 can be coupled to the first branch circuit 355 with the series capacitor 359 disconnected. Also, in some embodiments, the series capacitor 363 can be coupled to the second branch circuit 357 with the shunt capacitor 365 disconnected. In some embodiments, the shunt capacitor 365 can be coupled to the second branch circuit 357 with the series capacitor 363 disconnected.

In some embodiments, a voltage sensor 373, e.g., a voltage/current sensor (VI sensor), is connected to measure the real-time voltage on the bias voltage supply node 345 and communicate information related to the measured voltage to the controller 351. In some embodiments, a voltage sensor 375, e.g., a voltage/current sensor (VI sensor), is connected to measure the real-time voltage at the output of the first branch circuit 355 and communicate information related to the measured voltage to the controller 351. In some embodiments, a voltage sensor 377, e.g., a voltage/current sensor (VI sensor), is connected to measure the real-time voltage at the output of the second branch circuit 357 and communicate information related to the measured voltage to the controller 351. In various embodiments, the controller 351 is configured to use the voltages measured by one or more of the voltage sensors 373, 375, and 377 as feedback signal(s) to control the operation of the voltage supply system 341 and one or more of the series capacitor 359, the shunt capacitor 361, the series capacitor 363, and the shunt capacitor 365.

Also, in some embodiments, bias voltage supply system 333A includes a number (N) (N is 1 or greater) of RF generators 379-1 through 379-N, which are connected to supply RF bias voltages to bias voltage supply node 345 via respective impedance matching networks 381-1 through 381-N. Each of RF generators 379-1 through 379-N is connected in bidirectional data/signal communication with controller 351. At bias voltage supply node 345, the RF voltage signal(s) output by RF generators 379-1 through 379-N are combined with bias voltage regulated waveform 342 output by voltage supply system 341. RF generators 379-1 through 379-N and corresponding impedance matching networks 381-1 through 381-N are implemented in some embodiments of bias voltage supply system 333A. However, in other embodiments of the bias voltage supply system 333A, the RF generators 379-1 to 379-N and corresponding impedance matching networks 381-1 to 381-N are not implemented.

3F illustrates an exemplary bias voltage adjusted waveform 342 generated by voltage supply system 341, a corresponding bias voltage waveform 372 on the top surface 105T of substrate 105, and a corresponding bias voltage waveform 374 on the top surface 315T of edge ring 315, according to some embodiments. Bias voltage adjusted waveform 342 includes a bias voltage step portion (Vstep) 342A and a time-varying bias voltage portion (dV/dT) 342B. Bias voltage adjusted waveform 342 is generated on bias voltage supply node 345. Thus, bias voltage waveform 372 on the top surface 105T of substrate 105 is based on bias voltage adjusted waveform 342 as modified by first branch circuit 355. Similarly, bias voltage waveform 374 on the top surface 315T of edge ring 315 is based on bias voltage adjusted waveform 342 as modified by second branch circuit 357. Bias voltage waveform 372 includes a step portion 372A and a slope portion 372B. Bias voltage waveform 374 includes a step portion 374A and a slope portion 374B.

The shunt capacitor 361 of the first branch circuit 355 controls the magnitude of the step portion 372A of the bias voltage waveform 372 on the top surface 105T of the substrate 105. Specifically, the capacitance setting of the shunt capacitor 361 can be controlled to set the magnitude of the step portion 372A to a percentage (0-100%) of the magnitude of the bias voltage step portion (Vstep) 342A. When the shunt capacitor 361 is disconnected (or not present) in the first branch circuit 355, the magnitude of the step portion 372A becomes a fixed percentage of the magnitude of the bias voltage step portion (Vstep) 342A, depending on the inherent capacitance effects of the substrate support 301 and the substrate 105 material present between the bias electrode 123 and the top surface 105T of the substrate 105. This fixed percentage of the magnitude of the bias voltage step portion (Vstep) 342A depends on the structure between the output of the voltage supply system 341 and the top surface 105T of the substrate 105. For example, stray shunt capacitance may be present in structures such as filter 343, impedance matching networks 381-1 through 381-N, and electrical connections 347, 349, 345, and 335. Also, if the rise time of bias voltage step (Vstep) 342A is relatively long compared to the ion transit time through the plasma sheath, series capacitance between the output of voltage supply system 341 and top surface 105T of substrate 105 can reduce the fixed percentage of Vstep 342A magnitude due to ion flux during the rise time of Vstep 342A. For example, in some embodiments, various series capacitances may be inserted for some purpose in filter 343, substrate support 301, substrate 105, and/or electrical connections 347, 349, 345, and 335. By making the rise time of Vstep 342A relatively short, e.g., Vstep<<1 microsecond, the fixed percentage reduction in the magnitude of Vstep 342A due to series capacitance can be largely eliminated.

The series capacitor 359 of the first branch circuit 355 controls the slope (change in voltage over time) of the sloped portion 372B of the bias voltage waveform 372 on the upper surface 105T of the substrate 105. When a voltage is applied to the bias electrode 123, an ion current exists from the plasma 119 toward the upper surface 105T of the substrate 105, which discharges the negative charge on the upper surface 105T of the substrate 105, and the magnitude of the negative voltage on the upper surface 105T of the substrate 105 correspondingly decreases over time. To compensate for this ion-induced decrease in the magnitude of the negative voltage on the upper surface 105T of the substrate 105, the time-varying bias voltage portion (dV/dT) 342B of the bias voltage adjusted waveform 342 increases the bias voltage over time. Controlling the capacitance setting of the series capacitor 359 adjusts the change in bias voltage as a function of time on the upper surface 105T of the substrate 105, thereby compensating for the ion-induced discharge of the negative charge on the upper surface 105T of the substrate 105. In some embodiments, the capacitance setting of the series capacitor 359 is controlled to maintain a substantially constant voltage on the top surface 105T of the substrate 105 during the ON period of the bias voltage adjusted waveform 342. However, in other embodiments, the capacitance setting of the series capacitor 359 is controlled to achieve a desired change in voltage as a function of time (positive dV/dT and/or negative dV/dT) on the top surface 105T of the substrate 105 during the ON period of the bias voltage adjusted waveform 342. If the series capacitor 359 is disconnected/bypassed (or not present) in the first branch circuit 355, the change in voltage as a function of time (dV/dT) on the top surface 105T of the substrate 105 during the ON period of the bias voltage adjusted waveform 342 will follow the time-varying bias voltage portion (dV/dT) 342B of the bias voltage adjusted waveform 342, canceling out the fixed voltage magnitude due to the inherent capacitance effect of the substrate support 301 and substrate 105 materials present between the bias electrode 123 and the top surface 105T of the substrate 105. In some embodiments, this fixed voltage magnitude cancellation may also be based on the inherent series capacitance between the output of the voltage supply system 341 and the top surface 105T of the substrate 105. In some embodiments, this inherent series capacitance corresponds to various series capacitances inserted for some purpose in the filter 343, the substrate support 301, the substrate 105, and/or the electrical connections 347, 349, 345, and 335.

The shunt capacitor 365 of the second branch circuit 357 controls the magnitude of the step portion 374A of the bias voltage waveform 374 on the top surface 315T of the edge ring 315. Specifically, the capacitance setting of the shunt capacitor 365 can be controlled to set the magnitude of the step portion 374A to a percentage (0-100%) of the magnitude of the bias voltage step portion (Vstep) 342A. When the shunt capacitor 365 is disconnected (or not present) in the second branch circuit 357, the magnitude of the step portion 374A is a fixed percentage of the magnitude of the bias voltage step portion (Vstep) 342A, depending on the inherent capacitance effect of the material of the edge ring 315 that exists between the edge ring electrode 323 and the top surface 315T of the edge ring 315. In some embodiments, the magnitude of the step portion 374A can also be based on the inherent series capacitance between the output of the voltage supply system 341 and the top surface 315T of the edge ring 315. In some embodiments, the inherent series capacitance corresponds to various series capacitances inserted for some purpose in the filter 343, the edge ring 315, and/or the electrical connections 347, 349, 345, and 337.

The series capacitor 363 of the second branch circuit 357 controls the slope (change in voltage over time) of the sloped portion 374B of the bias voltage waveform 374 on the upper surface 315T of the edge ring 315. When a voltage is applied to the edge ring electrode 323, an ion current exists from the plasma 119 toward the upper surface 315T of the edge ring 315, which discharges negative charge on the upper surface 315T of the edge ring 315, and the magnitude of the negative voltage on the upper surface 315T of the edge ring 315 correspondingly decreases over time. To compensate for this ion-induced decrease in the magnitude of the negative voltage on the upper surface 315T of the edge ring 315, the time-varying bias voltage portion (dV/dT) 342B of the bias voltage adjusted waveform 342 increases the bias voltage over time. The capacitance setting of the series capacitor 363 is controlled to adjust the change in bias voltage as a function of time on the top surface 315T of the edge ring 315, thereby compensating for ion-induced discharge of negative charge on the top surface 315T of the edge ring 315. In some embodiments, the capacitance setting of the series capacitor 363 is controlled to maintain a substantially constant voltage on the top surface 315T of the edge ring 315 during the ON period of the bias voltage adjusted waveform 342. However, in other embodiments, the capacitance setting of the series capacitor 363 is controlled to achieve a desired change in voltage as a function of time (positive dV/dT and/or negative dV/dT) on the top surface 315T of the edge ring 315 during the ON period of the bias voltage adjusted waveform 342. If the series capacitor 363 is disconnected/bypassed (or not present) in the second branch circuit 357, the change in voltage as a function of time (dV/dT) on the top surface 315T of the edge ring 315 during the ON period of the bias voltage adjusted waveform 342 will follow the time-varying bias voltage portion (dV/dT) 342B of the bias voltage adjusted waveform 342, canceling the fixed voltage magnitude due to the inherent capacitance effect of the material of the edge ring 315 that exists between the edge ring electrode 323 and the top surface 315T of the edge ring 315. In some embodiments, this fixed voltage magnitude cancellation may also be based on the inherent series capacitance between the output of the voltage supply system 341 and the top surface 315T of the edge ring 315. In some embodiments, this inherent series capacitance corresponds to various series capacitances inserted for some purpose in the filter 343, the edge ring 315, and/or the electrical connections 347, 349, 345, and 337.

FIG. 3G shows bias voltage supply system 333B, an example of bias voltage supply system 333 of FIG. 3A, according to some embodiments. Bias voltage supply system 333B includes first voltage supply system 390 and second voltage supply system 395. First voltage supply system 390 includes voltage supply system 391 having an output connected to bias electrode 123 via filter 392 and electrical connection 335. Voltage supply system 391 is configured similarly to voltage supply system 341. As such, voltage supply system 391 generates and supplies predetermined bias voltage adjusted waveform 342-1 to bias electrode 123. Predetermined bias voltage adjusted waveform 342-1 includes step portion 342A1 and slope portion 342B1. Filter 392 is configured to prevent RF signals from entering voltage supply system 391. In various embodiments, filter 392 is a low-pass filter or a notch filter.

The first voltage supply system 390 also optionally includes a number (N) (N is 1 or greater) of RF generators 393-1 through 393-N, which are connected to supply RF bias voltages to the bias electrodes 123 via respective impedance match networks 394-1 through 394-N. Each of the RF generators 393-1 through 393-N is connected in bidirectional data/signal communication with a controller 351. The controller 351 operates to synchronize the bias voltage waveforms output by the voltage supply system 391 and each of the RF generators 393-1 through 393-N. The RF voltage signal(s) output by the RF generators 393-1 through 393-N are combined over electrical connection 335 with the bias voltage regulated waveform 342-1 output by the voltage supply system 391. In some embodiments, RF generators 393-1 to 393-N and corresponding impedance matching networks 394-1 to 394-N are implemented in the first voltage supply system 390. However, in some embodiments, RF generators 393-1 to 393-N and corresponding impedance matching networks 394-1 to 394-N are not implemented in the first voltage supply system 390.

The second voltage supply system 395 includes a voltage supply system 396 having an output connected to the edge ring electrode 323 via a filter 397 and an electrical connection 337. The voltage supply system 396 is configured similarly to the voltage supply system 341. As such, the voltage supply system 396 generates and supplies a predetermined bias voltage adjusted waveform 342-2 to the edge ring electrode 323. The predetermined bias voltage adjusted waveform 342-2 includes a step portion 342A2 and a slope portion 342B2. The filter 397 is configured to prevent RF signals from entering the voltage supply system 396. In various embodiments, the filter 397 is a low-pass filter or a notch filter.

The second voltage supply system 395 also optionally includes a number (N) (N is 1 or greater) of RF generators 398-1 through 398-N, which are connected to supply RF bias voltages to the edge ring electrode 323 via respective impedance match networks 399-1 through 399-N. Each of the RF generators 398-1 through 398-N is connected in bidirectional data/signal communication with a controller 351. The controller 351 operates to synchronize the bias voltage waveforms output by the voltage supply system 396 and each of the RF generators 398-1 through 398-N. The RF voltage signal(s) output by the RF generators 398-1 through 398-N are combined over electrical connection 337 with the bias voltage regulated waveform 342-2 output by the voltage supply system 396. In some embodiments, RF generators 398-1 to 398-N and corresponding impedance matching networks 399-1 to 399-N are implemented in the second voltage supply system 395. However, in some embodiments, RF generators 398-1 to 398-N and corresponding impedance matching networks 399-1 to 399-N are not implemented in the second voltage supply system 395.

In some embodiments, the bias voltage adjusted waveform 342-1 is generated to maintain a substantially constant voltage on the upper surface 105T of the substrate 105 during the ON period of each pulse cycle in the bias voltage adjusted waveform 342-1, and the bias voltage adjusted waveform 342-2 is generated to maintain a substantially constant voltage on the upper surface 315T of the edge ring 315 during the ON period of each pulse cycle in the bias voltage adjusted waveform 342-2, thereby causing a substantially constant voltage difference to be maintained during the ON periods of the pulse cycles of the bias voltage adjusted waveforms 342-1 and 342-2, where the substantially constant voltage difference is defined to maintain a substantially flat plasma sheath boundary across the transition between the substrate 105 and the edge ring 315. In some embodiments, step portion 342A1 of bias voltage adjusted waveform 342-1 and step portion 342A2 of bias voltage adjusted waveform 342-2 are synchronously controlled to achieve a predetermined voltage difference between the top surface 105T of substrate 105 and the top surface 315T of edge ring 315. Also, in some embodiments, slope portion 342B1 of bias voltage adjusted waveform 342-1 is controlled to compensate for ion-induced discharge of negative charge on the top surface 105T of substrate 105 during the ON period of each pulse cycle of bias voltage adjusted waveform 342-1, such that the voltage on the top surface 105T of substrate 105 remains substantially constant during the ON period of each pulse cycle of bias voltage adjusted waveform 342-1. Additionally, in some embodiments, the sloped portion 342B2 of the bias voltage adjusted waveform 342-2 is controlled to compensate for ion-induced discharge of negative charge on the top surface 315T of the edge ring 315 during the ON period of each pulse cycle of the bias voltage adjusted waveform 342-2, such that the voltage on the top surface 315T of the edge ring 315 remains substantially constant during the ON period of each pulse cycle of the bias voltage adjusted waveform 342-2.

In some embodiments, controller 351 operates to synchronize the phases of bias voltage adjusted waveforms 342-1 and 342-2. In some embodiments, controller 351 operates to synchronize both the phase and duty cycle of bias voltage adjusted waveforms 342-1 and 342-2. In some embodiments, controller 351 operates to implement a predetermined phase shift between bias voltage adjusted waveforms 342-1 and 342-2. In some embodiments, bias voltage adjusted waveforms 342-1 and 342-2 are defined to have different phases and/or different duty cycles relative to one another. Also, in some embodiments, one or both of bias voltage adjusted waveforms 342-1 and 342-2 are defined to implement a predetermined level-by-level pulsing scheme. It should be understood that bias voltage adjusted waveforms 342-1 and 342-2 are separately and independently controllable relative to one another.

Furthermore, in various embodiments, any number of voltage sensors, e.g., voltage/current sensors (VI sensors), can be connected within bias voltage supply system 333B to measure real-time voltages at specific locations and communicate information related to the measured real-time voltages to controller 351. In some embodiments, controller 351 is configured to use real-time voltage measurements within first voltage supply system 390 and/or second voltage supply system 395 to control the operation of one or more of voltage supply system 391, RF generators 393-1 through 393-N, voltage supply system 396, and RF generators 398-1 through 398-N.

Figure 4 is an illustrative diagram of controller 351, according to some embodiments. In some embodiments, controller 351 includes a processor 409, a storage hardware unit (HU) 411 (e.g., memory), an input HU 401, an output HU 405, an input/output (I/O) interface 403, an I/O interface 407, a network interface controller (NIC) 415, and a data communication bus 413. The processor 409, storage HU 411, input HU 401, output HU 405, I/O interface 403, I/O interface 407, and NIC 415 communicate data with each other via data communication bus 413. Examples of input HUs 401 include a mouse, keyboard, touch pen, data acquisition system, data acquisition card, etc. Examples of output HUs 405 include a display, speaker, device controller, etc. Examples of NICs 415 include a network interface card, network adapter, etc. In various embodiments, NIC 415 is configured to operate according to one or more communication protocols and associated physical layers, such as Ethernet and/or EtherCAT, among others. I/O interfaces 403 and 407 are each defined to provide compatibility between separate hardware units coupled to the I/O interface. For example, I/O interface 403 can be defined to convert signals received from input HU 401 to a format, amplitude, and/or rate compatible with data communication bus 413. I/O interface 407 can also be defined to convert signals received from data communication bus 413 to a format, amplitude, and/or rate compatible with output HU 405. While various operations described herein are performed by processor 409 of controller 351, it should be understood that in some embodiments, various operations can be performed by multiple processors of controller 351 and/or multiple processors of multiple computing systems connected to controller 351.

In various embodiments, the plasma processing system 300 is integrated with electronics for controlling operations before, during, and after processing of the substrate 105, implemented in a controller 351 configured and connected to control various components and/or subcomponents of the plasma processing system 300, including the bias voltage supply system 333. Depending on the processing requirements of the substrate 105 and/or the particular configuration of the plasma processing system 300, the controller 351 is programmed to control any of the processes and/or components disclosed herein, including, for example, delivery of process gas(es), temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, RF power supply system settings, electrical signal frequency settings, gas flow rate settings, fluid delivery settings, position and operation settings, bias voltage supply system 333 settings, and loading and unloading of the substrate 105 into and/or from a load lock connected or interfaced to the plasma processing system 300, among others.

In various embodiments, controller 351 is defined as electronic equipment having various integrated circuits, logic, memory, and/or software that direct and control various tasks/operations, such as receiving instructions, issuing instructions, controlling equipment operations, enabling cleaning operations, enabling endpoint metrology, enabling metrology measurements (e.g., optical, thermal, electrical), etc. In some embodiments, the integrated circuits in controller 351 include, among other computing devices, one or more firmware that stores program instructions, digital signal processors (DSPs), application specific integrated circuit (ASIC) chips, programmable logic devices (PLDs), one or more microprocessors, and/or one or more microcontrollers that execute the program instructions (e.g., software). In some embodiments, the program instructions are communicated to controller 351 in the form of various personalized settings (or program files) that define the operational parameters for performing a particular process on a substrate 105 in plasma processing system 300. In some embodiments, the operational parameters are included in a recipe defined by a process engineer to accomplish one or more processing steps in the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies on the substrate 105.

In some embodiments, the controller 351 is integrated into, connected to, or otherwise networked with the plasma processing system 300, is part of, or is connected to such a computer, or is a combination thereof. For example, in some embodiments, the controller 351 is implemented in the "cloud" or in all or part of a host computer system at a fab that allows remote access for control of the processing of substrates 105 by the plasma processing system 300. The controller 351 provides remote access to the plasma processing system 300 to monitor the current progress of a manufacturing operation, review the history of past manufacturing operations, review trends or performance criteria from multiple manufacturing operations, modify process parameters, set subsequent processing steps, specify operating parameters for the RF power supply system, specify operating parameters for the bias voltage supply system 333, and/or initiate a new substrate manufacturing process.

In some embodiments, a remote computer, such as a server computer system, provides the process recipe to the controller 351 over a computer network, including a local network and/or the Internet. The remote computer includes a user interface that allows for entry or programming of parameters and/or settings, which are then communicated from the remote computer to the controller 351. In some examples, the controller 351 receives instructions in the form of settings for processing the substrate 105 in the plasma processing system 300. It should be understood that the settings are specific to the type of process being performed on the substrate 105 and the type of tools/devices/components that the controller 351 interfaces with or controls. In some embodiments, the controller 351 is distributed, such as by including one or more individual controller(s) 351 networked together and synchronized to work toward a common goal, such as operating the plasma processing system 300 to perform a predetermined process on the substrate 105. An example of a distributed controller 351 for such purposes includes one or more integrated circuits on the chamber that communicate with one or more integrated circuits located remotely (e.g., at the platform level or as part of a remote computer) that are combined to control the process in the chamber.

5 illustrates an example of a bias voltage adjusted waveform 501 supplied to the bias electrode 123 by the bias voltage supply system 333 (e.g., 333A or 333B) and a corresponding voltage waveform 503 resulting on the upper surface 105T of the substrate 105, according to some embodiments. The bias voltage adjusted waveform 501 is similar to the predetermined bias voltage adjusted waveform 342 described with reference to FIG. 3F. The resulting voltage waveform 503 on the upper surface 105T of the substrate 105 is similar to the bias voltage waveform 372 described with reference to FIG. 3F. The bias voltage adjusted waveform 501 has a pulse shape with a periodic frequency within the RF regime. It should be understood that the bias voltage adjusted waveform 501 is a non-sinusoidal RF waveform. In various embodiments, the bias voltage adjusted waveform 501 is configured to control the ion energy distribution function (IEDF) of ions in the plasma 119 within a range of electrical influence extending upward from the upper surface 105T of the substrate 105. For example, in FIG. 5 , bias voltage adjusted waveform 501 is configured to control the IEDF of ions in plasma 119 to achieve a substantially monoenergetic ion energy distribution at the top surface 105T of substrate 105. Bias voltage adjusted waveform 501 generates a substantially constant negative voltage on the top surface 105T of substrate 105, as shown by voltage waveform 503, which causes ions in plasma 119 to be accelerated to substantially the same energy level as they are attracted toward the top surface 105T of substrate 105.

By operating the bias voltage supply system 333 to generate the bias voltage regulated waveform 501 and supplying the bias voltage regulated waveform 501 to the bias electrode 123, a narrow IEDF can be achieved, and further, ion energy and ion flux at the top surface 105T of the substrate 105 can be independently controlled. However, control of the IEDF and ion flux at the top surface 105T of the substrate 105 remains challenging due to the lack of real-time, in-situ measurements of the IEDF and ion flux at the top surface 105T of the substrate 105. To achieve and maintain the desired IEDF, it is necessary to sense either the IEDF or the voltage at the top surface 105T of the substrate 105. Because the IEDF is dependent on the voltage at the top surface 105T of the substrate 105, the real-time IEDF at the top surface 105T of the substrate 105 can be determined by knowing the real-time voltage at the top surface 105T of the substrate 105. However, directly measuring the IEDF or voltage at the top surface 105T of the substrate 105 requires the deployment of a physical sensor or probe on the substrate 105, which disrupts the processing of the substrate 105. For example, it can degrade the uniformity of the plasma 119 across the substrate 105, among other problems, and correspondingly reduce the manufacturing yield of semiconductor chips. Controlling the voltage and current on the substrate 105 using the non-sinusoidal bias voltage regulated waveform 501 relies on knowing the real-time voltage on the top surface 105T of the substrate 105.

Various embodiments are disclosed herein for enabling real-time closed-loop feedback control of non-sinusoidal bias voltage regulated waveforms 342, 342-1, 501 by indirectly measuring the voltage on the upper surface 105T of the substrate 105 in real time to achieve and maintain a predetermined voltage on the upper surface 105T of the substrate 105 and control the IEDF at the upper surface 105T of the substrate 105 accordingly. Efficient and accurate detection of the voltage on the upper surface 105T of the substrate 105 is particularly important for plasma-based substrate 105 manufacturing processes that involve pulsing operations where the density of the plasma 119 changes dynamically over short periods of time (e.g., much less than 1 millisecond). Also disclosed herein are various embodiments for enabling real-time closed-loop feedback control of the non-sinusoidal bias voltage regulated waveforms 342, 342-2 by indirectly measuring the voltage on the upper surface 315T of the edge ring 315 in real time to achieve and maintain a predetermined voltage on the upper surface 315T of the edge ring 315 and control the IEDF at the upper surface 315T of the edge ring 315 accordingly.

6 shows a voltage waveform 601 on the middle electrode 302 in the substrate support 301 corresponding to the bias voltage adjusted waveform 501 supplied to the bias electrode 123 by the bias voltage supply system 333 as shown in FIG. 5, according to some embodiments. FIG. 6 also shows a voltage waveform 503 produced on the upper surface 105T of the substrate 105 by the supply of the bias voltage adjusted waveform 501 to the bias electrode 123 by the bias voltage supply system 333 as shown in FIG. 5. The voltage on the bias electrode 123 is controlled by the bias voltage adjusted waveforms 342, 342-1, 501 supplied to the bias electrode 123 by the bias voltage supply system 333. The voltage on the upper surface 105T of the substrate 105 is controlled by both the bias voltage adjusted waveforms 342, 342-1, 501 supplied to the bias electrode 123 by the bias voltage supply system 333 and electrons and ions from the plasma 119 incident on the upper surface 105T of the substrate 105. An electrically isolated intermediate layer electrode 302 disposed within the substrate support 301 between the bias electrode 123 and the upper surface 301T of the substrate support 301 captures a voltage waveform 601 between the bias voltage adjusted waveforms 342, 342-1, 501 and the voltage waveform 503 on the upper surface 105T of the substrate 105.

The voltage difference between the bias electrode 123 and the middle-layer electrode 302 is proportional to the impedance between the bias electrode 123 and the middle-layer electrode 302. Similarly, the voltage difference between the middle-layer electrode 302 and the top surface 105T of the substrate 105 is proportional to the impedance between the middle-layer electrode 302 and the top surface 105T of the substrate 105. The impedance between the bias electrode 123 and the middle-layer electrode 302 is given by (1/jωC _{midlevel-to-biaselectrode} ), where C _{midlevel-to-biaselectrode} is the capacitance of the bottom 303 of the substrate support 301 between the bias electrode 123 and the middle-layer electrode 302. The impedance between the middle-layer electrode 302 and the top surface 105T of the substrate 105 is given by (1/jωC _{substrate-to-midlevel} ), where C _{substrate-to-midlevel} is the capacitance of the top 305 of the substrate support 301 between the middle-layer electrode 302 and the top surface 301T of the substrate support 301. This assumes that the effect of the substrate 105 on the impedance between the middle-layer electrode 302 and the top surface 105T of the substrate 105 is negligible. Therefore, the electrically isolated middle-layer electrode 302 forms a capacitive voltage divider that picks up the voltage shown in Equation 1, where V _midlevel is the voltage on the middle-layer electrode 302, V _{biaselectrode} is the voltage on the bias electrode 123, and V _substrate is the voltage on the top surface 105T of the substrate 105. From Equation 1, the voltage on the middle-layer electrode 302 can be expressed as shown in Equation 2. Also, from Equation 1, the voltage on the top surface 105T of the substrate 105 can be expressed as shown in Equation 3. Therefore, the real-time voltage (V _substrate ) on the top surface 105T of the substrate 105 is indirectly determined using Equation 3, using the known capacitance (C _{midlevel-to-biaselectrode} ) of the bottom 303 of the substrate support 301 between the bias electrode 123 and the middle electrode 302, the known capacitance (C _{substrate-to-midlevel} ) of the top 305 of the substrate support 301 between the middle electrode 302 and the top surface 301T of the substrate support 301, and direct real-time measurements of the voltage on the middle electrode 302 (V _midlevel ) and the voltage on the bias electrode 123 (V _{biaselectrode} ).

The same relationships shown in Equations 1-3 can be applied to the edge ring 315 to indirectly determine the voltage on the top surface 315T of the edge ring 315 by using direct real-time voltage measurements of the edge ring electrode 323 and the edge ring mid-layer electrode 317, respectively.

The voltage of the edge ring electrode 323 is controlled by bias voltage adjusted waveforms 342, 342-2 supplied to the edge ring electrode 323 by the bias voltage supply system 333. The voltage on the upper surface 315T of the edge ring 315 is controlled not only by the bias voltage adjusted waveforms 342, 342-2 supplied to the edge ring electrode 323 by the bias voltage supply system 333, but also by electrons and ions from the plasma 119 incident on the upper surface 315T of the edge ring 315. An electrically isolated edge ring mid-layer electrode 317 disposed within the edge ring 315 and between the edge ring electrode 323 and the upper surface 315T of the edge ring 315 captures the voltage waveform between the bias voltage adjusted waveforms 342, 342-2 and the voltage waveform on the upper surface 315T of the edge ring 315.

The voltage difference between the edge ring electrode 323 and the edge ring middle electrode 317 is proportional to the impedance between the edge ring electrode 323 and the edge ring middle electrode 317. Similarly, the voltage difference between the edge ring middle electrode 317 and the top surface 315T of the edge ring 315 is proportional to the impedance between the edge ring middle electrode 317 and the top surface 315T of the edge ring 315. The impedance between the edge ring electrode 323 and the edge ring middle electrode 317 is given by (1/jωC _{ERmidlevel-to-ERelectrode} ), where C _{ERmidlevel-to-ERelectrode} is the capacitance of the lower part 319 of the edge ring 315 between the edge ring electrode 323 and the edge ring middle electrode 317. The impedance between the edge ring middle electrode 317 and the top surface 315T of the edge ring 315 is given by (1/jωC _{ERtop-to-ERmidlevel} ), where C _{ERtop-to-ERmidlevel} is the capacitance of the top 321 of the edge ring 315 between the edge ring middle electrode 317 and the top surface 315T of the edge ring 315. Therefore, the electrically isolated edge ring middle electrode 317 forms a capacitive voltage divider that picks up the voltage shown in Equation 4, where V _ERmidlevel is the voltage on the edge ring middle electrode 317, V _ERelectrode is the voltage on the edge ring electrode 323, and V _ERtop is the voltage on the top surface 315T of the edge ring 315. From Equation 4, the voltage on the edge ring middle electrode 317 can be expressed as shown in Equation 5. From Equation 4, the voltage on the top surface 315T of the edge ring 315 can also be expressed as shown in Equation 6. Therefore, the real-time voltage (V _ERtop ) on the top surface 315T of the edge ring 315 is indirectly determined using Equation 6 using the known capacitance (C _{ERmidlevel-to-ERelectrode} ) of the bottom 319 of the edge ring 315 between the edge ring electrode 323 and the edge ring middle electrode 317, the known capacitance (C ERtop-to- _{ERmidlevel ) of the top 321 of the edge ring 315 between the edge ring} middle electrode 317 and the top surface 315T of the edge ring 315, and direct real-time measurements of the voltage (V _ERmidlevel ) on the edge ring middle electrode 317 and the voltage (V _ERelectrode ) on the edge ring electrode 323.

FIG. 7 shows an example of a bias voltage adjusted waveform 701 supplied to the bias electrode 123 by the bias voltage supply system 333 and a corresponding voltage waveform 703 generated on the upper surface 105T of the substrate 105, according to some embodiments. FIG. 7 also shows a TCP voltage waveform 705, which represents the voltage on the coil 109 resulting from the supply of TCP RF power to the coil 109 by the TCP RF generator 113. In the example of FIG. 7, RF power is supplied to the TCP coil 109 in pulses, whereby successive ON pulses of TCP RF power are separated by OFF pulses of TCP RF power. The duty cycle of the ON and OFF pulses of TCP RF power, i.e., the duration of the ON pulse relative to the OFF duration, is specified in the plasma processing recipe. The supply of the bias voltage adjusted waveform 701 to the bias electrode 123 is synchronized to coincide with each ON pulse of TCP RF power supplied to the TCP coil 109.

With single-level TCPRF power pulsing as shown in FIG. 7 , the plasma 119 experiences dynamic changes, such as density changes, with each pulsing state. Therefore, even if the bias voltage adjusted waveform 701 supplied to the bias electrode 123 has a consistent pulse pattern that should produce a consistent pulse pattern in the voltage waveform 703 on the upper surface 105T of the substrate 105 over the duration of the TCPRF power ON pulse, the dynamic changes in the plasma 119 cause the voltage waveform 703 on the upper surface 105T of the substrate 105 to have an initial settling time, as shown by region 707, when the bias voltage adjusted waveform 701 is supplied to the bias electrode 123. Specifically, when the bias voltage adjusted waveform 701 is initially supplied to the bias electrode 123 at the beginning of the TCPRF power ON pulse to generate the voltage waveform 703 on the upper surface 105T of the substrate 105, the plasma 119 density is relatively low, and the ion flux incident on the substrate 105 is correspondingly low. Thus, at the beginning of the ON pulse of TCPRF power, the incident flux of ions to the substrate 105 is not yet sufficient to electrically neutralize the negative voltage on the upper surface 105T of the substrate 105 to achieve a constant set point voltage 711 on the upper surface 105T of the substrate 105. As the ON pulse of TCPRF power progresses, the plasma 119 density increases and reaches a steady state, and the ion flux incident on the substrate 105 correspondingly increases and reaches a steady state, thereby electrically neutralizing more of the negative voltage on the upper surface 105T of the substrate 105 until a constant set point voltage 711 on the upper surface 105T of the substrate 105 is achieved, as shown by region 709 of the voltage waveform 703.

The key is to control the bias voltage adjusted waveform 701 supplied to the bias electrode 123 to produce a voltage waveform 703 on the upper surface 105T of the substrate 105 in a manner that minimizes the initial settling time of the voltage waveform 103, as indicated by region 707. In other words, the key is to control the bias voltage adjusted waveform 701 supplied to the bias electrode 123 so that a constant set point voltage 711 on the upper surface 105T of the substrate 105 is achieved and maintained as the plasma 119 density increases to a steady state during the ON pulse of TCPRF power. In order to control the bias voltage adjusted waveform 701 supplied to the bias electrode 123 in the above manner, the voltage on the upper surface 105T of the substrate 105 must be determined in real time as a feedback control signal to the bias voltage supply system 333. Using the techniques described above with respect to Equations 1-3, the real-time voltage (V substrate ) on the top surface 105T of the substrate 105 is determined through direct measurement of the real-time bias electrode 123 voltage (V _{biaselectrode} ) and direct measurement of the real-time middle electrode 302 voltage (V _midlevel ). The determined real-time voltage (V _substrate ) on the top surface 105T of the _substrate 105 is used as a closed-loop feedback control signal to control the generation of the bias voltage adjusted waveform 701 to generate a voltage waveform 703 on the top surface 105T of the substrate 105 in a manner that minimizes the initial settling time of the voltage waveform 103 in order to achieve and maintain a constant set-point voltage 711 on the top surface 105T of the substrate 105 as quickly as possible after the start of each ON pulse of TCPRF power.

In some embodiments, the real-time voltage on the top surface 105T of the substrate 105 (V _substrate ) is provided by the controller 351 to the bias voltage supply system 333 for use in determining adjustments to the predetermined bias voltage adjusted waveform 342 to be made on the next pulse of the predetermined bias voltage adjusted waveform 342. It should be understood that essentially any aspect of the predetermined bias voltage adjusted waveform 342 can be adjusted as needed to minimize the difference between the feedback signal, i.e., the real-time voltage on the top surface 105T of the substrate 105 (V _substrate ), and the constant setpoint voltage 711. For example, parameters of the predetermined bias voltage adjusted waveform 342, such as the initial negative voltage (Vstep), the negative voltage slope (dV/dT), and the duty cycle (duration of the negative voltage within a given pulse), can be controlled to minimize the difference between the determined real-time voltage on the top surface 105T of the substrate 105 (V _substrate ) and the constant setpoint voltage 711.

It should be understood that the closed-loop feedback control method for the voltage developed on the top surface 105T of the substrate 105 described with respect to Figure 7 is equally applicable to controlling the voltage developed on the top surface 315T of the edge ring 315. Specifically, the techniques described above with respect to Equations 4-6 are used to determine the real-time voltage (V _ERtop ) on the top surface 315T of the edge ring 315 through direct measurement of the real-time voltage (V ERelectrode ) on the edge ring electrode 323 and direct measurement of the real-time voltage (V _ERmidlevel ) on _the edge ring mid-layer electrode 317. The determined real-time voltage (V _ERtop ) on the top surface 315T of the edge ring 315 is used as a closed-loop feedback control signal to control the generation of a bias voltage adjusted waveform applied to the edge ring electrode 323 to generate a voltage waveform on the top surface 315T of the edge ring 315 in a manner that minimizes the initial settling time of the voltage waveform in order to achieve and maintain a constant setpoint voltage on the top surface 315T of the edge ring 315 as quickly as possible after the start of each ON pulse of TCPRF power.

In some embodiments, the real-time voltage (V _ERtop ) at the top surface 315T of the edge ring 315 is provided by the controller 351 to the bias voltage supply system 333 for use in determining the adjustment of the predetermined bias voltage adjusted waveform 342, 342-2 to be made at the next pulse of the predetermined bias voltage adjusted waveform 342, 342-2. It should be understood that essentially any aspect of the predetermined bias voltage adjusted waveform 342, 342-2 can be adjusted as needed to minimize the difference between the feedback signal, i.e., the real-time voltage (V _ERtop ) at the top surface 315T of the edge ring 315, and a constant setpoint voltage. For example, parameters of the predetermined bias voltage adjusted waveforms 342, 342-2, such as the initial negative voltage (Vstep), negative voltage slope (dV/dT), and duty cycle (duration of negative voltage within a given pulse), can be controlled to minimize the difference between the determined real-time voltage (V _ERtop ) at the top surface 315T of the edge ring 315 and a constant set point voltage.

In some embodiments, the voltage (V _ERtop ) on the top surface 315T of the edge ring 315 is used to form a uniform plasma 119 sheath near the edge of the substrate 105 and minimize the impinging ion distribution function (IADF). In some embodiments, a smaller IADF increases manufacturing yields by reducing the tilt effect on the etch profile near the edge of the substrate 105. In some embodiments, the voltage (V _ERtop ) on the top surface 315T of the edge ring 315 is compared to the voltage (V _substrate ) on the top surface 105T of the substrate 105 to generate a feedback control signal for use in reducing the voltage difference between the top surface 105T of the substrate 105 and the top surface 315T of the edge ring 315 if the voltage difference increases adversely in the IADF.

Figure 8 shows a feedback-controlled bias voltage regulated waveform 801 supplied to the bias electrode 123 by the bias voltage supply system 333 and a corresponding voltage waveform 803 generated on the top surface 105T of the substrate 105, according to some embodiments. Figure 8 also shows a TCP voltage waveform 805, which represents the voltage on the coil 109 resulting from the supply of TCPRF power to the coil 109 by the TCPRF generator 113. For comparison, Figure 8 also shows a non-feedback-controlled bias voltage regulated waveform 701 supplied to the bias electrode 123 and the corresponding voltage waveform 703 according to Figure 7 generated on the top surface 105T of the substrate 105. FIG. 8 shows that by using the determined real-time voltage (V _substrate ) on the top surface 105T of the substrate 105 as a feedback signal to achieve a constant set-point voltage 811 on the top surface 105T of the substrate 105, the slope (dV/dT) of the feedback-controlled bias voltage adjusted waveform 801 is gradually increased between successive pulses of the feedback-controlled bias voltage adjusted waveform 801 until the plasma 119 density reaches a steady state during the ON pulse of TCPRF power.

It should be appreciated that the closed-loop feedback control method for the voltage generated on the top surface 105T of the substrate 105 described with respect to Figure 8 is equally applicable to controlling the voltage generated on the top surface 315T of the edge ring 315. Specifically, by using the determined real-time voltage (V _ERtop ) on the top surface 315T of the edge ring 315 as a feedback signal to achieve a constant setpoint voltage on the top surface 315T of the edge ring 315, the slope (dV/dT) of the feedback-controlled bias voltage adjusted waveform supplied to the edge ring electrode 323 is gradually increased between successive pulses of the feedback-controlled bias voltage adjusted waveform supplied to the edge ring electrode 323 until the plasma 119 density reaches a steady state during the ON pulse of TCPRF power.

Figure 9 shows a feedback-controlled bias voltage regulated waveform 901 supplied to the bias electrode 123 by the bias voltage supply system 333 and a corresponding voltage waveform 903 generated on the top surface 105T of the substrate 105, according to some embodiments. Figure 9 also shows a TCP voltage waveform 905, which represents the voltage on the coil 109 resulting from the supply of TCPRF power to the coil 109 by the TCPRF generator 113. For comparison, Figure 9 also shows a non-feedback-controlled bias voltage regulated waveform 701 supplied to the bias electrode 123 and the corresponding voltage waveform 703 according to Figure 7 generated on the top surface 105T of the substrate 105. 9 shows that the duty cycle of the feedback-controlled bias voltage adjusted _waveform 801 is gradually increased between successive pulses of the feedback-controlled bias voltage adjusted waveform 901 until the plasma 119 density reaches a steady state during the ON pulse of TCPRF power, by using the determined real-time voltage (V substrate ) on the top surface 105T of the substrate 105 as a feedback signal to achieve a constant setpoint voltage 911 on the top surface 105T of the substrate 105. The duty cycle of the feedback-controlled bias voltage adjusted waveform 901 is defined as the percentage of a given pulse of the feedback-controlled bias voltage adjusted waveform 901 that is negatively biased. The duty cycle of the feedback-controlled bias voltage adjusted waveform 901 can be varied from pulse to pulse of the feedback-controlled bias voltage adjusted waveform 901. 9, the slope (dV/dT) of the feedback-controlled bias voltage adjusted waveform 901 is substantially constant during the negative voltage portion of each pulse of the feedback-controlled bias voltage adjusted waveform 901, regardless of the duty cycle applied during the pulse. However, in some embodiments, the slope (dV/dT) during the negative voltage portion of each pulse of the feedback-controlled bias voltage adjusted waveform 901 is adjusted for each pulse of the feedback-controlled bias voltage adjusted waveform 901.

In some embodiments, the real-time voltage on the top surface 105T of the substrate 105 (V _substrate ) is determined at a sufficiently high sampling/measurement rate so as to be detectable in real time when the difference between the real-time voltage on the top surface 105T of the substrate 105 (V _substrate ) and the setpoint voltage 911 exceeds a predetermined threshold. In these embodiments, the negative voltage portion of the current pulse of the feedback-controlled bias voltage adjusted waveform 901 is automatically terminated whenever the difference between the real-time voltage on the top surface 105T of the substrate 105 (V _substrate ) and the setpoint voltage 911 exceeds a predetermined threshold, which corresponds to automatic closed-loop feedback control of the duty cycle of the bias voltage adjusted waveform 901.

In some embodiments, controlling the duty cycle of the bias voltage adjusted waveform 901 limits the bias voltage adjusted waveform 901 within a range extending between an upper voltage boundary and a lower voltage boundary. Also, in some embodiments, controlling the duty cycle of the bias voltage adjusted waveform 901 protects against voltage surges according to a control algorithm. Furthermore, controlling the duty cycle of the bias voltage adjusted waveform 901 immediately affects the in situ ion energy. In various embodiments, any one or more parameters of the bias voltage adjusted waveform 901 can be feedback controlled to minimize the difference between a determined real-time voltage at the top surface 105T of the substrate 105 (V _substrate ) and a constant setpoint voltage 911 achieved and maintained on the top surface 105T of the substrate 105. For example, in some embodiments, one or more of the positive period of the bias voltage adjusted waveform 901, the negative period of the bias voltage adjusted waveform 901, and the frequency of the bias voltage adjusted waveform 901 are feedback controlled using the determined real-time voltage (V _substrate ) of the upper surface 105T of the substrate 105 as a feedback control signal to achieve and maintain a constant set point voltage 911 on the upper surface 105T of the substrate 105.

It should be appreciated that the closed-loop feedback control method for the voltage generated on the top surface 105T of the substrate 105 described with respect to Figure 9 is equally applicable to controlling the voltage generated on the top surface 315T of the edge ring 315, particularly when the bias voltage supply system 333B of Figure 3G is implemented. Specifically, by using the determined real-time voltage (V _ERtop ) on the top surface 315T of the edge ring 315 as a feedback signal to achieve a constant setpoint voltage on the top surface 315T of the edge ring 315, the duty cycle of the feedback-controlled bias voltage adjusted waveform supplied to the edge ring electrode 323 is gradually increased between successive pulses of the feedback-controlled bias voltage adjusted waveform supplied to the edge ring electrode 323 until the plasma 119 density reaches a steady state during the ON pulse of TCPRF power.

Maintaining a small IADF while pulsing TCPRF power can be difficult due to capacitance differences between the substrate support 301 and the edge ring 315. Because the surface area of the edge ring 315 is typically smaller than that of the substrate support 301, the capacitance of the edge ring 315 is smaller than that of the substrate support 301. The smaller the capacitance of the edge ring 315, the larger the fluctuation in voltage on the upper surface 315T of the edge ring 315. Feedback control of the voltage amplitude typically requires more time for adjustment the larger the error from the target voltage. Therefore, because the capacitance of the edge ring 315 is smaller than that of the substrate support 301, the edge ring 315 requires faster feedback control than the substrate support 301. If either the voltage on the top surface 105T of the substrate 105 or the voltage on the top surface 315T of the edge ring 315 were to be lost to feedback control, a large voltage difference would occur between the top surface 105T of the substrate 105 and the top surface 315T of the edge ring 315, potentially resulting in a large IADF and a corresponding adverse etch slope. In some embodiments, when the bias voltage supply system 333A of FIG. 3D is implemented, closed-loop feedback control of the duty cycle of the bias voltage regulated waveform 342 limits the voltage difference between the top surface 105T of the substrate 105 and the top surface 315T of the edge ring 315 to maintain a small IADF near the edge of the substrate 105. In some embodiments, when the bias voltage supply system 333B of FIG. 3G is implemented, independent closed-loop feedback control of each of the bias voltage adjusted waveforms 342-1 and 342-2 limits the voltage difference between the top surface 105T of the substrate 105 and the top surface 315T of the edge ring 315 to maintain a small IADF near the edge of the substrate 105.

In some embodiments, the bias voltage supply system 333 includes a bias electrode 123 disposed within the substrate support 301 and a middle layer electrode 302 disposed within the substrate support 301, such that the lower portion 303 of the substrate support 301 is between the bias electrode 123 and the middle layer electrode 302, and the upper portion 305 of the substrate support 301 is between the middle layer electrode 302 and the top surface 301T of the substrate support 301. The bias voltage supply system 333 also includes voltage supply systems 341, 391 connected to supply a bias voltage regulated radio frequency waveform to the bias electrode 123. In some embodiments, the bias voltage regulated radio frequency waveform is defined as an ongoing series of pulse cycles, each pulse cycle including an ON period during which the bias voltage regulated radio frequency waveform has a negative voltage and an OFF period during which the bias voltage regulated radio frequency waveform has a positive voltage. The bias voltage supply system 333 also includes a voltage measurement system connected to measure the first voltage on the bias electrode 123 and the second voltage on the middle electrode 302. The bias voltage supply system 333 also includes a controller 351 (or a portion thereof) configured to determine a voltage on the top surface 105T of the substrate 105 residing on the top surface 301T of the substrate support 301 using the measured first voltage, the measured second voltage, the capacitance of the lower portion 303 of the substrate support 301, and the capacitance of the upper portion 305 of the substrate support 301. The controller 315 is configured to communicate the voltage on the top surface 105T of the substrate 105 to the voltage supply systems 341, 391.

In some embodiments, the voltage supply system 341, 391 is configured to adjust the bias voltage adjusted radio frequency waveform to minimize the difference between the setpoint voltage and the voltage on the top surface 105T of the substrate 105. In some embodiments, the voltage supply system 341, 391 is configured to adjust the bias voltage adjusted radio frequency waveform within one pulse cycle of the bias voltage adjusted radio frequency waveform. In some embodiments, the controller 351 is configured to determine the voltage on the top surface 105T of the substrate 105 by calculating the sum of a first term and a second term, where the first term is equal to the second voltage on the middle layer electrode 302, the second term is equal to the product of a constant and a differential voltage, the constant is equal to the ratio of the capacitance of the lower portion 303 of the substrate support 301 to the capacitance of the upper portion 305 of the substrate support 301, and the differential voltage is equal to the second voltage on the middle layer electrode 302 minus the first voltage on the bias electrode 123.

In some embodiments, the bias voltage supply system 333 also includes an edge ring electrode 323 disposed within an edge ring 315 configured to circumscribe the substrate support 301. The edge ring electrode 323 is configured to control the voltage on the upper surface 315T of the edge ring 315. The bias voltage regulated radio frequency waveform supplied to the bias electrode 123 within the substrate support 301 is a first bias voltage regulated radio frequency waveform. The edge ring electrode 323 is connected to receive a second bias voltage regulated radio frequency waveform from the voltage supply system 341, 396. In some embodiments, the second bias voltage regulated radio frequency waveform is defined as an ongoing series of pulse cycles, each pulse cycle including an ON period during which the second bias voltage regulated radio frequency waveform has a negative voltage and an OFF period during which the second bias voltage regulated radio frequency waveform has a positive voltage. The bias voltage supply system 333 also includes an edge ring middle layer electrode 317 disposed within the edge ring 315, such that the lower portion 319 of the edge ring 315 is between the edge ring electrode 323 and the edge ring middle layer electrode 317, and the upper portion 321 of the edge ring 315 is between the edge ring middle layer electrode 317 and the upper surface 315T of the edge ring 315.

A voltage measurement system is connected to measure a third voltage on the edge ring electrode 323 and a fourth voltage on the edge ring middle electrode 317. The controller 315 is configured to determine a voltage on the top surface 315T of the edge ring 315 using the measured third voltage on the edge ring electrode 323, the measured fourth voltage on the edge ring middle electrode 317, the capacitance of the lower portion 319 of the edge ring 315, and the capacitance of the upper portion 321 of the edge ring 315. In some embodiments, the controller 351 is configured to determine the voltage on the top surface 315T of the edge ring 315 by calculating the sum of a first term and a second term, where the first term is equal to the fourth voltage on the edge ring middle electrode 317, the second term is equal to the product of a constant and the differential voltage, where the constant is equal to the ratio of the capacitance of the bottom portion 319 of the edge ring 315 to the capacitance of the top portion 321 of the edge ring 315, and the differential voltage is equal to the fourth voltage on the edge ring middle electrode 317 minus the third voltage on the edge ring electrode 323. The controller 315 is configured to communicate the voltage on the top surface 315T of the edge ring 315 to a voltage supply system.

In some embodiments, the bias voltage supply system 333 includes variable capacitors 359, 361, 363, 365 arranged to independently control the second bias voltage regulated radio frequency waveform supplied to the edge ring electrode 323 relative to the first bias voltage regulated radio frequency waveform supplied to the bias electrode 123. In some embodiments, the voltage supply systems 341, 396 are configured to adjust the second bias voltage regulated radio frequency waveform supplied to the edge ring electrode 323 to minimize the difference between the setpoint voltage and the voltage on the upper surface 315T of the edge ring 315. In some embodiments, the voltage supply systems 341, 396 are configured to adjust the second bias voltage regulated radio frequency waveform supplied to the edge ring electrode 323 within one pulse cycle of the second bias voltage regulated radio frequency waveform.

In some embodiments, a substrate support system is disclosed for a plasma processing system 300. The substrate support system includes a substrate support 301 having a top surface 301T configured to support a substrate 105. The substrate support system includes a bias electrode 123 disposed within the substrate support 301. The bias electrode 123 is configured to control a voltage on the top surface 105T of the substrate 105. The bias electrode 123 is connected to receive a bias voltage regulated radio frequency waveform from a voltage supply system 341, 391. The substrate support system also includes a middle electrode 302 disposed within the substrate support 301 such that a lower portion 303 of the substrate support 301 is between the bias electrode 123 and the middle electrode 302, and an upper portion 305 of the substrate support 301 is between the middle electrode 302 and the top surface 301T of the substrate support 301. The substrate support system also includes a first connector 313 electrically connected to the bias electrode 123 for measuring a first real-time voltage of the bias electrode 123. The bias electrode 123 is configured to electrically receive a first connector 313 for measuring a first real-time voltage on the bias electrode 123. The substrate support system also includes a second connector 309 electrically connected to the middle layer electrode 302 for measuring a second real-time voltage on the middle layer electrode 302. The middle layer electrode 302 is configured to electrically receive the second connector 309 for measuring the second real-time voltage on the middle layer electrode 302. The substrate support system also includes a controller 315, which is configured to determine a real-time voltage on the top surface 105T of the substrate 105 using the measured first real-time voltage on the bias electrode 123, the measured second real-time voltage on the middle layer electrode 302, the capacitance of the lower portion 303 of the substrate support 301, and the capacitance of the upper portion 305 of the substrate support 301.

In some embodiments, an edge ring system is disclosed for a plasma processing system 300. The edge ring system includes an edge ring 315 configured to circumscribe the substrate support 301. The edge ring system also includes an edge ring electrode 323 disposed within the edge ring 315. The edge ring electrode 323 is configured to control a voltage on the top surface 315T of the edge ring 315. The edge ring electrode 323 is connected to receive a bias voltage regulated radio frequency waveform from a voltage supply system 341, 396. The edge ring system also includes an edge ring middle electrode 317 disposed within the edge ring 315 such that a lower portion 319 of the edge ring 315 resides between the edge ring electrode 323 and the edge ring middle electrode 317, and an upper portion 321 of the edge ring 315 resides between the edge ring middle electrode 317 and the top surface 315T of the edge ring 315. The edge ring system also includes a first connector 327 electrically connected to the edge ring electrode 323 for measuring a first real-time voltage on the edge ring electrode 323. The edge ring electrode 323 is configured to electrically receive the first connector 327 for measuring the first real-time voltage on the edge ring electrode 323. The edge ring system also includes a second connector 331 electrically connected to the edge ring middle electrode 317 for measuring a second real-time voltage on the edge ring middle electrode 317. The edge ring middle electrode 317 is configured to electrically receive the second connector 331 for measuring the second real-time voltage on the edge ring middle electrode 317. The controller 315 is configured to determine a real-time voltage on the top surface 315T of the edge ring 315 using the measured first real-time voltage on the edge ring electrode 323, the measured second real-time voltage on the edge ring middle electrode 317, the capacitance of the bottom portion 319 of the edge ring 315, and the capacitance of the top portion 321 of the edge ring 315.

FIG. 10A shows a flowchart of a method for controlling a voltage on a substrate 105, according to some embodiments. The method includes operation 1001 for operating a voltage supply system 341, 391 to supply a bias voltage-regulated radio frequency waveform to a bias electrode 123 in a substrate support 301. The method also includes operation 1003 for measuring a first voltage on the bias electrode 123 at a given time. It should be understood that various electrical parameters, such as voltage, can be determined/calculated using other related parameters, e.g., V=IR (where V is voltage, I is current, and R is resistance). As such, it should be understood that the various voltage measurements referred to herein can be made by either direct voltage measurements or indirect voltage measurements, and that indirect voltage measurements include determining/measuring one or more parameters related to the voltage being measured and subsequently determining/calculating the voltage being measured using the one or more parameters related to the voltage being measured. The method also includes operation 1005 for measuring a second voltage on the middle layer electrode 302 at a given time. The method also includes operation 1007 for determining a voltage on the top surface 105T of the substrate 105 residing on the top surface 301T of the substrate support 301 at a given time using the measured first voltage on the bias electrode 123 at a given time, the measured second voltage on the middle electrode 302 at a given time, the capacitance of the lower portion 303 of the substrate support 301, and the capacitance of the upper portion 305 of the substrate support 301.

FIG. 10B shows a flowchart of an optional extension of the method of FIG. 10A for controlling the voltage on the substrate 105, according to some embodiments. The method includes operation 1009 for determining a difference between the voltage on the upper surface 105T of the substrate 105 and a setpoint voltage at a given time. The method also includes operation 1011 for determining an adjustment to the bias voltage adjusted radio frequency waveform that reduces the difference between the voltage on the upper surface 105T of the substrate 105 and the setpoint voltage at a given time. The method also includes operation 1013 for operating the voltage supply system 341, 391 to implement the adjustment to the bias voltage adjusted radio frequency waveform.

In some embodiments, the given time occurs during the negative portion of a cycle of the bias voltage adjusted radio frequency waveform, and operation 1013 is performed to make an adjustment to the bias voltage adjusted radio frequency waveform during the negative portion of the next cycle of the bias voltage adjusted radio frequency waveform. In some embodiments, the adjustment to the bias voltage adjusted radio frequency waveform is a change in voltage as a function of time during the negative portion of the next cycle of the bias voltage adjusted radio frequency waveform. In some embodiments, the adjustment to the bias voltage adjusted radio frequency waveform is a change in the duration of the negative portion of the next cycle of the bias voltage adjusted radio frequency waveform.

10C shows a flowchart of an optional extension of the method of either FIG. 10A or FIG. 10B , according to some embodiments. The method includes operation 1015 for operating the voltage supply system 341, 396 to supply a second bias voltage-adjusted radio frequency waveform to the edge ring electrode 323 in the edge ring 315 circumscribing the substrate support 301. In this embodiment, the bias voltage-adjusted radio frequency waveform supplied to the bias electrode 123 in the substrate support 301 is referred to as the first bias voltage-adjusted radio frequency waveform. The method also includes operation 1017 for measuring a third voltage on the edge ring electrode 323 at a given time. The method also includes operation 1019 for measuring a fourth voltage on the edge ring middle electrode 317 at a given time. The method also includes operation 1021 for determining a voltage on the top surface 315T of the edge ring 315 at a given time using the measured third voltage on the edge ring electrode 323 at a given time, the measured fourth voltage on the edge ring middle electrode 317 at a given time, the capacitance of the bottom portion 319 of the edge ring 315, and the capacitance of the top portion 321 of the edge ring 315.

FIG. 10D shows a flowchart of an optional extension of the method of FIG. 10C for controlling the voltage on the edge ring 315, according to some embodiments. The method includes operation 1023 for determining a difference between the voltage on the top surface 315T of the edge ring 315 and a setpoint voltage at a given time. The method also includes operation 1025 for determining an adjustment to the second bias voltage adjusted radio frequency waveform that reduces the difference between the voltage on the top surface 315T of the edge ring 315 and the setpoint voltage at the given time. The method also includes operation 1027 for operating the voltage supply system 341, 396 to implement the adjustment to the second bias voltage adjusted radio frequency waveform. In some embodiments, the given time occurs during a negative portion of a cycle of the second bias voltage adjusted radio frequency waveform, and operation 1027 is performed to implement the adjustment to the second bias voltage adjusted radio frequency waveform during a negative portion of a next cycle of the second bias voltage adjusted radio frequency waveform. In some embodiments, the adjustment to the second bias voltage adjusted radio frequency waveform is a change in voltage as a function of time during the negative portion of the next cycle of the second bias voltage adjusted radio frequency waveform. In some embodiments, the adjustment to the second bias voltage adjusted radio frequency waveform is a change in the duration of the negative portion of the next cycle of the second bias voltage adjusted radio frequency waveform.

The various embodiments described herein may be implemented in conjunction with a variety of computer system configurations, including handheld hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers, and the like. The various embodiments described herein may also be implemented in conjunction with distributed computing environments in which tasks are performed by remote processing hardware units linked through a computer network. It should also be understood that the various embodiments disclosed herein include the performance of various computer-implemented operations involving data stored in computer systems. These computer-implemented operations manipulate physical quantities. In various embodiments, the computer-implemented operations are performed by either general-purpose or special-purpose computers. In some embodiments, the computer-implemented operations are performed by a selectively activated computer and/or are directed by one or more computer programs stored in computer memory or retrieved over a computer network. When computer programs and/or digital data are retrieved over a computer network, the digital data may be processed by other computers on the computer network, e.g., a cloud of computing resources. The computer programs and digital data are stored as computer-readable code on non-primary computer-readable media. A non-primary computer-readable medium is a data storage hardware unit (e.g., a memory device) that stores data that can then be read by a computer system. Examples of non-primary computer-readable media include hard drives, network-attached storage (NAS), ROM, RAM, compact disc-ROMs (CD-ROMs), recordable CDs (CD-Rs), rewritable CDs (CD-RWs), digital video/versatile discs (DVDs), magnetic tape, and other optical and non-optical data storage hardware units. In some embodiments, computer programs and/or digital data are distributed across multiple computer-readable media located on different computer systems within a network of coupled computer systems, such that the computer programs and/or digital data are executed and/or stored in a distributed manner.

While the foregoing embodiments include certain details for clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. For example, it should be understood that one or more features from any embodiment disclosed herein may be combined with one or more features of any other embodiment disclosed herein. Accordingly, the present embodiments are to be considered illustrative and not restrictive, and the claims are not to be limited to the details set forth herein, but may be modified within the scope of the appended embodiments and their equivalents.

Claims (25)

1. A system comprising:
a bias electrode disposed within a substrate support having an upper surface configured to support a substrate;
a middle layer electrode disposed within the substrate support such that a lower portion of the substrate support is between the bias electrode and the middle layer electrode, and an upper portion of the substrate support is between the middle layer electrode and the upper surface of the substrate support;
a voltage supply system connected to supply a bias voltage regulated radio frequency waveform to the bias electrode;
a voltage measurement system connected to measure a first voltage on the bias electrode and a second voltage on the middle electrode;
a controller configured to determine a voltage on a top surface of the substrate when present on the top surface of the substrate support using the measured first voltage, the measured second voltage, a capacitance of the bottom of the substrate support, and a capacitance of the top of the substrate support, and the controller configured to communicate information related to the voltage on the top surface of the substrate to the voltage supply system. 10. The system of claim 1,
the bias voltage adjusted radio frequency waveform is defined as an ongoing series of pulse cycles;
Each of the pulse cycles comprises:
an ON period during which the bias voltage adjusted radio frequency waveform has a negative voltage;
and an OFF period during which the bias voltage adjusted radio frequency waveform has a positive voltage. 3. The system of claim 2,
The voltage supply system is configured to adjust the bias voltage regulated radio frequency waveform to minimize a difference between a set point voltage and the voltage on the top surface of the substrate. 4. The system of claim 3,
The system, wherein the voltage supply system is configured to adjust the bias voltage regulated radio frequency waveform within one pulse cycle of the bias voltage regulated radio frequency waveform. 10. The system of claim 1,
the controller is configured to determine the voltage on the top surface of the substrate by calculating the sum of a first term and a second term;
the first term is equal to the second voltage;
the second term is equal to a constant times the differential voltage,
the constant is equal to a ratio of the capacitance of the lower portion of the substrate support to the capacitance of the upper portion of the substrate support;
The system wherein the differential voltage is equal to the second voltage minus the first voltage. 10. The system of claim 1, wherein the system comprises:
An edge ring electrode,
disposed within an edge ring configured to circumscribe the substrate support;
configured to control a voltage on a top surface of the edge ring;
the bias voltage-adjusted radio frequency waveform supplied to the bias electrode in the substrate support is a first bias voltage-adjusted radio frequency waveform;
an edge ring electrode connected to receive a second bias voltage regulated radio frequency waveform from the voltage supply system;
An edge ring middle layer electrode,
the edge ring is disposed within the edge ring such that a lower portion of the edge ring is between the edge ring electrode and the edge ring middle electrode, and an upper portion of the edge ring is between the edge ring middle electrode and the upper surface of the edge ring;
an edge ring middle layer electrode, the voltage measurement system connected to measure a third voltage on the edge ring electrode and a fourth voltage on the edge ring middle layer electrode;
the controller is configured to determine a voltage on the top surface of the edge ring using the measured third voltage, the measured fourth voltage, a capacitance of the bottom of the edge ring, and a capacitance of the top of the edge ring, and the controller is configured to communicate information related to the voltage on the top surface of the edge ring to the voltage supply system. 7. The system of claim 6,
The system further includes a variable capacitor positioned to independently control the second bias voltage adjusted radio frequency waveform relative to the first bias voltage adjusted radio frequency waveform. 7. The system of claim 6,
the second bias voltage adjusted radio frequency waveform is defined as an ongoing series of pulse cycles;
Each of the pulse cycles comprises:
an ON period during which the second bias voltage adjusted radio frequency waveform has a negative voltage;
an OFF period during which the second bias voltage adjusted radio frequency waveform has a positive voltage. 9. The system of claim 8,
the voltage supply system is configured to adjust the second bias voltage regulated radio frequency waveform to minimize a difference between a set point voltage and the voltage on the top surface of the edge ring. 10. The system of claim 9,
The system, wherein the voltage supply system is configured to adjust the second bias voltage regulated radio frequency waveform within one pulse cycle of the second bias voltage regulated radio frequency waveform. 8. The system of claim 7,
the controller is configured to determine the voltage on the top surface of the edge ring by calculating the sum of a first term and a second term;
the first term is equal to the fourth voltage;
the second term is equal to a constant times the differential voltage,
the constant is equal to a ratio of the capacitance of the lower portion of the edge ring to the capacitance of the upper portion of the edge ring;
The system wherein the differential voltage is equal to the fourth voltage minus the third voltage. 1. A substrate support system for a plasma processing system, comprising:
a substrate support having an upper surface configured to support a substrate;
a bias electrode disposed within the substrate support,
configured to control a voltage on a top surface of the substrate;
connected to receive a bias voltage regulated radio frequency waveform from the voltage supply system;
a bias electrode configured to electrically receive a first connector for measuring a first voltage on the bias electrode;
A middle layer electrode,
positioned within the substrate support such that a lower portion of the substrate support is between the bias electrode and the middle layer electrode, and an upper portion of the substrate support is between the middle layer electrode and the upper surface of the substrate support;
a middle layer electrode configured to electrically receive a second connector for measuring a second voltage on the middle layer electrode. 13. A substrate support system for a plasma processing system according to claim 12, comprising:
a controller configured to determine the voltage on the top surface of the substrate using the measured first voltage, the measured second voltage, a capacitance of the bottom of the substrate support, and a capacitance of the top of the substrate support. 1. An edge ring system for a plasma processing system, comprising:
an edge ring configured to circumscribe the substrate support;
an edge ring electrode disposed within the edge ring,
configured to control a voltage on a top surface of the edge ring and to receive a bias voltage regulated radio frequency waveform from a voltage supply system;
an edge ring electrode configured to electrically receive a first connector for measuring a first voltage on the edge ring electrode;
An edge ring middle layer electrode,
the edge ring is disposed within the edge ring such that a lower portion of the edge ring is between the edge ring electrode and the edge ring middle electrode, and an upper portion of the edge ring is between the edge ring middle electrode and the upper surface of the edge ring;
an edge ring mid-layer electrode configured to electrically receive a second connector for measuring a second voltage on the edge ring mid-layer electrode. 15. An edge ring system for a plasma processing system according to claim 14, comprising:
an edge ring system further including a controller configured to determine the voltage on the top surface of the edge ring using the measured first voltage, the measured second voltage, a capacitance of the bottom of the edge ring, and a capacitance of the top of the edge ring. 1. A method for controlling a voltage on a substrate, comprising:
supplying a bias voltage regulated radio frequency waveform to a bias electrode within the substrate support by operating a voltage supply system;
measuring a first voltage on the bias electrode at a given time;
measuring a second voltage on the middle layer electrode at the given time, the middle layer electrode being positioned within the substrate support such that a lower portion of the substrate support is between the bias electrode and the middle layer electrode and an upper portion of the substrate support is between the middle layer electrode and the top surface of the substrate support;
and determining, at the given time, a voltage on the top surface of the substrate when present on the top surface of the substrate support using the measured first voltage, the measured second voltage, a capacitance of the bottom of the substrate support, and a capacitance of the top of the substrate support. 17. The method of claim 16,
determining a difference between the voltage on the top surface of the substrate at the given time and a set point voltage;
determining an adjustment to the bias voltage adjusted radio frequency waveform that reduces the difference between the voltage on the top surface of the substrate and the setpoint voltage at the given time;
and performing the adjustment to the bias voltage adjusted radio frequency waveform by manipulating the voltage supply system. 18. The method of claim 17,
the given time occurs during a negative portion of a cycle of the bias voltage adjusted radio frequency waveform;
The method, wherein the adjustment to the bias voltage adjusted radio frequency waveform is performed during a negative portion of a next cycle of the bias voltage adjusted radio frequency waveform. 20. The method of claim 18,
The method of claim 1, wherein the adjustment to the bias voltage adjusted radio frequency waveform is a change in voltage as a function of time during the negative portion of the next cycle of the bias voltage adjusted radio frequency waveform. 19. The method of claim 18, wherein the adjustment to the bias voltage adjusted radio frequency waveform is a change in the duration of the negative portion of the next cycle of the bias voltage adjusted radio frequency waveform. 17. The method of claim 16,
operating the voltage supply system to supply the bias voltage regulated radio frequency waveform supplied to the bias electrode in the substrate support as a first bias voltage regulated radio frequency waveform and to supply a second bias voltage regulated radio frequency waveform to an edge ring electrode in an edge ring circumscribing the substrate support;
measuring a third voltage on the edge ring electrode at the given time;
measuring, at the given time, a fourth voltage on the edge ring middle electrode disposed within the edge ring such that a lower portion of the edge ring is between the edge ring electrode and the edge ring middle electrode and an upper portion of the edge ring is between the edge ring middle electrode and the upper surface of the edge ring;
determining a voltage on the top surface of the edge ring at the given time using the measured third voltage, the measured fourth voltage, a capacitance of the bottom of the edge ring, and a capacitance of the top of the edge ring. 22. The method of claim 21,
determining a difference between the voltage on the top surface of the edge ring at the given time and a set point voltage;
determining an adjustment to the second bias voltage adjusted radio frequency waveform that reduces the difference between the voltage on the top surface of the edge ring and the setpoint voltage at the given time;
and performing the adjustment to the second bias voltage regulated radio frequency waveform by manipulating the voltage supply system. 23. The method of claim 22,
the given time occurs during a negative portion of a cycle of the second bias voltage adjusted radio frequency waveform;
The method, wherein the adjustment to the second bias voltage adjusted radio frequency waveform is performed during a negative portion of a next cycle of the second bias voltage adjusted radio frequency waveform. 24. The method of claim 23,
the adjustment to the second bias voltage adjusted radio frequency waveform is a change in voltage as a function of time during the negative portion of the next cycle of the second bias voltage adjusted radio frequency waveform. 24. The method of claim 23,
The method of claim 1, wherein the adjustment to the second bias voltage adjusted radio frequency waveform is a change in the duration of the negative portion of the next cycle of the second bias voltage adjusted radio frequency waveform.