JP2024103980A - Encoder and Motor Control Systems - Google Patents

Abstract

To provide an encoder etc. that can directly output detection results of speed anomaly of a motor driving circuit.SOLUTION: An encoder 100 includes a speed detection unit 110 and a speed anomaly detection unit 120. The speed detection unit 110 detects the speed of a motor 10 driven by a motor driving circuit 300. The speed anomaly detection unit 120 outputs a speed-anomaly detection result SPERR to the motor driving circuit 300 when the speed detection result is out of a tolerance limit, after performing a comparison process between the speed detection result from the speed detection unit 110 and a piece of tolerance limit information TLINF that shows the tolerance limit of speed.SELECTED DRAWING: Figure 3

Description

The present invention relates to an encoder and a motor control system, etc.

Patent Document 1 discloses a robot system including a robot and a robot control device that controls the operation of the robot. The robot includes a power source, a drive unit, and a power cut-off unit provided in a power supply path between the power source and the drive unit. The drive unit includes a motor and an encoder that outputs an encoder value that represents the angular position of the motor's output shaft. When the robot control device determines that the encoder has failed based on the encoder value, it outputs a cut-off signal to the power cut-off unit. When the power cut-off unit receives the cut-off signal, it cuts off the power supply to the drive unit by cutting off the power supply path. This stops the motor.

JP 2022-160206 A

In Patent Document 1, in motor stop control in the event of an encoder failure, a signal is transmitted via the encoder, robot control device, and power cutoff unit. By passing through the robot control device, there is an issue that communication occurs between the encoder and robot control device, and between the robot control device and the power cutoff unit. For example, the robot and robot control device are installed in separate locations and connected by a cable or the like. For this reason, there is a risk of control delays occurring due to communication delays in communication processing via the cable. Alternatively, there is a risk of erroneous judgments occurring due to noise being input into the communication path.

One aspect of the present disclosure relates to an encoder that includes a speed detection unit that detects the speed of a motor driven by a motor drive circuit, and a speed abnormality detection unit that performs a comparison process between the speed detection result from the speed detection unit and tolerance range information that indicates an acceptable range of the speed, and outputs a speed abnormality detection result to the motor drive circuit when the speed detection result is outside the acceptable range.

Another aspect of the present disclosure relates to a motor control system including the above-mentioned encoder, a motor drive circuit that drives the motor, and a controller that controls the motor drive circuit based on the speed detection result from the encoder.

13 is a configuration example of a motor control system when the present embodiment is not used. An example of a robot system configuration to which the motor control system can be applied. 1 shows an example of the configuration of a motor control system according to an embodiment of the present invention. Example of normal motor operation and speed detection signal waveform. Example of motor operation and speed detection signal waveforms during an abnormality. 1 shows a first detailed configuration example of an encoder. An example of an encoder signal waveform during normal operation. Example of encoder signal waveform during abnormal operation. 13 shows a first detailed configuration example of a comparator. An example of a comparator signal waveform during normal operation. Example of comparator signal waveform during abnormal operation. 13 shows a second detailed configuration example of a comparator. 2 shows a second detailed configuration example of an encoder. 13 shows an example of reference period information in the second detailed configuration example. 4 shows an example of a signal waveform of a predicted output generation unit. 3 shows a third detailed configuration example of an encoder. 13 is a flowchart of a process performed by a speed abnormality detection unit. 13 is a flowchart of a process performed by a speed abnormality detection unit. 13 is a flowchart of a process performed by a speed abnormality detection unit. 2 shows a second configuration example of a motor control system.

A preferred embodiment of the present disclosure will be described in detail below. Note that the present embodiment described below does not unduly limit the content described in the claims, and not all of the configurations described in the present embodiment are necessarily essential components.

1. Motor Control System Fig. 1 shows an example of the configuration of a motor control system when this embodiment is not used. In this example, the controller judges an abnormality and stops the motor. The motor control system 5 includes a controller 201 and a drive unit 401. The drive unit 401 includes a motor drive circuit 301, a motor 11, a sensor 21, and an encoder 101.

The sensor 21 detects the rotation of the motor 11. The encoder 101 receives a detection signal from the sensor 21 and outputs a speed detection signal indicating the rotation speed of the motor 11. The controller 201 detects a drive abnormality based on the speed detection signal from the encoder 101. For example, if the motor 11 stops due to a failure of the motor 11 or a collision between the driven object and a surrounding object, the speed detection signal is no longer input to the controller 201, or a speed detection signal indicating stop is input to the controller 201. The controller 201 determines that an abnormality has occurred when the speed detection signal is no longer input or the speed detection signal indicates the stop of the motor despite outputting a drive instruction to the motor drive circuit 301, and stops the drive instruction to the motor drive circuit 301. This causes the rotation of the motor 11 to stop.

Figure 2 shows an example of the configuration of a robot system to which the motor control system can be applied. The robot system 2 includes a robot 500, a controller 200, and a cable 250. Note that the motor control system can be applied not only to robot systems, but also to any system that controls mechanical operations using a motor, such as a printing device.

The robot 500 includes joints 510 that connect the base and the arm or between the arms, and a communication circuit 550 that communicates with the controller 200. Although FIG. 2 shows an example of a one-arm robot, a two-arm robot may be used. The number of joints may be one or more. Each joint 510 is provided with a drive unit 400, and the arm operates when the motor of the drive unit 400 rotates the joint. The encoder of the drive unit 400 outputs a speed detection signal, and the communication circuit 550 transmits the speed detection signal to the controller 200 via the cable 250. The controller 200 generates a motor control signal based on the speed detection signal, and transmits the motor control signal to the motor drive circuit of the drive unit 400 via the cable 250.

When the motor control system 5 in FIG. 1 is applied to the robot system 2 in FIG. 2, the controller 201 and the drive unit 401 in FIG. 1 are respectively applied to the controller 200 and the drive unit 400 in FIG. 2. At this time, the speed detection signal output by the encoder 101 is output by the communication circuit 550 to the controller 201 via the cable 250, and when the controller 201 detects an abnormality based on the speed detection signal, it again transmits a stop signal to the motor drive circuit 301 via the cable 250 and the communication circuit 550. In this way, when the motor is stopped in the event of an abnormality via the controller 201, a delay or erroneous judgment may occur.

For example, if communication via cable 250 and communication circuit 550 is performed by packet communication, time is required for conversion between signals and packets and for receiving one packet to the end, which may cause a delay from the occurrence of an abnormality to the stopping of the motor. Alternatively, whether communication is data or analog signals, signal errors may occur due to noise in the communication path such as cable 250, causing the controller 201 to erroneously determine whether an abnormality is present or not.

Figure 3 shows an example of the configuration of a motor control system in this embodiment. The motor control system 1 includes a controller 200 and a drive unit 400. The drive unit 400 includes a motor drive circuit 300, a motor 10, a sensor 20, and an encoder 100. Although Figure 3 shows an example in which the motor control system 1 includes one drive unit, the motor control system 1 may include multiple drive units, as described below.

The motor 10 is driven by the motor drive circuit 300 to rotate, and the rotation moves the driven object. The movement of the driven object may be various, such as rotation or linear movement. The motor 10 is, for example, a DC motor, an AC motor, or a stepping motor.

The motor drive circuit 300 outputs a drive signal SDRV to the motor 10 based on a control signal MCNT from the controller 200. The motor drive circuit 300 also detects the current that drives the motor 10 using a sense resistor or the like. Based on the current detection result ISEN, the controller 200 controls the motor drive circuit 300 so that the motor 10 generates a given torque or rotation speed, etc. The given torque or rotation speed, etc. is set so that the driven object, such as a robot arm, performs a given operation.

The sensor 20 is a sensor for an encoder, and detects the speed of the motor 10. The sensor 20 may be installed either on the motor 10 itself or on the object driven by the motor 10, but in either case, a detection signal SENQ corresponding to the speed of the motor 10 is obtained. The sensor 20 is an optical or magnetic speed sensor. An optical sensor includes, for example, a light source, a slit plate fixed to the object to be detected, and a light receiving sensor that detects light that has passed through the slit plate from the light source. A magnetic sensor includes, for example, a magnet fixed to the object to be detected, and a Hall sensor that detects the magnetic field received from the magnet. The detection signal SENQ output by the sensor 20 is a periodic signal such as a sine wave, and the period of the detection signal SENQ becomes shorter as the speed of the motor 10 increases.

The encoder 100 receives the detection signal SENQ from the sensor 20 and outputs the speed detection signal ENCQ to the controller 200. The speed detection signal ENCQ is a binary signal of the analog detection signal SENQ from the sensor 20, and is a periodic pulse signal. The faster the speed of the motor 10, the shorter the period of the speed detection signal ENCQ. The encoder 100 is, for example, an integrated circuit device in which multiple circuit elements are integrated on a semiconductor substrate, or a circuit board in which multiple circuit components are mounted on a printed circuit board or the like. The controller 200 outputs a control signal MCNT to the motor drive circuit 300 based on the speed detection signal ENCQ. Specifically, the controller 200 controls the motor 10 so that the desired operation of the driven object is obtained based on the speed indicated by the speed detection signal ENCQ or the position obtained by integrating the speed.

The encoder 100 receives tolerance information TLINF indicating the tolerance range of the speed of the motor 10 from the controller 200, and detects speed abnormalities of the motor 10 by comparing the tolerance information TLINF with the speed detection signal ENCQ. The encoder 100 outputs a speed abnormality detection result SPERR to the motor drive circuit 300. The detection result SPERR may be a signal indicating the presence or absence of an abnormality, or a signal instructing the motor drive circuit 300 to perform abnormality processing. When the motor drive circuit 300 receives a signal indicating the presence of an abnormality or a signal instructing abnormality processing, the motor drive circuit 300 performs abnormality processing. The abnormality processing is processing to stop the rotation of the motor 10, or processing to make the motor 10 rotate at a specified rate. The specified rotation is, for example, rotating the motor 10 by a specified amount in the direction opposite to the rotation direction of the motor 10 before the abnormality occurred.

Figure 4 shows an example of motor operation and the waveform of the speed detection signal under normal conditions. The motor 10 gradually accelerates to increase its speed, maintains a nearly constant speed, and gradually decelerates to decrease its speed. The position is the integral of the speed. The encoder 100 outputs a square wave signal with a pulse width inversely proportional to the speed as the speed detection signal ENCQ. That is, the period of the speed detection signal ENCQ decreases as the motor 10 accelerates, is constant when the speed of the motor 10 is maintained, and increases as the motor 10 decelerates.

Figure 5 shows an example of motor operation and the waveform of the speed detection signal during an abnormality. Here, an example is shown in which the rotation of the motor 10 stops abnormally due to a factor other than an instruction from the controller 200 while the motor 10 is maintaining a constant speed. However, the timing of the abnormal stop may be arbitrary. An abnormal stop is, for example, a stop due to a malfunction of the motor 10 or a collision between the motor-driven object and a surrounding object. When such an abnormal stop occurs, the speed detection signal ENCQ becomes pulseless and is fixed at a low level or a high level.

Even in an abnormal state such as that shown in FIG. 5, the motor is driven as shown in FIG. 4, and a corresponding speed detection signal ENCQ is expected. The tolerance information TLINF sent by the controller 200 to the encoder 100 indicates the tolerance range of the speed detection signal ENCQ that is actually obtained relative to the expected speed detection signal ENCQ. By using such tolerance information TLINF, the encoder 100 can determine that the speed detection signal ENCQ obtained in an abnormal state such as that shown in FIG. 5 is different from the expected speed detection signal ENCQ.

6 shows a first detailed configuration example of the encoder 100. The encoder 100 includes a speed detection unit 110 and a speed anomaly detection unit 120.

The speed detection unit 110 binarizes the detection signal SENQ from the sensor 20 and outputs the result as a speed detection signal ENCQ. The speed detection unit 110 is, for example, a comparator that compares the detection signal SENQ with a reference voltage.

The speed abnormality detection unit 120 detects an abnormality based on the speed detection signal ENCQ and the reference period information PREF from the controller 200, and outputs the result as a comparison signal CPQ. The reference period information PREF corresponds to the allowable range information TLINF in FIG. 3, and the comparison signal CPQ corresponds to the speed abnormality detection result SPERR in FIG. 3. The speed abnormality detection unit 120 includes a prediction information acquisition unit 121, a prediction output generation unit 122, a comparator 123, and a comparison start detection unit 124.

The prediction information acquisition unit 121 acquires reference period information PREF from the controller 200 before the speed abnormality detection unit 120 starts detecting an abnormality. The reference period information PREF is information indicating the allowable range of the period of the speed detection signal ENCQ, and more specifically, is information indicating the lower limit of the period of the speed detection signal ENCQ. This lower limit is referred to as the reference period. The prediction information acquisition unit 121 is a communication circuit that communicates with the controller 200, and is, for example, an interface circuit of the SPI or I2C type.

The comparison start detection unit 124 detects the comparison start timing based on the speed detection signal ENCQ and outputs the result as the comparison enable signal ENB. For example, the comparison start detection unit 124 changes the comparison enable signal ENB from disabled to enabled when the rising edge of the first pulse in the speed detection signal ENCQ is input. Alternatively, the comparison start detection unit 124 may change the comparison enable signal ENB from disabled to enabled when the period of the speed detection signal ENCQ exceeds the reference period for the first time.

The predicted output generating unit 122 generates a reference speed detection signal SREF whose pulse period is a reference period based on the reference period information PREF. The predicted output generating unit 122 starts generating the reference speed detection signal SREF when the comparison enable signal ENB changes from disabled to enabled. The predicted output generating unit 122 includes, for example, a counter and a decoder that generates the reference speed detection signal SREF based on the count value and the reference period information PREF.

The comparator 123 compares the speed detection signal ENCQ with the reference speed detection signal SREF, and outputs the result as a comparison signal CPQ. The comparison start detection unit 124, the predicted output generation unit 122, and the comparator 123 are configured, for example, with a logic circuit. In the first detailed configuration example, the tolerance range information corresponds to the lower limit of the speed at which the motor can be considered to be moving at a minimum. If the motor is rotating faster than the lower limit of the speed, the comparator 123 determines that the motor is operating normally.

Figure 7 shows an example of the signal waveform of the encoder during normal operation. At comparison start timing Tsta when a pulse of the speed detection signal ENCQ occurs, output of the reference speed detection signal SREF begins. The period of the reference speed detection signal SREF is constant at the reference period P. The period of the speed detection signal ENCQ changes depending on the speed, but is equal to or shorter than the reference period P after comparison start timing Tsta. In this case, the comparator 123 maintains the comparison signal CPQ at a low level.

Figure 8 shows an example of the signal waveform of the encoder during abnormal operation. After the comparison start timing Tsta, the period of the speed detection signal ENCQ is less than the reference period P, but if the motor stops abnormally, pulses of the speed detection signal ENCQ are no longer generated. At this time, the period of the speed detection signal ENCQ can be considered to be longer than the reference period P. When the period of the speed detection signal ENCQ becomes longer than the reference period P, the comparator 123 changes the comparison signal CPQ from low level to high level. When the comparison signal CPQ changes from low level to high level, the motor drive circuit 300 performs abnormality processing.

Figure 9 shows a first detailed configuration example of the comparator. The comparator 123 includes latch circuits FF1 to FF4, AND circuits AN1 to AN3, buffer circuits BF1 and BF2, and an inverter circuit IN1. Figure 10 shows an example of a signal waveform of the comparator in normal operation. In normal operation, the period of the speed detection signal ENCQ is shorter than the period of the reference speed detection signal SREF.

The latch circuit FF1 latches the high level at the rising edge of the reference speed detection signal SREF and changes the output signal FF1Q from low level to high level. The latch circuit FF1 resets the output signal FF1Q to low level when the reset signal RESET output by the AND circuit AN3 becomes high level.

The latch circuit FF2 latches the high level at the rising edge of the speed detection signal ENCQ and changes the output signal FF2Q from low level to high level. The latch circuit FF2 resets the output signal FF2Q to low level when the reset signal RESET becomes high level.

The AND circuit AN3 outputs the logical product of the output signal FF1Q of the latch circuit FF1 and the output signal FF2Q of the latch circuit FF2 as the reset signal RESET.

The buffer circuit BF1 delays the output signal FF1Q of the latch circuit FF1 and outputs a delayed signal FF1QD. The AND circuit AN1 outputs the logical product of the output signal FF1Q of the latch circuit FF1 and the delayed signal FF1QD as the output signal AN1Q. Since the output signal FF1Q of the latch circuit FF1 has a pulse width that is approximately the delay time of the AND circuit AN3, the output signal AN1Q of the AND circuit AN1 is maintained at a low level.

The buffer circuit BF2 delays the output signal FF2Q of the latch circuit FF2 and outputs the delayed signal FF2QD. The AND circuit AN2 outputs the logical product of the output signal FF2Q of the latch circuit FF2 and the delayed signal FF2QD as the output signal AN2Q. The reset timing of the latch circuits FF1 and FF2 is the rising timing of the output signal FF1Q, which has a long period. Therefore, the time from when the output signal FF2Q rises until when the output signal FF1Q rises becomes the pulse width of the output signal FF2Q. This pulse width may be longer than the delay time of the buffer circuit BF2. Therefore, there is a period during which the output signal AN2Q of the AND circuit AN2 is at a high level.

The latch circuit FF3 resets the comparison signal CPQ to low level when the comparison enable signal ENB changes from low level to high level. The latch circuit FF3 changes the comparison signal CPQ from low level to high level when the output signal AN1Q of the AND circuit AN1 changes from low level to high level. In normal operation, the output signal AN1Q is maintained at low level, so the comparison signal CPQ is maintained at low level.

The latch circuit FF4 resets the second comparison signal CPQ_OK to low level when the comparison enable signal ENB changes from low level to high level. The second comparison signal CPQ_OK is a signal indicating that the motor is operating normally. The latch circuit FF4 changes the second comparison signal CPQ_OK from low level to high level when the output signal AN2Q of the AND circuit AN2 changes from low level to high level. In normal operation, the second comparison signal CPQ_OK changes from low level to high level when the output signal AN1Q first changes from low level to high level.

Figure 11 is an example of the signal waveform of the comparator during abnormal operation. During abnormal operation, the period of the speed detection signal ENCQ is longer than the period of the reference speed detection signal SREF. This results in a waveform with reversed logic compared to the normal operation of Figure 10. That is, during abnormal operation, when the output signal AN1Q first goes from low to high, the comparison signal CPQ goes from low to high. Also, since the output signal AN2Q is maintained at a low level, the second comparison signal CPQ_OK is maintained at a low level.

Figure 12 shows a second detailed configuration example of the comparator. The comparator 126 in this example is provided in place of the predicted output generating unit 122 and the comparator 123 in Figure 6. The comparator 126 includes a predicted period generating unit 131, a period converting unit 132, and a frequency comparing unit 133.

The period conversion unit 132 converts the speed detection signal ENCQ into period information PENQ that indicates the pulse period of the speed detection signal ENCQ. The period conversion unit 132 includes, for example, a counter. The counter starts counting at the rising edge of the speed detection signal ENCQ. The period conversion unit 132 outputs the count value at the next rising edge of the speed detection signal ENCQ as the period information PENQ.

The predicted period generation unit 131 converts the reference period information PREF into reference period information PREFb corresponding to the period information PENQ. For example, if the period conversion unit 132 is configured to include the counter described above, the reference period information PREFb is a count value corresponding to the reference period indicated by the reference period information PREF.

The frequency comparison unit 133 compares the period information PENQ with the reference period information PREFb and outputs the result as a comparison signal CPQ. If the period information PENQ is shorter than the reference period information PREFb, the frequency comparison unit 133 outputs a low-level comparison signal CPQ, and if the period information PENQ is longer than the reference period information PREFb, the frequency comparison unit 133 outputs a high-level comparison signal CPQ.

In this embodiment, the encoder 100 includes a speed detection unit 110 and a speed abnormality detection unit 120. The speed detection unit 110 detects the speed of the motor 10 driven by the motor drive circuit 300. The speed abnormality detection unit 120 performs a comparison process between the speed detection result from the speed detection unit 110 and tolerance range information TLINF indicating the tolerance range of the speed, and outputs a speed abnormality detection result SPERR to the motor drive circuit 300 when the speed detection result is outside the tolerance range.

According to this embodiment, when an abnormality is detected, the encoder 100 can output the speed abnormality detection result SPERR directly to the motor drive circuit 300 without using communication between the encoder 100 and the controller 200, and communication between the controller 200 and the motor drive circuit 300. As a result, for example, communication delays in communication processing are unlikely to occur, and therefore control delays are unlikely to occur when an abnormality is detected. Alternatively, because the communication path is shorter, noise is unlikely to be input into the communication path, making it less likely that erroneous judgments will occur.

In this embodiment, the speed detection unit 110 detects the speed and outputs a speed detection signal ENCQ. The speed abnormality detection unit 120 receives the allowable range information TLINF, generates a reference speed detection signal SREF corresponding to the allowable range of the speed based on the allowable range information TLINF, and compares the speed detection signal ENCQ with the reference speed detection signal SREF.

The speed detection signal ENCQ is a signal whose waveform changes depending on the speed of the motor 10. According to this embodiment, the speed abnormality detection unit 120 generates a reference speed detection signal SREF having a waveform corresponding to the allowable range of speed, and by comparing the reference speed detection signal SREF with the speed detection signal ENCQ, it is possible to determine whether the speed detection result is within the allowable range.

In this embodiment, the speed detection signal ENCQ is a signal having a period that corresponds to the speed. The acceptable range information TLINF is reference period information PREF that indicates the acceptable range of the period of the speed detection signal ENCQ.

According to this embodiment, the speed abnormality detection unit 120 can use the reference period information PREF to generate a reference speed detection signal SREF having a period according to the tolerable range of the speed. Then, the speed abnormality detection unit 120 can determine whether the speed detection result is within the tolerable range by comparing the speed detection signal ENCQ, which is a periodic signal, with the reference speed detection signal SREF.

In this embodiment, the speed detection unit 110 detects the speed and outputs the speed detection signal ENCQ. The speed abnormality detection unit 120 may receive reference period information PREF indicating the acceptable range of the period of the speed detection signal ENCQ as acceptable range information TLINF, obtain period information PENQ indicating the period of the speed detection signal ENCQ, and compare the period information PENQ with the reference period information PREF.

According to this embodiment, the speed abnormality detection unit 120 can obtain period information PENQ from the speed detection signal ENCQ, which has a period corresponding to the speed. Then, the speed abnormality detection unit 120 can determine whether the speed detection result is within an acceptable range by comparing the period information PENQ with the reference period information PREF.

In this embodiment, the speed detection unit 110 detects the speed and outputs a speed detection signal ENCQ. The speed abnormality detection unit 120 performs a comparison process after the speed detection signal ENCQ is input from the speed detection unit 110.

According to this embodiment, when the controller 200 is not rotating the motor 10, that is, when the motor 10 is stopped during normal operation, the speed abnormality detection unit 120 does not detect a speed abnormality of the motor 10. Then, after the controller 200 starts to rotate the motor 10, the speed abnormality detection unit 120 can detect a speed abnormality of the motor 10. As a result, the speed abnormality detection unit 120 can detect only a state in which the motor 10 has abnormally stopped despite the controller 200 rotating the motor 10, as a speed abnormality.

In addition, in this embodiment, the speed abnormality detection unit 120 receives tolerance range information TLINF from the controller 200 that controls the motor drive circuit 300.

The controller 200 controls the rotation of the motor 10 by controlling the motor drive circuit 300, and is therefore able to know the speed of the motor 10. According to this embodiment, the controller 200 can output the tolerance range information TLINF to the encoder 100, and the encoder 100 can detect speed abnormalities of the motor 10 using the tolerance range information TLINF.

In this embodiment, the motor control system 1 also includes a motor drive circuit 300 that drives the motor 10, and a controller 200 that controls the motor drive circuit 300 based on the speed detection result from the encoder 100.

In this embodiment, the controller 200 outputs the tolerance information TLINF to the encoder 100. The encoder 100 outputs the speed abnormality detection result based on the tolerance information TLINF to the motor drive circuit 300. The motor drive circuit 300 performs abnormality processing when the speed abnormality detection result is input from the encoder 100.

According to this embodiment, when an abnormality is detected, the encoder 100 can output the speed abnormality detection result SPERR directly to the motor drive circuit 300 without going through the controller 200.

3. Second detailed configuration example of the encoder Fig. 13 shows a second detailed configuration example of the encoder. The following mainly describes the parts that are different from the first detailed configuration example, and the description of the parts that are the same as the first detailed configuration example is omitted. The speed abnormality detection unit 120 includes a prediction information acquisition unit 121, a prediction output generation unit 122, a comparator, a comparison start detection unit 124, and a timer 125.

The controller 200 transmits the reference period information PREF, in which a reference period is defined for each of a plurality of periods, to the encoder 100. The prediction information acquisition unit 121 receives the reference period information PREF. FIG. 14 shows an example of the reference period information in the second detailed configuration example. In this example, the reference period information PREF is table data, and the reference periods P0 to P7 are associated with the periods T0 to T7, respectively. The length of each of the periods T0 to T7 may be any length. The reference periods P0 to P7 may all be different values from each other, or some of the reference periods P0 to P7 may be the same value. For example, in the operation of a robot, an arm accelerates from a stopped state, rotates at a constant speed, decelerates, and stops again, which is considered to be one operation. A series of such operations is formed by combining a plurality of such operations, and one arm operation in the series of robot operations corresponds to one of the periods T0 to T7. In other words, in the above example, a series of robot operations is constituted by eight operations. At this time, the length of each period and the reference cycle are determined based on the operating time and motor rotation speed of each operation.

The timer 125 measures time starting from the comparison start timing Tsta based on the comparison enable signal ENB, and outputs time information TM.

The predicted output generating unit 122 generates a reference speed detection signal SREF based on the reference period information PREF and the time information TM. FIG. 15 shows an example of a signal waveform of the predicted output generating unit. Let i be an integer equal to or greater than 0. When the time information TM belongs to period Ti, the predicted output generating unit 122 outputs a reference speed detection signal SREF whose pulse period is a reference period Pi. The reference period Pi is, for example, the lower limit of the speed at which the motor is considered to be moving minimally in period Ti. Alternatively, if there is a period during which the motor rotates at a constant speed in period Ti, the reference period Pi may be a period corresponding to a speed slightly slower than that constant speed.

The comparator 123 has the same configuration as in FIG. 9. Alternatively, the prediction output generator 122 and the comparator 123 may be replaced with the comparator 126 in FIG. 12.

In this embodiment, the speed abnormality detection unit 120 receives tolerance information TLINF, in which an acceptable range is associated with each of a plurality of periods. The speed abnormality detection unit 120 compares the speed detection result with the acceptable range associated with each period for each period.

According to this embodiment, when multiple motor operations are combined to form a series of motor operations, an acceptable range of speed is set for the period corresponding to each motor operation. This makes it possible to detect motor speed abnormalities using an appropriate acceptable range for each motor operation.

4. Third detailed configuration example of the encoder FIG. 16 shows a third detailed configuration example of the encoder. The following mainly describes the parts that differ from the first or second detailed configuration example, and omits a description of the parts that are similar to the first or second detailed configuration example. The encoder 100 includes a speed detection unit 110, a speed abnormality detection unit 120, and a memory 150. The prediction information acquisition unit 121 of the speed abnormality detection unit 120 includes a time information acquisition unit 141 and a period information storage unit 142.

The time information acquisition unit 141 acquires the initial value TREF of each period in the reference period information PREF from the controller 200, and stores the information in the memory 150. For example, the time information acquisition unit 141 acquires the initial values of periods T0 to T7 in the table of FIG. 14. Furthermore, the time information acquisition unit 141 may acquire the initial values of the reference period for each period from the controller 200, and store the information in the memory 150. For example, the time information acquisition unit 141 may acquire the initial values of the reference periods P0 to P7 in the table of FIG. 14.

The period information storage unit 142 stores period information based on the speed detection signal ENCQ and time information TM from the timer 125, and updates the reference period information PREF in the memory 150 based on the period information. In the next motor control, the updated reference period information PREF is used for abnormality detection. Taking the table in FIG. 14 as an example, the reference period information is updated, for example, as follows. In period T0, the motor accelerates from a stopped state to a constant speed, and then decelerates and stops. At this time, the period information storage unit 142 measures the length of the period from the generation to the disappearance of the pulse of the speed detection signal ENCQ, and updates the period T0 to the measured length. In addition, the period information storage unit 142 measures the pulse period of the speed detection signal ENCQ in the constant speed state, and updates the reference period P0 to a period slightly shorter than the measured pulse period. The period information storage unit 142 updates the reference periods P1 to P7 in the same manner in periods T1 to T7.

The predicted output generating unit 122 generates a reference speed detection signal SREF using the reference period information PREF updated in the previous motor control. The comparator 123 has the same configuration as in FIG. 9. Alternatively, the predicted output generating unit 122 and the comparator 123 may be replaced with the comparator 126 in FIG. 12.

Figures 17 to 19 are flowcharts of the processing performed by the speed abnormality detection unit. Below, we will explain using the table in Figure 14 as an example, as necessary.

The main flow is shown in FIG. 17. In step S1, the speed abnormality detection unit 120 acquires information during normal control. That is, by executing step S1 when normal operation is determined in step S3 in the previous motor control, the reference period information PREF to be used in the current motor control is acquired.

Figure 18 shows a sub-flow of step S1. In step S11, the speed abnormality detection unit 120 sets time information. That is, the speed abnormality detection unit 120 determines which of the periods T0 to T7 the abnormality corresponds to based on the time information TM from the timer 125. In step S12, the speed abnormality detection unit 120 updates the reference period for the corresponding period. The speed abnormality detection unit 120 executes steps S11 and S12 for each period T0 to T7.

In step S2 of FIG. 17, the speed abnormality detection unit 120 determines which of the periods T0 to T7 the time corresponds to based on the time information TM from the timer 125. In step S3, the speed abnormality detection unit 120 performs normal control and abnormality detection using the reference period for the corresponding period.

Figure 19 shows a sub-flow of step S3. In step S31, the speed abnormality detection unit 120 performs a comparison process using the speed detection signal ENCQ and the reference period updated in step S1. In step S32, if the speed abnormality detection unit 120 detects an abnormality in the comparison process, the process proceeds to step S33, and if the comparison process determines that the speed abnormality detection unit 120 is normal, the process proceeds to step S34. In step S33, the speed abnormality detection unit 120 performs a process to stop the motor. In step S34, the speed abnormality detection unit 120 determines whether the operation has ended. That is, the speed abnormality detection unit 120 determines whether all of the periods T0 to T7 have ended based on the time information TM from the timer 125. If the operation has not ended, the speed abnormality detection unit 120 returns to step S31, and if the operation has ended, the process ends.

In this embodiment, the encoder 100 includes a memory 150 that stores the tolerance information. The speed abnormality detection unit 120 updates the tolerance information based on the speed detection result from the speed detection unit 110. Specifically, the speed abnormality detection unit 120 updates the tolerance range associated with each period based on the speed detection result from the speed detection unit 110.

As the motor 10 ages, the rotation speed of the motor 10 decreases over time, even if the same driving power is applied to the motor 10. Furthermore, the length of each period increases as the rotation speed of the motor 10 decreases. According to this embodiment, the allowable range information is updated in response to the decrease in the motor rotation speed and the extension of each period, and motor speed abnormalities can be detected based on the new allowable range information that takes the ageing into account.

In the third detailed configuration example, an example has been described in which an acceptable range is associated with each of the multiple periods, and the speed abnormality detection unit 120 updates the acceptable range for each period. However, as in the first detailed configuration example, only one acceptable range may be defined, and the speed abnormality detection unit 120 may update that one acceptable range.

20 shows a second configuration example of the motor control system. In this example, the motor control system 1 includes a controller 200, a drive unit 400, and a second drive unit 400b. The motor drive circuit 300 may include three or more drive units.

The driving unit 400 is similar to the first configuration example in FIG. 3, but in this example, the encoder 100 outputs the speed abnormality detection result SPERR to the motor driving circuit 300 and the controller 200.

The second driving unit 400b includes a second motor driving circuit 300b, a second motor 10b, a second sensor 20b, and a second encoder 100b. The configuration and operation of these are similar to those of the driving unit 400. That is, the second motor driving circuit 300b outputs a driving signal SDRVb to the second motor 10b based on a control signal MCNTb from the controller 200. The controller 200 controls the second motor driving circuit 300b based on the current detection result ISENb from the second motor driving circuit 300b. The second encoder 100b receives a detection signal SENQb from the second sensor 20b and outputs a speed detection signal ENCQb to the controller 200. The controller 200 outputs a control signal MCNTb to the second motor driving circuit 300b based on the speed detection signal ENCQb. The second encoder 100b receives the tolerance range information TLINFb from the controller 200, and detects a speed abnormality of the second motor 10b by comparing the tolerance range information TLINFb with the speed detection signal ENCQb, and outputs the speed abnormality detection result SPERRb to the second motor drive circuit 300b and the controller 200.

In this example, when an abnormality is detected in one drive unit, the encoder in that drive unit notifies the motor drive circuit directly of the abnormality, but the other drive units are notified of the abnormality via the controller 200.

That is, suppose that the encoder 100 of the drive unit 400 detects a speed abnormality. At this time, the encoder 100 notifies the motor drive circuit 300 of the abnormality to cause it to carry out abnormality processing, and also notifies the controller 200 of the abnormality. Upon receiving this notification, the controller 200 transmits a control signal MCNTb to the second motor drive circuit 300b of the second drive unit 400b, instructing it to carry out abnormality processing, and causes the second motor drive circuit 300b to carry out abnormality processing.

Conversely, suppose that the second encoder 100b of the second drive unit 400b detects a speed abnormality. At this time, the second encoder 100b notifies the second motor drive circuit 300b of the abnormality to cause it to carry out abnormality processing, and also notifies the controller 200 of the abnormality. Upon receiving this notification, the controller 200 transmits a control signal MCNT to the motor drive circuit 300 of the drive unit 400, instructing it to carry out abnormality processing, and causes the motor drive circuit 300 to carry out abnormality processing.

In this embodiment, the motor control system 1 includes a motor drive circuit 300 that drives the motor 10, and a controller 200 that controls the motor drive circuit 300 based on the speed detection result from the encoder 100. The motor control system 1 also includes a second motor drive circuit 300b that drives the second motor 10b, and a second encoder 100b that detects the speed of the second motor 10b. When the speed abnormality detection result is input from the encoder 100, the controller 200 causes the second motor drive circuit 300b to perform abnormality processing.

According to this embodiment, the speed abnormality detection result is input directly from the encoder 100 to the motor drive circuit 300 of the motor 10 that is the detection target of the encoder 100. Then, the speed abnormality detection result is input from the encoder 100 via the controller 200 to the second motor drive circuit 300b of the second motor 10b that is different from the motor 10. This makes it possible to stop the second motor 10b that is different when a speed abnormality is detected in the motor 10.

Although the present embodiment has been described in detail above, it will be readily apparent to those skilled in the art that many modifications are possible that do not substantially deviate from the novel matters and effects of the present disclosure. Therefore, all such modifications are intended to be included in the scope of the present disclosure. For example, a term described at least once in the specification or drawings together with a different term having a broader or similar meaning may be replaced with that different term anywhere in the specification or drawings. All combinations of the present embodiment and modifications are also included in the scope of the present disclosure. Furthermore, the configurations and operations of the motor, motor drive circuit, sensor, encoder, drive unit, controller, motor control system, and robot system are not limited to those described in the present embodiment, and various modifications are possible.

1...motor control system, 2...robot system, 10...motor, 10b...second motor, 20...sensor, 20b...second sensor, 100...encoder, 100b...second encoder, 110...speed detection unit, 120...speed abnormality detection unit, 121...prediction information acquisition unit, 122...prediction output generation unit, 123...comparator, 124...comparison start detection unit, 125...timer, 126...comparator, 131...prediction period generation unit, 132...period conversion unit, 133...frequency comparison unit, 141...time information acquisition unit, 142...period Information storage unit, 150...memory, 200...controller, 250...cable, 300...motor drive circuit, 300b...second motor drive circuit, 400...drive unit, 400b...second drive unit, 500...robot, 510...joint, 550...communication circuit, ENCQ...speed detection signal, P, P0 to P7...reference period, PENQ...period information, PREF...reference period information, SPERR...speed abnormality detection result, SREF...reference speed detection signal, T0 to T7...period, TLINF...tolerance range information, Tsta...comparison start timing

Claims (12)

a speed detection unit that detects the speed of a motor driven by a motor drive circuit;
a speed abnormality detection unit that performs a comparison process between a speed detection result from the speed detection unit and tolerance range information indicating a tolerance range of the speed, and outputs a speed abnormality detection result to the motor drive circuit when the speed detection result is outside the tolerance range;
An encoder comprising: 2. The encoder according to claim 1,
The speed detection unit
Detecting the speed and outputting a speed detection signal;
The speed abnormality detection unit
An encoder comprising: an encoder receiving the tolerance range information; generating a reference speed detection signal corresponding to the tolerance range of the speed based on the tolerance range information; and comparing the speed detection signal with the reference speed detection signal. 3. The encoder according to claim 2,
the speed detection signal is a signal having a period corresponding to the speed,
The tolerance information is
The encoder further comprises reference period information indicating an allowable range of the period of the speed detection signal. 2. The encoder according to claim 1,
The speed detection unit
Detecting the speed and outputting a speed detection signal;
The speed abnormality detection unit
an encoder characterized in that reference period information indicating an acceptable range of the period of the speed detection signal is input as the acceptable range information, period information indicating the period of the speed detection signal is obtained, and the period information is compared with the reference period information. 2. The encoder according to claim 1,
The speed abnormality detection unit
An encoder characterized in that the tolerance information, in which an tolerance range is associated with each of a plurality of periods, is input, and the speed detection result is compared with the tolerance range associated with each of the periods during each of the periods. 6. The encoder according to claim 5,
a memory for storing the tolerance information;
The speed abnormality detection unit
an encoder which updates the allowable range associated with each of the periods based on the speed detection result from the speed detection unit; 2. The encoder according to claim 1,
a memory for storing the tolerance information;
The speed abnormality detection unit
The encoder further comprises updating the allowable range information based on the speed detection result from the speed detection unit. 2. The encoder according to claim 1,
The speed detection unit
Detecting the speed and outputting a speed detection signal;
The speed abnormality detection unit
The encoder is characterized in that the comparison process is performed after the speed detection signal is input from the speed detection unit. 2. The encoder according to claim 1,
The speed abnormality detection unit
The encoder is characterized in that the tolerance information is input from a controller that controls the motor drive circuit. An encoder according to any one of claims 1 to 9;
the motor drive circuit that drives the motor;
a controller that controls the motor drive circuit based on the speed detection result from the encoder;
A motor control system comprising: 11. The motor control system of claim 10,
The controller,
Outputting the tolerance information to the encoder;
The encoder comprises:
outputting a detection result of the speed abnormality to the motor drive circuit based on the allowable range information;
The motor drive circuit includes:
A motor control system characterized in that abnormality processing is performed when the speed abnormality detection result is input from the encoder. 11. The motor control system of claim 10,
a second motor drive circuit that drives the second motor;
a second encoder for detecting a speed of the second motor;
Including,
The controller,
a second motor drive circuit that performs abnormality processing when the speed abnormality detection result is input from the encoder.

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