JP2023182882A - Pseudo-synchronization device and broadcasting system - Google Patents

Abstract

To provide a pseudo-synchronization device and a broadcasting system that can reduce generation of video noise and audio noise during system switching and also prevent error occurrence to transmission facilities.SOLUTION: A pseudo-synchronization device 10 is configured to perform frequency synchronization of a TS of a super-frame structure with a clock signal in the device, and includes an internal phase generation part 11 which generates an internal phase based upon a phase signal that a TS synthesizing device which performs TS synthesis of the TS uses, and a TS restructuring part 12 which restructures an input TS into a TS synchronized with the internal phase.SELECTED DRAWING: Figure 6

Description

The present invention relates to a pseudo synchronization device and a broadcast system that synchronize TS signals.

In satellite broadcasting, the ISDB (Integrated Services Digital Broadcasting)-S system is used. A transport stream (TS) signal for satellite broadcasting transmitted from a signal processing device (hereinafter referred to as a transmitting side signal processing device) of a broadcaster (hereinafter referred to as a commissioned station) is transmitted to an uplink station (hereinafter referred to as a commissioned station). (hereinafter referred to as the "trusted station"). At the entrusted station, a TS synthesizer combines TS signals from a plurality of entrusted stations. The combined TS signal is transmitted from the transmission equipment to the broadcasting satellite. Hereinafter, the TS signal will be expressed as TS.

The clock signal at the commissioning station and the clock signal at the commissioning station must be synchronized in frequency. When the synchronization between the commissioning station and the commissioning station is broken, overflow or underflow occurs in the input buffer of the TS synthesizer. If overflow or underflow occurs, the video may freeze or the audio may be muted. Below, video freezing is referred to as video noise. Additionally, audio muting is called audio noise.

Therefore, in the entrusted station, a synchronization process is performed to synchronize the frequency of the TS from the entrusted station to the clock signal of the TS synthesizer. As synchronization processing methods, there are a complete synchronization method, a pseudo-synchronization method, and an asynchronous method (see, for example, Patent Document 1).

The transmitting side signal processing device generates a TS having a superframe (hereinafter referred to as SF) structure synchronized with a clock signal at the entrusting station, and transmits the generated TS to the entrusting station. Non-Patent Document 1 has regulations regarding SF. When a pseudo synchronization method is used at the trusted station, a TS pseudo synchronization device is installed. The TS pseudo-synchronization device regenerates (reconstructs) the TS transmitted by the transmitting side signal processing device into a TS synchronized with the clock signal at the trust station, and outputs the TS to the TS synthesis device. The SF phase is generated at the receiving station. The SF phase is the phase used for the signal output operation of the device. Hereinafter, the SF phase generated by each TS pseudo synchronization device etc. will be referred to as an internal SF phase.

Japanese Patent Application Publication No. 2002-57636

"Transmission method of satellite digital broadcasting", ARIB (Association of Radio Industries and Businesses) standard STD-B20 3.0 version, May 31, 2001, Radio Industries Association

The commissioned station has two systems, an active system (N system) and a standby system (E system), for stable operation. Therefore, the entrusted station has an N-system TS pseudo-synchronization device and an E-system TS pseudo-synchronization device. For example, when a failure occurs in the N system, the N system and the E system are switched, and the E system becomes the active system.

When each device is activated at the trusted station, the N-system TS pseudo synchronization device generates an internal SF phase synchronized with the clock signal at the trusted station, starting from the SF phase of the input TS (input TS). do. Similarly, when the E system is activated, the TS pseudo synchronization device of the E system generates an internal SF phase synchronized with the clock signal at the trust station using the SF phase of the input TS as a starting point.

In the pseudo-synchronization method, the clock signal at the commissioning station and the clock signal at the commissioning station are not synchronized. As a result, as time passes, a phase shift occurs between the TS input to the N system and the internal SF phase in the N system. Similarly, as time passes, a phase shift occurs between the TS input into the E system and the internal SF phase in the E system.

Additionally, in general, if the device startup timing of the N system pseudo synchronization device and the device startup timing of the E system pseudo synchronization device are different, the input timing of the TS used as the starting point is also different, so the internal SF in the E system A phase difference occurs between the phase and the internal SF phase in the N system. After switching between the N system and the E system, TSs are input from the E system to the TS synthesizer, but due to the phase difference, packets for 1 SF are overlapped or dropped immediately after the switch.

FIG. 8 is a timing diagram showing an example of signal input/output, etc. of a general TS pseudo synchronization device. In FIG. 8, each rectangle represents a TS with an SF structure. The numbers in the notation inside the rectangle are numbers for distinguishing each TS. “n” indicates an N-type input TS. "N" indicates an output TS of the N system. "e" indicates that it is an E-system input TS. "E" indicates the output TS of the E system.

Although FIG. 8 basically shows that the output TS is output with a time delay of 1 SF from the input TS, in reality, the TS is output with a time delay of more than 1 SF. Sometimes it is done.

For example, when a failure occurs in the N system, the active system is switched from the N system to the E system. Specifically, the TS synthesizer that inputs TS from the TS pseudo synchronization device changes from using the TS from the N system TS pseudo synchronization device to using the TS from the E system TS pseudo synchronization device. change to the state of

The E-system TS pseudo synchronization device generates an internal SF phase synchronized with the clock signal at the trust station, using the SF phase of the input TS as a starting point. Therefore, as shown in FIG. 8, a phase shift (phase difference) occurs between the internal SF phase of the E system and the internal SF phase of the N system.

Then, the continuity between the TS from the N-system TS pseudo synchronization device and the TS from the E-system TS pseudo synchronization device is lost. As a result, packets for one SF are duplicated or dropped immediately after switching. When packets are duplicated or dropped, video and audio noise may occur. Further, it is possible to change the modulation method and the like on a SF-by-SF basis. If the timing of changing the modulation method or the like at the entrusted station overlaps with the timing of switching between the N system and the E system, an error may occur in the transmitting equipment and signal output from the transmitting equipment may stop.

SUMMARY OF THE INVENTION An object of the present invention is to provide a pseudo synchronization device and a broadcasting system that can reduce the occurrence of video noise and audio noise during system switching, and can prevent the occurrence of errors in transmission equipment.

A pseudo synchronization device according to the present invention is a pseudo synchronization device that frequency-synchronizes a TS having an SF structure with a clock signal in a commissioned station, and calculates an internal phase based on a phase signal used by a TS synthesizer that synthesizes TSs. It includes an internal phase generating section that generates an internal phase, and a TS reconstructing section that reconstructs an input TS into a TS synchronized with the internal phase.

A broadcasting system according to the present invention includes a clock signal generation device that generates a clock signal, a TS synthesis device that synthesizes TSs having an SF structure, a phase signal generation section that generates a phase signal used by the TS synthesis device, and a TS synthesis device that synthesizes TSs. a pseudo synchronization device that performs frequency synchronization with a clock signal; and a TS reconstruction unit that reconstructs the TS into a TS synchronized with the internal phase.

According to the present invention, it is possible to reduce the occurrence of video noise and audio noise during system switching, and to prevent the occurrence of errors in transmission equipment.

1 is a system configuration diagram showing a system including a trust station and a trust station having a TS pseudo synchronization device according to a first embodiment; FIG. FIG. 2 is a block diagram showing a configuration example of a TS pseudo synchronization device according to the first embodiment. FIG. 3 is a timing diagram showing an example of signal input/output, etc. of the TS pseudo synchronization device. FIG. 7 is a system configuration diagram showing a system including a trust station and a trust station having a TS pseudo synchronization device according to a second embodiment. FIG. 2 is a block diagram illustrating a configuration example of a TS pseudo synchronization device according to a second embodiment. FIG. 2 is a block diagram showing the main parts of a pseudo synchronization device. FIG. 1 is a block diagram showing the main parts of a broadcasting system. FIG. 2 is a timing diagram showing an example of signal input/output, etc. of a general TS pseudo synchronization device.

Embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1.
FIG. 1 is a system configuration diagram showing a system including a trust station and a trust station having a pseudo synchronization device (TS pseudo synchronization device) according to the first embodiment. FIG. 1 shows a trust station 100, trust stations 200, 210, and transmission equipment 300. Transmission equipment 300 transmits the TS received from commissioned station 100 to a broadcasting satellite.

The entrusted station 100 includes an N-system TS pseudo-synchronizer 101, an E-system TS pseudo-synchronizer 102, a clock signal generator 110, a superframe phase signal generator 120, and a TS synthesizer 130. It is provided.

Clock signal generator 110 generates a clock signal and supplies the clock signal to superframe phase signal generator 120, TS synthesizer 130, and TS pseudo synchronizers 101 and 102.

The TS pseudo synchronization devices 101 and 102 reconstruct the TS transmitted by the entrusting station 200 into a TS synchronized with the clock signal in the entrusted station, and output the reconstructed TS to the TS synthesis device.

Superframe phase signal generator 120 generates an SF phase signal based on the clock signal. The SF phase signal is supplied to a TS synthesizer 130 and TS pseudo synchronizers 101 and 102. The TS synthesis device 130 selects either an N-system or an E-system TS. Then, the TS combining device 130 combines input TSs from a plurality of commissioning stations. TS combining device 130 transmits the combined TS to transmission equipment 300.

The entrusting station 200 is provided with a clock signal generating device 203, an N-system transmitting side signal processing device 201, and an E-system transmitting side signal processing device 202. The clock signal generation device 203 generates a clock signal and supplies the clock signal to the N-system transmission-side signal processing device 201 and the E-system transmission-side signal processing device 202. The N-system transmitting side signal processing device 201 and the E-system transmitting side signal processing device 202 generate a TS synchronized with the supplied clock signal and transmit the TS to the trust station 100.

The entrusting station 210 is configured similarly to the entrusting station 200. Note that although two entrusting stations 200 and 210 are shown in FIG. 4, three or more entrusting stations may exist. When there are two or more entrusting stations, the entrusting station 100 includes an N-system TS pseudo synchronization device and an E-system TS pseudo synchronization device corresponding to each entrusting station.

FIG. 2 is a block diagram showing a configuration example of the TS pseudo synchronization device 101. The TS pseudo synchronization device 101 includes a demultiplexing section (DEMUX section) 111, an internal SF phase generation section 112, and a remultiplexing section (REMUX section) 113. The demultiplexer 111 separates the TS input from the commissioning station 200 into TS packets.

The TS pseudo synchronization device 102 is configured similarly to the TS pseudo synchronization device 101. That is, the TS pseudo synchronization device 102 also includes a demultiplexer 111, an internal SF phase generator 112, and a remultiplexer 113.

Remultiplexer 113 synchronizes the TS packet output from demultiplexer 111 with the internal SF phase output from internal SF phase generator 112 . Note that the TS pseudo synchronization device 101 is provided with a buffer. For example, the demultiplexer 111 is provided with a buffer, and the TS input to the TS pseudo synchronization device 101 is output from the TS pseudo synchronization device 101 with a delay of 1 SF or more.

An SF phase signal is input to the internal SF phase generation unit 112 from the superframe phase signal generation device 120. Further, a clock signal is inputted to the internal SF phase generation section 112 from the clock signal generation device 110. The internal SF phase generation unit 112 generates an internal SF phase based on the SF phase signal using a clock signal synchronized with the SF phase signal.

Specifically, for example, when each device is activated in the entrusted station 100, the internal SF phase generation unit 112 generates a clock signal (i.e., An internal SF phase synchronized with the clock signal from the clock signal generator 110 is generated. As an example, the internal SF phase generation section 112 is realized by a counter circuit.

FIG. 3 is a timing diagram showing an example of signal input/output of the TS pseudo synchronization devices 101 and 102. The input TS of the N system is input to the TS pseudo synchronization device 101. The E-system input TS is input to the TS pseudo synchronization device 102. The output TS is a TS output from the TS pseudo synchronization devices 101 and 102 to the TS synthesis device 130.

In FIG. 3, each rectangle represents a TS with an SF structure. The numbers in the notation inside the rectangle are numbers for distinguishing each TS. “n” indicates an N-type input TS. "N" indicates an output TS of the N system. "e" indicates that it is an E-system input TS. "E" indicates the output TS of the E system.

Although FIG. 3 basically shows that the output TS is output with a time delay of 1 SF from the input TS at startup, in reality, the TS pseudo synchronization device 101, 102 may be configured to output the TS with a delay of more than 1 SF.

The clock signals at the entrusting stations 200 and 210 and the clock signals at the entrusting station 100 are not synchronized. As a result, as time passes, a phase shift occurs between the TS input to the N system and the internal SF phase of the TS pseudo synchronization device 101 in the N system. Similarly, as time passes, a phase shift occurs between the TS input to the E system and the internal SF phase of the TS pseudo synchronization device 102 in the E system.

For example, when a failure occurs in the N system, the N system and the E system are switched. Specifically, the TS synthesis device 130 changes from using the TS from the TS pseudo synchronization device 101 to using the TS from the TS pseudo synchronization device 102.

As described above, the internal SF phase is determined based on the SF phase signal input from the superframe phase signal generator 120 to both the N-system TS pseudo-synchronization device 101 and the E-system TS pseudo-synchronization device 102. generated. Therefore, even if the phase of the TS input to the N system and the phase of the TS input to the E system are out of phase, the internal SF generated by the internal SF phase generation unit 112 in the TS pseudo synchronization device 101 No phase shift occurs between the phase and the internal SF phase generated by the internal SF phase generation unit 112 in the TS pseudo synchronization device 102.

As a result, duplication or loss of packets at the time of system switching is prevented. Therefore, the occurrence of video noise and audio noise at the time of system switching is reduced, and the occurrence of errors in the transmission equipment is prevented.

Embodiment 2.
FIG. 4 is a system configuration diagram showing a broadcasting system including a commissioned station and a commissioned station having a pseudo synchronization device (TS pseudo synchronization device) according to the second embodiment. FIG. 4 shows entrusted station 100, entrusted stations 200, 210, and transmission equipment 300. Transmission equipment 300 transmits the TS received from commissioned station 100 to a broadcasting satellite.

The configurations and functions of the entrusting stations 200 and 210 shown in FIG. 4 are the same as those of the entrusting stations 200 and 210 shown in FIG.

The entrusted station 100 includes an N-system TS pseudo-synchronizer 121, an E-system TS pseudo-synchronizer 122, a clock signal generator 110, a superframe phase signal generator 120, and a TS synthesizer 130. It is provided.

The configurations and functions of the clock signal generation device 110, superframe phase signal generation device 120, and TS synthesis device 130 shown in FIG. 4 are the same as those in the first embodiment. The configuration and function are the same as the TS synthesizer 130.

In the second embodiment, the clock signal generator 110 supplies the clock signal to the superframe phase signal generator 120 and the TS synthesizer 130, but not to the TS pseudo synchronizers 121 and 122. Similar to the first embodiment, the superframe phase signal generator 120 supplies the SF phase signal to the TS synthesizer 130 and the TS pseudo synchronizers 121 and 122.

FIG. 5 is a block diagram showing a configuration example of the TS pseudo synchronization device 121. The TS pseudo synchronization device 121 includes a demultiplexer 111, a remultiplexer 113, an internal SF phase generator 114, and an internal clock generator 115. The configurations and functions of the demultiplexer 111 and remultiplexer 113 shown in FIG. 5 are the same as those of the demultiplexer 111 and remultiplexer 113 in the first embodiment.

Note that the TS pseudo synchronization device 122 is also configured similarly to the TS pseudo synchronization device 121. That is, the TS pseudo synchronization device 122 also includes a demultiplexer 111, a remultiplexer 113, an internal SF phase generator 114, and an internal clock generator 115.

In the second embodiment, the internal clock generation unit 115 generates an internal clock signal based on the SF phase signal input from the superframe phase signal generation device 120. For example, the internal clock generation section 115 is realized by a frequency synthesizer.

The SF phase signal is input to the internal SF phase generation unit 114 from the superframe phase signal generation device 120. Further, a clock signal is inputted to the internal SF phase generating section 114 from the internal clock generating section 115 . The internal SF phase generation unit 114 generates an internal SF phase based on the SF phase signal using an internal clock signal synchronized with the SF phase signal.

When switching between the N system and the E system, the TS synthesis device 130 changes from a state in which it uses the TS from the TS pseudo synchronization device 121 to a state in which it uses the TS from the TS pseudo synchronization device 122.

In the second embodiment as well, the internal SF phase generation unit 114 of any system generates the SF phase based on the SF phase signal from one superframe phase signal generation device 120. Therefore, there is no phase shift between the internal SF phase generated by the internal SF phase generation section 112 in the TS pseudo synchronization device 101 and the internal SF phase generated by the internal SF phase generation section 112 in the TS pseudo synchronization device 102. Does not occur.

As a result, duplication or loss of packets at the time of system switching is prevented. Therefore, the occurrence of video noise and audio noise at the time of system switching is reduced, and the occurrence of errors in the transmission equipment is prevented.

In the first embodiment, the TS pseudo synchronization devices 101 and 102 are supplied with a clock signal from a clock signal generation device 110 and an SF phase signal from a superframe phase signal generation device 120. Therefore, the number of signal wires to the TS pseudo synchronization devices 101 and 102 increases. However, in the second embodiment, since no clock signal is supplied from the clock signal generation device 110, an increase in the number of signal lines can be suppressed.

FIG. 6 is a block diagram showing the main parts of the pseudo synchronization device. The pseudo synchronization device 10 (in the embodiment, implemented by TS pseudo synchronization devices 101, 102 or TS pseudo synchronization devices 121, 122) shown in FIG. A pseudo synchronization device that performs frequency synchronization with a signal, and is an internal phase (e.g., internal SF phase) based on a phase signal, that is, a synchronization signal (e.g., SF phase signal) used by a TS synthesizer that performs TS synthesis. an internal phase generator 11 (in the embodiment, realized by internal SF phase generators 112 and 114) that generates (In the embodiment, this is realized by the re-multiplexing unit 113.)

The internal phase generation unit 11 receives, for example, a clock signal and a phase signal that are the basis of a phase signal, and generates an internal phase using the clock signal based on the phase signal input at startup.

The internal phase generation section receives, for example, a phase signal, generates an internal clock signal from the phase signal, and generates the internal phase using the internal clock signal based on the phase signal input at startup.

The internal phase generation section is configured to generate an internal phase using the phase signal input at startup as a starting point.

FIG. 7 is a block diagram showing the main parts of the broadcasting system. The broadcasting system 20 (corresponding to the commissioned station 100) shown in FIG. A TS synthesizer 22 (in the embodiment, realized by a TS synthesizer 130) that performs In this embodiment, the superframe phase signal generator 120 is implemented), and the pseudo synchronization device 24 (in the embodiment, the TS pseudo synchronization devices 101 and 102 or the TS pseudo synchronization device 24) frequency synchronizes the TS with the clock signal. ), and the pseudo synchronization device 24 determines the internal phase (for example, an internal phase generation unit 11 (in the embodiment, realized by internal SF phase generation units 112 and 114) that generates an internal SF phase), and a TS that reconstructs an input TS into a TS synchronized with the internal phase. A reconstruction unit 12 (in the embodiment, realized by a re-multiplexing unit 113).

The pseudo synchronization device 24 includes, for example, a working system (N system) TS pseudo synchronization device (implemented by 101 and 121 in the embodiment) and a standby system (E system) TS pseudo synchronization device (implemented). 102 and 122).

10 pseudo synchronization device 11 internal phase generation unit 12 TS reconstruction unit 20 broadcasting system 21 clock signal generation device 22 TS synthesis device 23 phase signal generation unit 24 pseudo synchronization device 100 commissioned station 101, 102, 121, 122 TS pseudo synchronization converter 110 clock signal generator 111 demultiplexer 112, 114 internal SF phase generator 113 remultiplexer 115 internal clock generator 120 superframe phase signal generator 130 TS synthesizer 200, 210 entrusting station 201, 202 transmitting side signal Processing device 203 Clock signal generation device 300 Transmission equipment

Claims (9)

A pseudo synchronization device that synchronizes the frequency of a TS (Transport Stream) with a superframe structure to a clock signal in a trusted station,
an internal phase generation unit that generates an internal phase based on a phase signal used by a TS synthesizer that synthesizes TS;
A pseudo synchronization device comprising: a TS reconstruction unit that reconstructs an input TS into a TS synchronized with the internal phase. The internal phase generation unit receives a clock signal on which the phase signal is based and the phase signal, and generates the internal phase using the clock signal based on the phase signal input at startup. The pseudo synchronization device according to item 1. The internal phase generation section receives the phase signal, generates an internal clock signal from the phase signal, and generates the internal phase using the internal clock signal based on the phase signal input at startup. A pseudo synchronization device according to claim 1. The pseudo synchronization device according to any one of claims 1 to 3, wherein the internal phase generation unit generates the internal phase using the phase signal input at startup as a starting point. a clock signal generation section that generates a clock signal;
a TS synthesis device that synthesizes superframe-structured TSs (Transport Streams);
a phase signal generation unit that generates a phase signal used by the TS synthesizer;
a pseudo synchronization device that synchronizes the frequency of the TS with the clock signal,
The pseudo synchronization device includes:
an internal phase generation unit that generates an internal phase based on a phase signal used by the TS synthesizer;
A broadcasting system comprising: a TS reconstruction unit that reconstructs an input TS into a TS synchronized with the internal phase. 6. The broadcasting system according to claim 5, wherein the pseudo synchronization device includes a working TS pseudo synchronization device and a backup TS pseudo synchronization device. The internal phase generation section receives the clock signal and the phase signal, and generates the internal phase using the clock signal based on the phase signal input at startup. Broadcast system described. The internal phase generation section receives the phase signal, generates an internal clock signal from the phase signal, and generates the internal phase using the internal clock signal based on the phase signal input at startup. The broadcasting system according to claim 5 or claim 6. The broadcasting system according to claim 5 or 6, wherein the internal phase generation unit generates the internal phase using the phase signal input at startup as a starting point.

Images