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JP2021114594A - Optical semiconductor element - Google Patents

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JP2021114594A
JP2021114594A JP2020017199A JP2020017199A JP2021114594A JP 2021114594 A JP2021114594 A JP 2021114594A JP 2020017199 A JP2020017199 A JP 2020017199A JP 2020017199 A JP2020017199 A JP 2020017199A JP 2021114594 A JP2021114594 A JP 2021114594A
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layer
optical semiconductor
dbr
light
wavelength
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昌伸 岩本
Masanobu Iwamoto
昌伸 岩本
秀人 菅原
Hideto Sugawara
秀人 菅原
建次 磯本
Kenji Isomoto
建次 磯本
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Priority to US16/789,639 priority Critical patent/US11114822B2/en
Priority to CN202010145989.0A priority patent/CN112447888A/en
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Abstract

To provide an optical semiconductor element in which the variation in light output in a wafer surface is reduced.SOLUTION: An optical semiconductor element includes a substrate, a light-emitting layer, and a distribution Bragg reflector. The light-emitting layer includes an AlGaAs multiple quantum well layer. The distribution Bragg reflector is disposed between the substrate and the light-emitting layer, and pairs of a first layer and a second layer are stacked periodically. The first layer includes AlxGa1-xAs. The second layer includes Inz(AlyGa1-y)1-zP. The refractive index n1 of the first layer is higher than the refractive index n2 of the second layer. Assuming that the center wavelength of the band in the wavelength distribution of the reflectance of the distribution Bragg reflector is λ0, the first layer has a thickness larger than λ0/(4n1) and the second layer has a thickness smaller than λ0/(4n2).SELECTED DRAWING: Figure 1

Description

本発明の実施形態は、光半導体素子に関する。 Embodiments of the present invention relate to opto-semiconductor devices.

発光層と基板との間に、分布ブラッグ反射器(DBR:Distributed Bragg Reflector)を設けると、発光層から基板に向かう光を反射し、高出力赤外光を上方に放出できる。 When a distributed Bragg reflector (DBR) is provided between the light emitting layer and the substrate, the light from the light emitting layer toward the substrate can be reflected and high-power infrared light can be emitted upward.

屈折率の異なる2つの層が積層されたDBRでは、結晶成長温度がロット内およびロット間で変動するために、DBRの反射率が最大となる波長が変化し、光半導体素子ウェーハの面内光出力に変動を生じる。 In a DBR in which two layers having different refractive indexes are laminated, the wavelength at which the reflectance of the DBR is maximized changes because the crystal growth temperature fluctuates within and between lots, and the in-plane light of the optical semiconductor device wafer changes. The output fluctuates.

特開2016−129189号公報Japanese Unexamined Patent Publication No. 2016-129189

ウェーハ面内での光出力の変動が低減された光半導体素子を提供する。 Provided is an optical semiconductor device in which fluctuations in optical output within the wafer surface are reduced.

本発明の実施形態の光半導体素子は、基板と、発光層と、分布ブラッグ反射器と、を有する。前記発光層は、AlGaAs多重量子井戸層を有する。前記分布ブラッグ反射器は、前記基板と前記発光層との間に設けられ、第1の層と第2の層とのペアが周期的に積層される。前記第1の層はAlGa1−xAsを含み、前記第2の層はIn(AlGa1−y1−zPを含む。前記第1の層の屈折率nは前記第2の層の屈折率nよりも高い。前記第1の層は、前記分布ブラッグ反射器の反射率の波長分布における帯域の中心波長をλ0としてλ0/(4n)よりも大きい厚さを有する。前記第2の層は、λ0/(4n)よりも小さい厚さを有する。 The optical semiconductor device of the embodiment of the present invention includes a substrate, a light emitting layer, and a distributed Bragg reflector. The light emitting layer has an AlGaAs multiple quantum well layer. The distributed Bragg reflector is provided between the substrate and the light emitting layer, and pairs of the first layer and the second layer are periodically laminated. The first layer contains Al x Ga 1-x As, and the second layer contains In z (Al y Ga 1-y ) 1-z P. The refractive index n 1 of the first layer is higher than the refractive index n 2 of the second layer. It said first layer having a distributed Bragg reflector of the center wavelength of the band in the wavelength distribution of reflectance as λ0 λ0 / (4n 1) greater than the thickness. The second layer has a thickness less than λ0 / (4n 2).

図1(a)は第1の実施形態にかかる光半導体素子の模式断面図、図1(b)は分布反射器の部分模式側面図、である。FIG. 1A is a schematic cross-sectional view of the optical semiconductor device according to the first embodiment, and FIG. 1B is a partial schematic side view of the distributed reflector. 結晶成長温度の変動に対する相対膜厚変化率依存性を表すシミュレーショングラフ図である。It is a simulation graph figure which shows the relative film thickness change rate dependence with respect to the fluctuation of a crystal growth temperature. 図3(a)は比較例にかかる光半導体素子の模式断面図、図3(b)は分布反射器の部分模式側面図、である。FIG. 3A is a schematic cross-sectional view of the optical semiconductor device according to the comparative example, and FIG. 3B is a partial schematic side view of the distributed reflector. 比較例のロット別チップ光出力の平均値を表すグラフ図である。It is a graph which shows the average value of the chip optical output by lot of the comparative example. 結晶成長温度の変動に対するInGa1−zPの相対膜厚変化率依存性を表すシミュレーショングラフ図である。It is a simulation graph which shows the relative film thickness change rate dependence of In z Ga 1-z P with respect to the fluctuation of a crystal growth temperature. 結晶成長温度変動に対するInAl1−zPの相対膜厚変化率依存性を表すシミュレーショングラフ図である。It is a simulation graph figure which shows the relative film thickness change rate dependence of In z Al 1-z P with respect to the crystal growth temperature fluctuation. InAl1−zPのIn混晶比zに対するDBR相対反射率依存性を表すシミュレーショングラフ図である。FIG. 5 is a simulation graph showing the DBR relative reflectance dependence of In z Al 1-z P with respect to the In mixed crystal ratio z. 図8(a)は第2の実施形態のz=0.50におけるDBR相対反射率のシミュレーショングラフ図、図8(b)は第2実施形態のz=0.45におけるDBR相対反射率を表すシミュレーショングラフ図、である。FIG. 8A shows a simulation graph of the DBR relative reflectance at z = 0.50 of the second embodiment, and FIG. 8B shows the DBR relative reflectance at z = 0.45 of the second embodiment. It is a simulation graph diagram.

以下、図面を参照しつつ、本発明の実施形態について説明する。
図1(a)は第1の実施形態にかかる光半導体素子の模式断面図、図1(b)は分布反射器の部分模式側面図、である。
光半導体素子10は、基板20と、発光層30と、分布ブラッグ反射器40と、を有する。発光層30は、AlGa1−xAs多重量子井戸層(MQW:Multi Quantum Well)構造を有する。MQWは、AlGa1−xAsを含む井戸層と、障壁層と、を含む。
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1A is a schematic cross-sectional view of the optical semiconductor device according to the first embodiment, and FIG. 1B is a partial schematic side view of the distributed reflector.
The optical semiconductor element 10 includes a substrate 20, a light emitting layer 30, and a distributed Bragg reflector 40. The light emitting layer 30 has an Al x Ga 1-x As multi-quantum well layer (MQW) structure. MQW includes a well layer containing Al x Ga 1-x As and a barrier layer.

分布ブラッグ反射器(DBR:Distributed Bragg Reflector)40は、基板20と発光層30との間に設けられ、第1の層(屈折率がn)52と第2の層(屈折率がn)54とのペア53が周期的に積層される。このペア53の周期は、分布ブラッグ反射器40の空気中における反射率の波長分布における帯域の中心波長λ0における位相差が180°に相当する。第1の層52はAlGa1−xAsを含み、第2の層54はIn(AlGa1−y1−zPを含む。また、中心波長λ0は700nm以上であるものとする。 The Distributed Bragg Reflector (DBR) 40 is provided between the substrate 20 and the light emitting layer 30, and has a first layer (refractive index n 1 ) 52 and a second layer (refractive index n 2). ) 54 and the pair 53 are periodically laminated. In the period of the pair 53, the phase difference at the center wavelength λ0 of the band in the wavelength distribution of the reflectance in the air of the distributed Bragg reflector 40 corresponds to 180 °. The first layer 52 contains Al x Ga 1-x As, and the second layer 54 contains In z (Al y Ga 1-y ) 1-z P. Further, it is assumed that the center wavelength λ0 is 700 nm or more.

図1(b)において、第1の層52の厚さをT1、T1の厚さを通過する位相変化分をα(°)、屈折率をn、とする。中心波長λ0(自由空間内)において、位相変化分αは式(1)で表される。 In FIG. 1 (b), the thickness of the first layer 52 is T1, the phase change portion passing through the thickness of T1 is α 1 (°), and the refractive index is n 1 . At the center wavelength λ0 (in free space), the phase change component α 1 is represented by Eq. (1).


α(°)=90°×T1/(λ0/4n) 式(1)

α 1 (°) = 90 ° × T1 / (λ0 / 4n 1 ) Equation (1)

また、第2の層54の厚さをT2、T2の厚さを通過する位相変化分をα(°)、屈折率をn、とする。中心波長λ0において、位相変化分αは式(2)で表される。 Further, the thickness of the second layer 54 is T2, the phase change portion passing through the thickness of T2 is α 2 (°), and the refractive index is n 2 . At the center wavelength λ0, the phase change α 2 is represented by the equation (2).


α(°)=90°×T2/(λ0/4n) 式(2)

α 2 (°) = 90 ° × T2 / (λ0 / 4n 2 ) Equation (2)

ここで、波長λ0における(以下、「@λ0」と表記する)第1の層52の屈折率n(@λ0)は、第2の層54の屈折率n(@λ0)よりも大きいものとする(n>n2)。このとき、発光層30から放出され、第1の層52と第2の層54との界面で反射された光L1と、1ペア分下方の第1の層52と第2の層54との界面で反射された光L2と、の位相差は(α+α)=180°となるように設計される(@λ0)。このため、光L1と光L2の光路差は、360°となり、反射光が互いに強めあう。この結果、DBRの積層数を増やすことにより、DBRによる上方への反射率が高められ光出力を高めることができる。 Here, the refractive index n 1 (@ λ0) of the first layer 52 (hereinafter referred to as “@ λ0”) at the wavelength λ0 is larger than the refractive index n 2 (@ λ0) of the second layer 54. (N 1 > n 2). At this time, the light L1 emitted from the light emitting layer 30 and reflected at the interface between the first layer 52 and the second layer 54, and the first layer 52 and the second layer 54 one pair below the light L1 The phase difference between the light L2 reflected at the interface and the light L2 is designed to be (α 1 + α 2 ) = 180 ° (@ λ0). Therefore, the optical path difference between the light L1 and the light L2 is 360 °, and the reflected light strengthens each other. As a result, by increasing the number of stacked DBRs, the upward reflectance due to the DBR can be increased and the light output can be increased.

第1の実施形態では、第1の層52が中心波長λ0で4分の1波長(媒質内波長)よりも大きい厚さT1を有し、第2の層54が中心波長で4分の1波長(媒質内波長)よりも小さい厚さT2を有する。すなわち、位相変化分α>位相変化分αとされる。 In the first embodiment, the first layer 52 has a thickness T1 larger than a quarter wavelength (in-medium wavelength) at the center wavelength λ0, and the second layer 54 has a quarter wavelength at the center wavelength. It has a thickness T2 smaller than the wavelength (wavelength in the medium). That is, the phase change component α 1 > the phase change component α 2 is set.

また、光半導体素子10は、基板20と、基板20とDBR40との間に設けられたバッファ層32と、DBR40と発光層30との間に設けられ第1クラッド層34と、発光層30の上に設けられ第2のクラッド層36と、コンタクト層38と、をさらに含むことができる。コンタクト層38上に上部電極60、基板20の裏面に下部電極62を設け発光層30に電流を注入することにより、光11が上方に放出される。 Further, the optical semiconductor element 10 includes a substrate 20, a buffer layer 32 provided between the substrate 20 and the DBR 40, a first clad layer 34 provided between the DBR 40 and the light emitting layer 30, and a light emitting layer 30. A second clad layer 36 provided above and a contact layer 38 can be further included. The light 11 is emitted upward by providing the upper electrode 60 on the contact layer 38 and the lower electrode 62 on the back surface of the substrate 20 and injecting a current into the light emitting layer 30.

バッファ層32は、n形GaAsなどを含むものとする。DBR40の第1の層52は、n形AlGa1−xAs(0≦x≦1)などを含むものとする。DBR40の第2の層54は、n形In(AlGa1−y1−zP(0≦y≦1、0≦z≦1)などを含むものとする。第1クラッド層34は、n形AlGa1−xAs、またはIn(AlGa1−y1−zP(0≦x≦1、0≦y≦1、0≦z≦1)などを含むものとする。発光層30は、i−AlGa1−xAs(0≦x≦1)多重量子井戸層などを含むものとする。第2クラッド層36は、n形AlGa1−xAs、またはIn(AlGa1−y1−zP(0≦x≦1、0≦y≦1、0≦z≦1)などを含むものとする。 The buffer layer 32 includes n-type GaAs and the like. It is assumed that the first layer 52 of the DBR 40 includes an n-type Al x Ga 1-x As (0 ≦ x ≦ 1) and the like. A second layer 54 of DBR40 is, n-type In z (Al y Ga 1- y) 1-z P (0 ≦ y ≦ 1,0 ≦ z ≦ 1) is intended to include like. The first clad layer 34 is formed of n-type Al x Ga 1-x As, or In z (Al y Ga 1-y ) 1-z P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1). ) Etc. shall be included. It is assumed that the light emitting layer 30 includes an i-Al x Ga 1-x As (0 ≦ x ≦ 1) multiple quantum well layer and the like. The second clad layer 36 is an n-type Al x Ga 1-x As, or an In z (Al y Ga 1-y ) 1-z P (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1). ) Etc. shall be included.

DBRは、MOCVD(Metal Organic Chemical Vapor Deposition)法などの気相成長法を用いて形成される。MOCVD法を用いると、結晶成長時の温度変動により膜厚変動を生じる。このため、DBRの反射率が設計値に対して変動をする。たとえば、DBRを10ペアなどと積層すると、膜厚変動が累積されてDBRの反射率が低下し光出力が低下することになる。 The DBR is formed by using a vapor phase growth method such as the MOCVD (Metal Organic Chemical Vapor Deposition) method. When the MOCVD method is used, the film thickness fluctuates due to the temperature fluctuation during crystal growth. Therefore, the reflectance of the DBR fluctuates with respect to the design value. For example, when the DBR is laminated with 10 pairs or the like, the film thickness variation is accumulated, the reflectance of the DBR is lowered, and the light output is lowered.

次に、α>αとすることにより、DBRにおける膜厚変動が低減できることを説明する。
図2は、結晶成長温度の変動に対する相対膜厚変化率依存性を表すシミュレーショングラフ図である。
縦軸は相対膜厚変化率(%)、横軸は結晶成長温度の変動範囲(℃)、である。In0.5Al0.5PおよびIn0.5Ga0.5Pの相対膜厚変化率は、結晶成長温度が±5℃の許容範囲において、それぞれ±5%、および±4%と大きい。これに対してAl0.5Ga0.5Asの相対膜厚変化率は±2.5%と小さい。発明者らは、DBRを構成する第2の層のIn組成比zを小さくする方が相対膜厚変化率を小さくできることを見いだした。たとえば、許容範囲内の相対膜厚変化率は、GaAsにおいて約2%以下、GaPで1.7%以下と小さくなる。また、たとえば、In0.5Al0.5Pにおいて、In混晶比zが0.45〜0.5の範囲のとき、結晶成長温度の許容範囲±5℃に対して相対膜厚変化率は約±5%であることを見いだした。なお、本実施形態では、結晶成長時の温度変動の許容範囲は、設定温度に対して±5℃以内とする。
Next, it will be described that the film thickness fluctuation in the DBR can be reduced by setting α 1 > α 2.
FIG. 2 is a simulation graph showing the dependence of the relative film thickness change rate on the fluctuation of the crystal growth temperature.
The vertical axis is the relative film thickness change rate (%), and the horizontal axis is the fluctuation range of the crystal growth temperature (° C.). The relative film thickness changes of In 0.5 Al 0.5 P and In 0.5 Ga 0.5 P are as large as ± 5% and ± 4%, respectively, within the allowable range of the crystal growth temperature of ± 5 ° C. .. On the other hand, the relative film thickness change rate of Al 0.5 Ga 0.5 As is as small as ± 2.5%. The inventors have found that the relative film thickness change rate can be reduced by reducing the In composition ratio z of the second layer constituting the DBR. For example, the relative film thickness change rate within the permissible range is as small as about 2% or less for GaAs and 1.7% or less for GaP. Further, for example, in In 0.5 Al 0.5 P, when the In mixed crystal ratio z is in the range of 0.45 to 0.5, the relative film thickness change rate with respect to the allowable range of crystal growth temperature ± 5 ° C. Was found to be about ± 5%. In this embodiment, the permissible range of temperature fluctuation during crystal growth is within ± 5 ° C. with respect to the set temperature.

図3(a)は比較例にかかる光半導体素子の模式断面図、図3(b)は分布反射器の部分模式側面図、である。
DBR140のAlGa1−xAsからなる第1の層152の厚さTT1は4分の1波長、In(GaAl)1−zPからなる第2の層154の厚さTT2は4分の1波長とする。比較例の第2の層154の厚さTT2が第1の実施形態の第2の層54の膜厚T2よりも大きい。このため、比較例において、相対膜厚変化率×TT2で表される第2の層154の厚さ変動の絶対値は、第1の実施形態の第2の層54の相対膜厚変化率×T2の厚さ変動の絶対値よりも大きい。
FIG. 3A is a schematic cross-sectional view of the optical semiconductor device according to the comparative example, and FIG. 3B is a partial schematic side view of the distributed reflector.
The thickness TT2 of Al x Ga 1-x thickness TT1 is a quarter wavelength of the first layer 152 consisting of As, In z (GaAl) 1 -z second layer 154 made of P of DBR140 4 minutes It is set to one wavelength of. The thickness TT2 of the second layer 154 of the comparative example is larger than the film thickness T2 of the second layer 54 of the first embodiment. Therefore, in the comparative example, the absolute value of the thickness variation of the second layer 154 represented by the relative film thickness change rate × TT2 is the relative film thickness change rate of the second layer 54 of the first embodiment ×. It is larger than the absolute value of the thickness variation of T2.

図4は、比較例のロット別チップ光出力の平均値を表すグラフ図である。
縦軸はチップ光出力(実測値)の平均値の相対値、横軸は結晶成長ロット番号、である。結晶成長温度の変動によりDBR膜厚分布の変動範囲が大きくなる。このため、ロット毎のDBRの相対反射率の変動範囲が大きくなり、チップ光出力の相対値が0.75〜1.15の間で大きく変動する。
FIG. 4 is a graph showing the average value of the chip optical output for each lot of the comparative example.
The vertical axis is the relative value of the average value of the chip optical output (measured value), and the horizontal axis is the crystal growth lot number. The fluctuation range of the DBR film thickness distribution becomes large due to the fluctuation of the crystal growth temperature. Therefore, the fluctuation range of the relative reflectance of the DBR for each lot becomes large, and the relative value of the chip light output fluctuates greatly between 0.75 and 1.15.

これに対して、第1の実施形態では、第2の層54の厚さT2が4分の1波長よりも小さい分、第1の層52の厚さT1を4分の1波長よりも大きくして位相変化分(α+α)を180°に保つ。第1の層52の厚さT1が4分の1波長以上となっても、その相対膜厚変化率は2.5%以下と小さいのでDBR全体としての相対膜厚変化率を比較例よりも低減できる。このため、第1の実施形態では結晶成長温度の変動許容範囲に対してDBRの相対反射率の変動が低減され、ロット間における光出力の変動が低減される。 On the other hand, in the first embodiment, the thickness T2 of the second layer 54 is smaller than the quarter wavelength, and the thickness T1 of the first layer 52 is larger than the quarter wavelength. Then, the phase change (α 1 + α 2 ) is kept at 180 °. Even if the thickness T1 of the first layer 52 is 1/4 wavelength or more, the relative film thickness change rate is as small as 2.5% or less, so that the relative film thickness change rate of the DBR as a whole is higher than that of the comparative example. Can be reduced. Therefore, in the first embodiment, the fluctuation of the relative reflectance of the DBR is reduced with respect to the fluctuation allowable range of the crystal growth temperature, and the fluctuation of the light output between lots is reduced.

たとえば、第1の層52をAl0.2Ga0.8Asとすると屈折率nは770nmにおいて約3.55となり、媒質内波長は約54.2nmとなる。また、第2の層54をIn0.5Al0.5Pとすると、屈折率nは770nmにおいて約3.12となり、媒質内波長は約61.7nmとなる。DBRをこのような層で構成すると、n>nとすることができる。たとえば、第2の層54の厚さT2を56.1nm(α2=82°に相当)とするとき、第1の層52の厚さT1を59nm(α=98°に相当)とすれば。DBRの1ペアの位相変化を180°とし反射率を高めることができる。 For example, assuming that the first layer 52 is Al 0.2 Ga 0.8 As, the refractive index n 1 is about 3.55 at 770 nm, and the wavelength in the medium is about 54.2 nm. Further, when the second layer 54 is In 0.5 Al 0.5 P, the refractive index n 2 is about 3.12 at 770 nm, and the wavelength in the medium is about 61.7 nm. When the DBR is composed of such layers, n 1 > n 2 can be set. For example, if the thickness T2 of the second layer 54 is 56.1 nm (corresponding to α2 = 82 °), the thickness T1 of the first layer 52 is 59 nm ( corresponding to α 1 = 98 °). .. The reflectance can be increased by setting the phase change of one pair of DBR to 180 °.

なお、第2の層54により位相変化分αは、たとえば、30°以上、かつ90°よりも小とすることができる。位相変化分αが小さすぎると、波長に対するDBR反射特性が劣化することがあるので、位相変化分αの下限を、たとえば、30°とする。 The phase change amount α 2 can be set to, for example, 30 ° or more and smaller than 90 ° by the second layer 54. If the phase change component α 2 is too small, the DBR reflection characteristic with respect to the wavelength may deteriorate. Therefore, the lower limit of the phase change component α 2 is set to, for example, 30 °.

図5は、結晶成長温度変動に対するInGa1−zPの相対膜厚変化率依存性を表すシミュレーショングラフ図である。
In混晶比zが0.5から0.42へと減少すると共に、相対膜厚変化率が4%から2.8%へと低下する。すなわち、In混晶比zが小さいほどDBRを構成する第1の層52において、結晶成長温度変動の許容範囲(設定温度±5℃)内の相対膜厚変化率を低減できる。
FIG. 5 is a simulation graph showing the dependence of Inz Ga 1-z P on the relative film thickness change rate with respect to the fluctuation of the crystal growth temperature.
The In mixed crystal ratio z decreases from 0.5 to 0.42, and the relative film thickness change rate decreases from 4% to 2.8%. That is, the smaller the In mixed crystal ratio z, the smaller the relative film thickness change rate within the allowable range of crystal growth temperature fluctuation (set temperature ± 5 ° C.) in the first layer 52 constituting the DBR.

図6は、結晶成長温度変動に対するInAl1−zPの相対膜厚変化率依存性を表すシミュレーショングラフ図である。
In混晶比zが0.5から0.42へと減少すると共に、相対膜厚変化率が5%から3.3%へと低下する。すなわち、In混晶比zが小さいほどDBRを構成する第1の層52において、結晶成長温度変動の許容範囲(設定温度±5℃)内の相対膜厚変化率を低減できる。また、第2の層54は図5においてInGa1−zP、図6においてInAl1−zPとした。なお、第2の層54がIn(AlGa1−y1−zPであっても、図5及び図6とほぼ同様の相対膜厚変化率の変動範囲となる。
FIG. 6 is a simulation graph showing the dependence of Inz Al 1-z P on the relative film thickness change rate with respect to the fluctuation of the crystal growth temperature.
The In mixed crystal ratio z decreases from 0.5 to 0.42, and the relative film thickness change rate decreases from 5% to 3.3%. That is, the smaller the In mixed crystal ratio z, the smaller the relative film thickness change rate within the allowable range of crystal growth temperature fluctuation (set temperature ± 5 ° C.) in the first layer 52 constituting the DBR. The second layer 54 was designated as In z Ga 1-z P in FIG . 5 and In z Al 1-z P in FIG. Even if the second layer 54 is In z (Al y Ga 1-y ) 1-z P, the fluctuation range of the relative film thickness change rate is almost the same as in FIGS. 5 and 6.

図7は、InAl1−zPのIn混晶比zに対するDBR相対反射率依存性を表すシミュレーショングラフ図である。
縦軸はDBR相対反射率(%)、横軸はIn混晶比z、である。相対反射率は、In混晶比z=0.50のときを100%とする。In混晶比zが減少する(横軸右方向)に伴って、DBR相対反射率が漸減し、z=0.45では約93%まで低下する。すなわち、第1の層(AlGaAs)52の混晶比を固定し、第2の層54のInAl1−zPのIn混晶比zを変化したとき、In混晶比zが小さいほどDBRの相対反射率が低下している。
FIG. 7 is a simulation graph showing the DBR relative reflectance dependence of In z Al 1-z P with respect to the In mixed crystal ratio z.
The vertical axis is the DBR relative reflectance (%), and the horizontal axis is the In mixed crystal ratio z. The relative reflectance is 100% when the In mixed crystal ratio z = 0.50. As the In mixed crystal ratio z decreases (to the right on the horizontal axis), the DBR relative reflectance gradually decreases, and when z = 0.45, it decreases to about 93%. That is, when the mixed crystal ratio of the first layer (AlGaAs) 52 is fixed and the In mixed crystal ratio z of In z Al 1-z P of the second layer 54 is changed, the smaller the In mixed crystal ratio z, the smaller the In mixed crystal ratio z. The relative reflectance of the DBR is decreasing.

図8(a)は第2の実施形態のz=0.50近傍におけるDBR相対反射率のシミュレーショングラフ図、図8(b)は第2実施形態のz=0.45近傍におけるDBR相対反射率を表すシミュレーショングラフ図、である。
縦軸はDBR相対反射率(%)、横軸はIn混晶比z、である。相対反射率は、z=0.50のときを100%とする。第1の層52はAlGa1−xAsを含み、第2の層54はInAl1−zPを含むものとする。また、第1の層52の位相αは式(1)で表され、第2の層54の位相αは式(2)で表されるものとする。なお、図2におけると同様に、結晶成長温度の変動範囲±5℃に対してIn組成比zの変動率は約±5%であるとした。
FIG. 8A is a simulation graph of the DBR relative reflectance in the vicinity of z = 0.50 of the second embodiment, and FIG. 8B is a simulation graph of the DBR relative reflectance in the vicinity of z = 0.45 of the second embodiment. It is a simulation graph diagram showing.
The vertical axis is the DBR relative reflectance (%), and the horizontal axis is the In mixed crystal ratio z. The relative reflectance is 100% when z = 0.50. It is assumed that the first layer 52 contains Al x Ga 1-x As and the second layer 54 contains In z Al 1-z P. Further, it is assumed that the phase α 1 of the first layer 52 is represented by the equation (1), and the phase α 2 of the second layer 54 is represented by the equation (2). As in FIG. 2, it was assumed that the volatility of the In composition ratio z was about ± 5% with respect to the fluctuation range of the crystal growth temperature of ± 5 ° C.

図8(a)において、In混晶比zの設定値を0.5とすると、結晶成長温度の変動範囲においてIn混晶比zは0.475から0.525の範囲で変動する。このとき相対反射率は96〜104%(変動範囲が8%)である。他方、図8(b)において、In混晶比zの設定値を0.45とすると、結晶成長温度の変動範囲においてIn混晶比zは0.4275から0.4725の範囲で変動することになる。このとき相対反射率は90.0〜95.5%(変動範囲が5.5%と小さい)ことが予想される。但し、z<0.45とすると、GaAs基板に対して格子不整合率が高くなるのでz≧0.45とする。 In FIG. 8A, assuming that the set value of the In mixed crystal ratio z is 0.5, the In mixed crystal ratio z fluctuates in the range of 0.475 to 0.525 within the fluctuation range of the crystal growth temperature. At this time, the relative reflectance is 96 to 104% (the fluctuation range is 8%). On the other hand, in FIG. 8B, assuming that the set value of the In mixed crystal ratio z is 0.45, the In mixed crystal ratio z fluctuates in the range of 0.4275 to 0.4725 in the fluctuation range of the crystal growth temperature. become. At this time, the relative reflectance is expected to be 90.0 to 95.5% (the fluctuation range is as small as 5.5%). However, when z <0.45, the lattice mismatch rate is higher than that of the GaAs substrate, so z ≧ 0.45.

また、z≦0.525とする。すなわち、In組成比zを0.5から0.45に低下させるにしたがって、相対反射率の変動範囲を小さくでき、ウェーハ面内の発光出力変動幅を低減できる。 Further, z ≦ 0.525. That is, as the In composition ratio z is lowered from 0.5 to 0.45, the fluctuation range of the relative reflectance can be reduced, and the fluctuation range of the light emission output in the wafer surface can be reduced.

本実施形態によれば、結晶成長温度の変動許容範囲において、ウェーハ面内での光出力の変動が低減され、結果としてロット間での光出力の変動が低減された光半導体素子が提供される。本実施形態の光半導体素子は、入出力が電気的に絶縁された状態で信号を伝送可能なフォトカプラーやフォトリレーに広く利用される。 According to the present embodiment, there is provided an optical semiconductor device in which fluctuations in optical output within the wafer surface are reduced within an allowable range of fluctuations in crystal growth temperature, and as a result, fluctuations in optical output between lots are reduced. .. The optical semiconductor device of the present embodiment is widely used in a photocoupler or a photorelay capable of transmitting a signal in a state where the input and output are electrically isolated.

本発明のいくつかの実施形態を説明したが、これらの実施形態は、例として提示したものであり、発明の範囲を限定することは意図していない。これら新規な実施形態は、その他の様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれるとともに、特許請求の範囲に記載された発明とその均等の範囲に含まれる。 Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other embodiments, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are also included in the scope of the invention described in the claims and the equivalent scope thereof.

10 光半導体素子、20 基板、30 発光層、40 分布ブラッグ反射器(DBR)、52 第1の層、54 第2の層、n 第1の層の屈折率、n 第2の層の屈折率、λ0 中心波長、T1 第1の層の厚さ、T2 第2の層の厚さ

10 optical semiconductor device, 20 substrate, 30 light emitting layer, 40 distributed Bragg reflector (DBR), 52 first layer, 54 second layer, n 1 first layer refractive index, n 2 second layer Refractive index, λ0 center wavelength, T1 first layer thickness, T2 second layer thickness

Claims (4)

基板と、
AlGaAs多重量子井戸層を有する発光層と、
前記基板と前記発光層との間に設けられ、第1の層と第2の層とのペアが周期的に積層され、前記第1の層はAlGa1−xAsを含み、前記第2の層はIn(AlGa1−y1−zPを含む、分布ブラッグ反射器と、
を備え、
前記第1の層の屈折率nは、前記第2の層の屈折率nよりも高く、
前記第1の層は、前記分布ブラッグ反射器の反射率の波長分布における帯域の中心波長をλ0として、λ0/(4n)よりも大きい厚さを有し、
前記第2の層は、λ0/(4n)よりも小さい厚さを有する、光半導体素子。
With the board
A light emitting layer having an AlGaAs multiple quantum well layer,
Provided between the substrate and the light emitting layer, pairs of the first layer and the second layer are periodically laminated, and the first layer contains Al x Ga 1-x As, and the first layer is contained. Layer 2 contains a distributed Bragg reflector containing In z (Al y Ga 1-y ) 1-z P, and
With
The refractive index n 1 of the first layer is higher than the refractive index n 2 of the second layer.
The first layer, the distribution center wavelength of the band in the wavelength distribution of the reflectivity of Bragg reflector as .lambda.0, have a thickness greater than λ0 / (4n 1),
The second layer is an optical semiconductor device having a thickness smaller than λ0 / (4n 2).
前記中心波長は、700nm以上である、請求項1記載の光半導体素子。 The optical semiconductor device according to claim 1, wherein the center wavelength is 700 nm or more. 前記第2の層のIn混晶比zは、0.45≦z≦0.525である、請求項1または2に記載の光半導体素子。 The optical semiconductor device according to claim 1 or 2, wherein the In mixed crystal ratio z of the second layer is 0.45 ≦ z ≦ 0.525. 前記基板は、GaAsを含む請求項1〜3のいずれか1つに記載の光半導体素子。 The optical semiconductor device according to any one of claims 1 to 3, wherein the substrate includes GaAs.
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