JP2020013925A - Circuit board and semiconductor module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the impedance of a path passing through a laminated body in a circuit board including a laminated body in which a conductive film and a dielectric film are laminated, irrespective of the arrangement of connecting portions connected to the conductive film. A circuit board includes a first conductive film, a second conductive film, and a dielectric film sandwiched between the first conductive film and the second conductive film, the circuit film being provided inside a base. It includes a stacked body and a conductive portion connected to the first conductive film. The first conductive film has a slit reaching from the outer edge of the first conductive film to the periphery of the connection portion with the conductive portion. [Selection diagram] Figure 1

Description

  The disclosed technology relates to a circuit board and a semiconductor module.

  For example, the following technology is known as a technology relating to a circuit board having a thin film capacitor.

  For example, a multilayer wiring board having a thin film capacitor including a plurality of first capacitance elements and second capacitance elements alternately arranged around a specific position is known. The first capacitive element has a first polarity electrode layer on the upper surface of the dielectric layer, and has a second polarity electrode layer on the lower surface of the dielectric layer. The second capacitor has a second polarity electrode layer on the upper surface of the dielectric layer, and has a first polarity electrode layer on the lower surface of the dielectric layer.

  Further, a multilayer wiring board having a capacitor installed immediately below a semiconductor element mounting area is known. The capacitor includes a sheet-like first electrode provided on the insulating base material, a sheet-like dielectric provided on the first electrode, and a sheet-like second electrode provided on the dielectric. An electrode; and a plurality of electrode terminals arranged in a grid on the second electrode.

JP 2013-8802 A JP 2005-72311A

  2. Description of the Related Art In recent years, with an increase in performance of semiconductor devices, an increase in operation speed, an increase in current, and a reduction in voltage have been attempted. In order to operate a semiconductor device stably, it is important to suppress fluctuations in power supply voltage by removing high-frequency noise mixed into a power supply line. In order to effectively remove high frequency noise, it is preferable to reduce the impedance of a bypass path through which high frequency noise passes.

  As a method of reducing the impedance of a bypass path including a capacitor, a method of forming a thin film capacitor inside a circuit board on which a semiconductor device is mounted and disposing the thin film capacitor immediately below the semiconductor device is known. The thin film capacitor includes an upper electrode, a lower electrode, and a dielectric film sandwiched between these electrodes. The upper electrode of the thin film capacitor is connected to a ground electrode of the semiconductor device via a via in the circuit board, for example, and the lower electrode of the thin film capacitor is connected to a power electrode of the semiconductor device via a via in the circuit board, for example. Is done.

  Consider a case where high-frequency noise passes through a bypass path including a thin film capacitor in the circuit board having the above configuration. Noise current due to high frequency noise flows along the surface of the conductor due to the skin effect. Therefore, the noise current that reaches the lower surface of the upper electrode via the lower electrode and the dielectric film of the thin film capacitor flows toward the outer edge of the upper electrode along the lower surface of the upper electrode, and passes through the side surface (end surface) of the upper electrode. And reaches the upper surface of the upper electrode. Thereafter, the noise current flows along the upper surface of the upper electrode toward the via connected to the upper electrode.

  In order to reduce the impedance of the bypass path through which high-frequency noise passes, it is preferable to shorten the length of the bypass path. For example, by disposing a via connected to the upper electrode near the outer edge of the upper electrode, the length of the bypass path can be reduced. However, the arrangement of vias formed in the circuit board is restricted by, for example, the arrangement of signal wirings formed in the circuit board. Therefore, the via connected to the upper electrode is placed near the outer edge of the upper electrode. Placement may be difficult.

  In one aspect, a disclosed technology is a circuit board including a stacked body in which a conductive film and a dielectric film are stacked, regardless of the arrangement of a connection portion connected to the conductive film, regardless of the arrangement of a connection portion connected to the conductive film. It aims at reducing.

  A circuit board according to the disclosed technology is provided inside a base, a first conductive film, a second conductive film, and a dielectric material sandwiched between the first conductive film and the second conductive film. A stack including a film and a conductive portion connected to the first conductive film are included. The first conductive film has a slit extending from an outer edge of the first conductive film to a periphery of a connection portion with the conductive portion.

  According to the disclosed technology, as one side surface, in a circuit board including a stacked body in which a conductive film and a dielectric film are stacked, a path passing through the stacked body regardless of the arrangement of a connection portion connected to the conductive film. This has the effect of reducing the impedance of

FIG. 3 is a cross-sectional view illustrating an example of a configuration of a circuit board according to an embodiment of the disclosed technology. FIG. 4 is a plan view illustrating an example of a pattern of a first conductive film according to an embodiment of the disclosed technology. FIG. 3 is a sectional view taken along line 3-3 in FIG. 2. FIG. 9 is a cross-sectional view illustrating an example of a configuration of a circuit board according to a comparative example. FIG. 9 is a plan view illustrating an example of a pattern of a first conductive film according to a comparative example. FIG. 6 is a sectional view taken along line 6-6 in FIG. 5. FIG. 3 is a cross-sectional view illustrating an example of a configuration of a semiconductor module according to an embodiment of the disclosed technology. FIG. 4 is a plan view illustrating an example of a pattern of a first conductive film according to an embodiment of the disclosed technology. FIG. 3 is a diagram illustrating a simulation model corresponding to a first conductive film according to the first embodiment of the disclosed technology. FIG. 7 is a diagram illustrating a simulation model corresponding to a first conductive film according to a second embodiment of the disclosed technology. FIG. 9 is a diagram illustrating a simulation model corresponding to a first conductive film according to a comparative example. 4 is a graph showing frequency characteristics of a resistor. 6 is a graph showing frequency characteristics of inductance. FIG. 4 is a plan view illustrating an example of a pattern of a first conductive film according to an embodiment of the disclosed technology.

  Hereinafter, an example of an embodiment of the present invention will be described with reference to the drawings. In each of the drawings, the same or equivalent components and portions are denoted by the same reference numerals, and redundant description will be omitted as appropriate.

  FIG. 1 is a cross-sectional view illustrating an example of a configuration of a circuit board 1 according to an embodiment of the disclosed technology. The circuit board 1 includes a base 10 including a core layer 11 and a build-up layer 12, and a thin film capacitor 20 provided inside the base 10.

  The core layer 11 has an insulator layer 11a including a resin material such as glass epoxy, polyimide, and bismaleimide triazine, and a conductor layer 11b provided on the surface of the insulator layer 11a. The conductor layer 11b is patterned. For example, FR4 (Flame Retardant Type 4) can be used as the core layer 11. The build-up layer 12 has a plurality of insulator layers 12a including the same resin material as the insulator layer 11a constituting the core layer 11. Inside the buildup layer 12, a thin film capacitor 20 is buried. In addition, the build-up layer 12 may be provided on both the front and back surfaces of the core layer 11.

  The thin film capacitor 20 is configured to include a first conductive film 21, a second conductive film 22, and a dielectric film 23 interposed between the first conductive film 21 and the second conductive film. ing. The first conductive film 21 functions as an upper electrode of the thin film capacitor 20, and the second conductive film 22 functions as a lower electrode of the thin film capacitor 20. As a material of the dielectric film 23, for example, a thin film of a ferroelectric ceramic such as barium titanate can be used. The thickness of the dielectric film 23 is, for example, about 1 μm. As the material of the first conductive film 21 and the second conductive film 22, a metal thin film can be used. The thickness of each of the first conductive film 21 and the second conductive film 22 is, for example, about 30 μm. The first conductive film 21 and the second conductive film 22 may be made of different materials. In the present embodiment, the first conductive film 21 mainly contains nickel, and the second conductive film 22 mainly contains copper.

  The first conductive film 21 of the thin film capacitor 20 is connected via a via 31 to a ground wiring 41 provided in the build-up layer 12. The second conductive film 22 of the thin film capacitor 20 is connected via a via 32 to a power wiring 42 provided in the build-up layer 12. The ground wiring 41 is connected via a via 33 to a ground terminal 51 provided on the surface of the base 10. The power supply wiring 42 is connected via a via 34 to a power supply terminal 52 provided on the surface of the base 10. That is, the first conductive film 21 of the thin film capacitor 20 is electrically connected to the ground terminal 51, and the second conductive film 22 of the thin film capacitor 20 is electrically connected to the power terminal 52. The thin film capacitor 20 forms a bypass path for bypassing noise current due to high frequency noise mixed into the power supply wiring 42 to the ground terminal 51.

  FIG. 2 is a plan view showing an example of a pattern of the first conductive film 21 forming the thin film capacitor 20. The first conductive film 21 is connected to the via 31 connected to the ground wiring 41 (see FIG. 1) at each of the connection portions 24 indicated by dotted lines in FIG. The first conductive film 21 has a slit (cut) 25 provided corresponding to each of the connection portions 24 with the via 31. One end of each of the slits 25 is arranged at the outer edge of the first conductive film 21, and the other end is arranged around (near) the connection portion 24 with the corresponding via 31. That is, each of the slits 25 extends from the outer edge of the first conductive film 21 to the periphery (near) of the connection portion 24 with the corresponding via 31. In the example shown in FIG. 2, one slit 25 is provided for one via 31. Each of the slits 25 extends straight from the outer edge of the first conductive film 21 toward the periphery (near) of the connection portion 24 with the corresponding via 31.

  FIG. 3 is a sectional view of the thin film capacitor 20 taken along line 3-3 in FIG. In FIG. 3, the path of the noise current In passing through the thin film capacitor 20 due to high-frequency noise is indicated by arrows. When high-frequency noise enters the power supply terminal (see FIG. 1), the noise current In due to the high-frequency noise passes through the bypass path formed by the thin film capacitor 20. The noise current In flows mainly along the surfaces of the first conductive film 21 and the second conductive film 22 due to the skin effect, and hardly flows inside the first conductive film 21 and the second conductive film 22. . Therefore, the noise current In that has reached the lower surface S1 of the first conductive film 21 via the second conductive film 22 and the dielectric film 23 is applied to the side surface S2 of each slit 25 formed in the first conductive film 21. Via the first conductive film 21 to the upper surface S3 of the first conductive film 21. After that, the noise current In flows along the upper surface S3 of the first conductive film 21 and reaches the ground terminal 51 (see FIG. 1) via the via 31 which is the shortest distance.

  Here, FIG. 4 is a cross-sectional view illustrating an example of a configuration of a circuit board 1X according to a comparative example. FIG. 5 is a plan view illustrating an example of a pattern of a first conductive film 21X of a thin film capacitor 20X included in a circuit board 1X according to a comparative example. FIG. 6 is a cross-sectional view of the thin-film capacitor 20X taken along line 6-6 in FIG. In FIG. 6, the path of the noise current In due to high-frequency noise passing through the thin film capacitor 20X is indicated by an arrow. As shown in FIG. 5, the first conductive film 21X of the thin film capacitor 20X according to the comparative example has no slit.

  As shown in FIG. 6, according to the configuration of the thin film capacitor 20X according to the comparative example, the noise current In reaching the lower surface S1 of the first conductive film 21 via the second conductive film 22 and the dielectric film 23 is small. Flows along the lower surface of the first conductive film 21 toward the outer edge of the first conductive film 21. Thereafter, the noise current In reaches the upper surface S3 via the side surface S4 of the first conductive film 21, flows along the upper surface S3, and passes through the shortest distance via 31 to the ground terminal 51 (see FIG. 4). Reach

  According to the circuit board 1X according to the comparative example, the noise current In flowing along the surface of the first conductive film 21 due to the skin effect is forced to pass through the side surface S4 of the first conductive film 21. Therefore, it is difficult to shorten the length of the path through which the noise current In passes (that is, the high-frequency noise bypass path), and it is difficult to reduce the impedance of the bypass path. For example, by disposing the via 31 near the outer edge of the first conductive film 21, the length of the bypass path can be reduced. However, the arrangement of the via 31 is restricted by, for example, the arrangement of signal wirings formed in the circuit board 1X, so that it is difficult to arrange the via 31 near the outer edge of the first conductive film 21. In some cases. Further, nickel can be suitably used as the material of the first conductive film 21 from the viewpoint of cost and ease of manufacturing. However, nickel has a higher electrical resistivity than copper, which is generally used as a wiring material of the circuit board 1. Therefore, when nickel is used as the material of the first conductive film 21, an increase in impedance due to an increase in the length of the bypass path becomes more remarkable.

  On the other hand, according to the circuit board 1 according to the embodiment of the disclosed technology, the first conductive film 21 has the slits 25 provided corresponding to each of the connection portions 24 to the vias 31. Each of the slits 25 extends from the outer edge of the first conductive film 21 to the periphery (near) of the connection portion 24 with the corresponding via 31. Accordingly, the noise current In caused by high-frequency noise passing through the thin film capacitor 20 can reach the via 31 located at the shortest distance via the side surface S2 of the slit 25. That is, all of the noise current In does not need to pass through the side surface of the first conductive film 21. According to the circuit board 1 according to the embodiment of the disclosed technology, it is possible to reduce the length of the high-frequency noise bypass path as compared to the circuit board 1X according to the comparative example, regardless of the arrangement of the vias 31. Yes, it is possible to reduce the impedance of the bypass path. This makes it possible to effectively remove high-frequency noise and effectively suppress fluctuations in the power supply voltage. According to the circuit board 1 according to the embodiment of the disclosed technology, when a material having a relatively high electric resistivity such as nickel is used as the material of the first conductive film 21, a more remarkable effect is exerted. .

  In this embodiment, the case where the number of the vias 31 connected to the first conductive film 21 is four is illustrated, but the number of the vias 31 connected to the first conductive film 21 is three or less or There may be five or more. Further, in the present embodiment, the case where the slit 25 is formed for each of the four vias 31 connected to the first conductive film 21 is illustrated, but the plurality of vias connected to the first conductive film 21 are formed. The slit 25 may be formed only on a part of the slit 31.

  FIG. 7 is a cross-sectional view illustrating an example of a configuration of a semiconductor module 100 according to an embodiment of the disclosed technology including the circuit board 1. The semiconductor module 100 has a semiconductor device 60 mounted on the circuit board 1.

  The circuit board 1 has a core layer 11 and build-up layers 12A and 12B provided on both surfaces of the core layer 11. The thin film capacitor 20 is disposed directly below the semiconductor device 60 inside the buildup layer 12A.

  On the surface of the circuit board 1, a ground terminal 51 that is electrically connected to the first conductive film 21 of the thin film capacitor 20 via a via 31, a ground wiring 41 and a via 33 is provided. A power supply terminal 52 is provided on the surface of the circuit board 1 and is electrically connected to the second conductive film 22 of the thin film capacitor 20 via the via 32, the power supply wiring 42 and the via 34.

  A plurality of bumps 61 are provided on the lower surface of the semiconductor device 60. The bump 61 functioning as a ground electrode is joined to the ground terminal 51 of the circuit board 1, and the bump 61 functioning as a power electrode is joined to the power terminal 52 of the circuit board 1. That is, the semiconductor device 60 is electrically connected to the thin film capacitor 20 via the ground terminal 51 and the power supply terminal 52.

  An underfill 62 that fills a gap between the bumps 61 is provided between the lower surface of the semiconductor device 60 and the circuit board 1. The underfill 62 is made of, for example, an insulator such as an epoxy resin. The semiconductor device 60 is covered with the lid 70, and the upper surface of the semiconductor device 60 is in contact with the lid 70. The lid 70 functions as a heat radiating member that protects the semiconductor device 60 and radiates heat generated from the semiconductor device 60 to the outside. On the lower surface of the circuit board 1, a plurality of bumps 80 are provided which are electrically connected to the wiring inside the circuit board 1.

  According to the semiconductor module 100 according to the embodiment of the disclosed technology, since the thin-film capacitor 20 is disposed immediately below the semiconductor device 60, a path (bypass path) through which the noise current In due to high-frequency noise mixed into the power supply wiring 42 passes. ) Can be minimized.

  FIG. 8 is a plan view illustrating an example of a pattern of the first conductive film 21 included in the thin film capacitor 20 according to the second embodiment of the disclosed technology. The first conductive film 21 is connected to the via connected to the ground wiring at each of the connection portions 24 indicated by the dotted lines in FIG.

  The first conductive film 21 has a slit 25 provided corresponding to each of the via connection portions 24. One end of each of the slits 25 is arranged at the outer edge of the first conductive film 21, and the other end is arranged around (near) the connection portion 24 with the corresponding via. That is, each of the slits 25 extends from the outer edge of the first conductive film 21 to the periphery (near) of the connection portion 24 with the corresponding via.

  In the present embodiment, two slits 25 are provided for one via 31. In other words, each of the two slits 25 corresponding to one via reaches the periphery of the connection portion 24 with the corresponding via from each of different positions on the outer edge of the first conductive film 21. Each of the slits 25 extends straight from the outer edge of the first conductive film 21 toward the periphery (near) of the connection portion 24 with the corresponding via 31.

  According to the circuit board including the thin film capacitor 20 according to the present embodiment, similarly to the circuit board 1 according to the first embodiment, the noise current due to the high frequency noise passing through the thin film capacitor 20 passes through the side surface of each slit 25. The shortest via can be reached. Therefore, it is possible to reduce the length of the bypass path for the high-frequency noise as compared to the circuit board 1 </ b> X according to the comparative example (see FIG. 4) irrespective of the via arrangement, and reduce the impedance of the bypass path. It is possible. By providing a plurality of slits 25 for one via 31, it is possible to further reduce the impedance of the bypass path.

  Here, a three-dimensional electromagnetic field simulation was performed for each of the models of the first conductive film 21 shown in FIGS. 9A to 9C, and the resistance and the inductance with respect to the high-frequency noise in each model were calculated. A model M1 shown in FIG. 9A is a model corresponding to the first conductive film 21 (see FIG. 2) of the thin-film capacitor 20 according to the first embodiment. A model M2 shown in FIG. 9B is a model corresponding to the first conductive film 21 (see FIG. 8) of the thin film capacitor 20 according to the second embodiment. A model M2 illustrated in FIG. 9C is a model corresponding to the first conductive film 21X (see FIG. 5) of the thin film capacitor 20X according to the comparative example.

  In each of the models M1 to M3, it was assumed that nickel was used as the material of the first conductive film 21M. In each of the models M1 to M3, the shape of the first conductive film 21M was a square plate having a thickness of 30 μm and a side of 3 mm. In each of the models M1 to M3, a via 31M is arranged at a position where the diagonal line of the first conductive film 21M is equally divided into three. The model M1 has a configuration in which one via 25M has one slit 25M. In the model M2, two slits 25M are provided for each via 31M. The model M3 has a structure having no slit. In the models M1 and M2, the slit width was 50 μm, and the distance between the slit end and the center of the via 31M was 50 μm.

  FIGS. 10A and 10B are graphs showing the results of a three-dimensional electromagnetic field simulation performed on each of the models M1 to M3. FIG. 10A is a graph showing the frequency characteristics of the resistance between the position corresponding to the position directly below the via 31M on the lower surface of the first conductive film 21M and the upper end of the via 31M. FIG. 10B is a graph showing the frequency characteristics of the inductance between the position corresponding to the position directly below the via 31M on the lower surface of the first conductive film 21M and the upper end of the via 31M.

  In the model M1 corresponding to the first conductive film 21 according to the first embodiment of the disclosed technology, the resistance to high-frequency noise of 1 GHz is higher than that of the model M3 corresponding to the first conductive film 21X according to the comparative example. 55%. Further, the inductance with respect to the high frequency noise of 1 GHz was reduced by 70% compared to the model M3.

  In the model M2 corresponding to the first conductive film 21 according to the second embodiment of the disclosed technology, the resistance to high frequency noise of 1 GHz is higher than that of the model M3 corresponding to the first conductive film 21X according to the comparative example. 64%. Further, the inductance with respect to the high frequency noise of 1 GHz is reduced by 74% compared to the model M3.

  As described above, the slit 25 extending from the outer edge to the periphery (near) of the connection portion 24 with the via 31 is provided in the first conductive film 21 forming the thin film capacitor 20 to reduce the impedance of the bypass path for high-frequency noise. It was verified that it could be reduced.

  By forming the slits 25 in the first conductive film 21, the area of the first conductive film 21 is reduced, and the capacitance of the thin film capacitor 20 is reduced. As a result, the high-frequency noise acts in a direction in which the impedance of the bypass path increases. According to the model M1, the capacitance of the thin-film capacitor 20 is reduced by about 2% with respect to the model M3, and according to the model M2, the capacitance of the thin-film capacitor 20 is reduced by about 4% with respect to the model M3. However, as is clear from the above simulation results, the formation of the slit 25 can reduce the resistance and inductance on the bypass path by several tens of percent, and sufficiently reduce the decrease in capacitance due to the formation of the slit 25. It is possible to make up.

  FIG. 11 is a plan view illustrating an example of a pattern of the first conductive film 21 included in the thin film capacitor 20 according to the third embodiment of the disclosed technology. The first conductive film 21 is connected to the via connected to the ground wiring at each of the connection portions 24 indicated by the dotted lines in FIG.

  The first conductive film 21 has a slit 25 provided corresponding to each of the via connection portions 24. One end of each of the slits 25 is arranged at the outer edge of the first conductive film 21, and the other end is arranged around (near) the connection portion 24 with the corresponding via. That is, each of the slits 25 extends from the outer edge of the first conductive film 21 to the periphery (near) of the connection portion 24 with the corresponding via. In the present embodiment, each of the slits 25 is bent. In the example shown in FIG. 11, each of the slits 25 has two bent portions 26, but each of the slits 25 may have one or three or more bent portions. Further, each of the slits 25 may have a curved portion (not shown) curved in a curved shape. Further, each of the slits 25 may have a meandering shape in which a plurality of bent portions or curved portions are continuous.

  According to the circuit board including the thin film capacitor 20 according to the present embodiment, similarly to the circuit board 1 according to the first embodiment, the noise current due to the high frequency noise passing through the thin film capacitor 20 passes through the side surface of each slit 25. The shortest via can be reached. Therefore, it is possible to reduce the length of the bypass path for the high-frequency noise as compared to the circuit board 1 </ b> X according to the comparative example (see FIG. 4) irrespective of the via arrangement, and reduce the impedance of the bypass path. It is possible. In addition, since each slit 25 is bent or curved, the total length of each slit can be made longer as compared with the case where each slit 25 is linear. Thereby, the impedance of the bypass path can be further reduced. Further, when a large number of vias are arranged and it is difficult to form each slit 25 in a straight line, each slit 25 can be formed by bending or bending.

  The circuit board 1 is an example of a circuit board according to the disclosed technology. The base 10 is an example of a base in the disclosed technology. The thin film capacitor 20 is an example of a laminate according to the disclosed technology. The first conductive film 21 is an example of the first conductive film in the disclosed technology. The second conductive film 22 is an example of the second conductive film in the disclosed technology. The dielectric film is an example of the dielectric film in the disclosed technology. The slit 25 is an example of the slit in the disclosed technology. The via 31 is an example of the conductive part and the first conductive part in the disclosed technology. The via 32 is an example of a second conductive portion in the disclosed technology. The ground terminal 51 is an example of a terminal and a first terminal in the disclosed technology. The power supply terminal 52 is an example of a second terminal in the disclosed technology. The semiconductor module 100 is an example of a semiconductor module according to the disclosed technology. The semiconductor device 60 is an example of a semiconductor device according to the disclosed technology.

  Regarding the first to fourth embodiments, the following supplementary notes are further disclosed.

(Appendix 1)
A laminate provided inside the base and including a first conductive film, a second conductive film, and a dielectric film interposed between the first conductive film and the second conductive film;
A conductive portion connected to the first conductive film;
Including
The circuit board, wherein the first conductive film has a slit extending from an outer edge of the first conductive film to a periphery of a connection portion with the conductive portion.

(Appendix 2)
The circuit board according to claim 1, wherein the first conductive film has a plurality of slits that reach the periphery of a connection portion with the conductive portion from each of different positions on an outer edge of the first conductive film.

(Appendix 3)
The circuit board according to claim 1 or 2, wherein the slit has a bent portion or a curved portion.

(Appendix 4)
The circuit board according to any one of supplementary notes 1 to 3, wherein a resistivity of the first conductive film is higher than a resistivity of the second conductive film.

(Appendix 5)
Further comprising a terminal provided on the surface of the base,
The circuit board according to any one of supplementary notes 1 to 4, wherein the first conductive film is electrically connected to the terminal via the conductive portion.

(Appendix 6)
A semiconductor module including a circuit board and a semiconductor device mounted on the circuit board,
The circuit board,
A laminate provided inside the base and including a first conductive film, a second conductive film, and a dielectric film interposed between the first conductive film and the second conductive film;
A first conductive portion connected to the first conductive film;
A second conductive portion connected to the second conductive film;
A first terminal provided on a surface of the base, and electrically connected to the first conductive film via the first conductive portion;
A second terminal provided on a surface of the base and electrically connected to the second conductive film via the second conductive portion;
Including
The first conductive film has a slit extending from an outer edge of the first conductive film to a periphery of a connection portion with the first conductive portion,
A semiconductor module, wherein the semiconductor device is connected to the first terminal and the second terminal.

(Appendix 7)
The semiconductor module according to supplementary note 6, wherein the first conductive film has a plurality of slits reaching from each of different positions on an outer edge of the first conductive film to a periphery of a connection portion with the conductive portion.

(Appendix 8)
The semiconductor module according to Supplementary Note 1 or 2, wherein the slit has a bent portion or a curved portion.

(Appendix 9)
The semiconductor module according to any one of supplementary notes 6 to 8, wherein a resistivity of the first conductive film is higher than a resistivity of the second conductive film.

(Appendix 10)
Further comprising a terminal provided on the surface of the base,
The semiconductor module according to any one of supplementary notes 6 to 9, wherein the first conductive film is electrically connected to the terminal via the conductive portion.

DESCRIPTION OF SYMBOLS 1 Circuit board 10 Base 20 Thin film capacitor 21 First conductive film 22 Second conductive film 23 Dielectric films 31, 32, 33, 34 Via 41 Ground wiring 42 Power wiring 51 Ground terminal 52 Power terminal 60 Semiconductor device 61 Bump 100 Semiconductor module

Claims (6)

A laminate provided inside the base and including a first conductive film, a second conductive film, and a dielectric film interposed between the first conductive film and the second conductive film;
A conductive portion connected to the first conductive film;
Including
The circuit board, wherein the first conductive film has a slit extending from an outer edge of the first conductive film to a periphery of a connection portion with the conductive portion. 2. The circuit board according to claim 1, wherein the first conductive film has a plurality of slits extending from each of different positions on an outer edge of the first conductive film to a periphery of a connection portion with the conductive portion. 3. The circuit board according to claim 1, wherein the slit has a bent portion or a curved portion. 4. The circuit board according to claim 1, wherein a resistivity of the first conductive film is higher than a resistivity of the second conductive film. 5. Further comprising a terminal provided on the surface of the base,
The circuit board according to any one of claims 1 to 4, wherein the first conductive film is electrically connected to the terminal via the conductive portion. A semiconductor module including a circuit board and a semiconductor device mounted on the circuit board,
The circuit board,
A laminate provided inside the base and including a first conductive film, a second conductive film, and a dielectric film sandwiched between the first conductive film and the second conductive film;
A first conductive portion connected to the first conductive film;
A second conductive portion connected to the second conductive film;
A first terminal provided on a surface of the base and electrically connected to the first conductive film through the first conductive portion;
A second terminal provided on a surface of the base and electrically connected to the second conductive film via the second conductive portion;
Including
The first conductive film has a slit extending from an outer edge of the first conductive film to a periphery of a connection portion with the first conductive portion,
A semiconductor module, wherein the semiconductor device is connected to the first terminal and the second terminal.