JP2019126228A - Control device for dc/dc converter - Google Patents

Abstract

To provide a control device for a DC/DC converter capable of reducing a current at the time when switching elements are turned off and thereby improving power conversion efficiency.SOLUTION: A DC/DC converter comprises: a transformer 100; a bridge circuit 70-1 that converts a DC voltage E1 into an AC voltage and supplies the AC voltage to a primary coil side of the transformer 100; and a bridge circuit 70-2 that rectifies the AC voltage supplied from a secondary coil side of the transformer 100 and outputs a DC voltage E2. A control device 200 calculates an off current value at the time when switching elements 71-82 in the bridge circuits 70-1 and 70-2 are turned off, and in a case where the off current value is positive, changes a switching frequency so as to reduce a phase difference between the primary coil and the secondary coil of the transformer 100.SELECTED DRAWING: Figure 1

Description

  The present invention performs on / off control of switching elements in a DC / DC converter (for example, a DAB (Dual Active Bridge) bidirectional DC / DC converter) that converts a DC (direct current) voltage into a desired DC voltage. It relates to a control device.

FIG. 17 is a circuit diagram showing a conventional three-phase DAB bidirectional DC / DC converter described in Patent Document 1 and the like.
The three-phase DAB bidirectional DC / DC converter is a converter that can be used bidirectionally, and includes a smoothing capacitor 1-1 to which a primary DC voltage E1 of the primary power P1 is applied, and a secondary side. And a smoothing capacitor 1-2 to which a secondary side DC voltage E2 of power P2 is applied. Between both electrodes of the capacitor 1-1, a primary side bridge circuit 10-1 with a resonance function for converting DC voltage and AC (AC) voltage to each other is connected, and between both electrodes of the capacitor 1-2 Also, a secondary side bridge circuit 10-2 with a resonance function that converts an AC voltage and a DC voltage to each other is connected.

  The primary side bridge circuit 10-1 is configured by connecting six switching elements (for example, MOS type FETs) 11, 12, 13, 14, 15, 16 in a full bridge form. Between the drain and source of each of the FETs 11-16, body diodes 11a-16a are connected in anti-parallel, and parasitic capacitances 11b-16b are connected in parallel. The secondary side bridge circuit 10-2 is also configured by connecting six switching elements (for example, MOS type FETs) 17, 18, 19, 20, 21 and 22 in a full bridge form. Also between the drain and source of each of the FETs 17 to 22, body diodes 17a to 22a are connected in antiparallel, and parasitic capacitances 17b to 22b are connected in parallel.

  Between the primary side bridge circuit 10-1 and the secondary side bridge circuit 10-2, three-phase inductors 31, 32, 33 for resonance with an inductance value L and a three-phase transformer for insulation between input and output ( Hereinafter, it is referred to as “Trans.” 40). An LC resonance circuit is configured by the parasitic capacitances 11 b to 16 b on the side of the FETs 11 to 16 and the inductors 31 to 33. The three-phase transformer 40 has three primary windings 41-1, 42-1 and 43-1 and three secondary windings 41-2, 42-2 and 43-2, which are Y-- It is connected by Y connection method. An LC resonance circuit is configured by the inductances of the secondary windings 41-2 to 43-2 and the parasitic capacitances 17b to 22b on the FETs 17 to 22 side.

  The bi-directional DC / DC converter is provided with a control device 50 for controlling the on / off operation of the FETs 11 to 22 in the primary side bridge circuit 10-1 and the secondary side bridge circuit 10-2. . The control device 50 outputs control signals S1 to S12 to be supplied to the gates of the FETs 11 and 22.

  In the bidirectional DC / DC converter having such a configuration, for example, when the primary side power P1 on the DC voltage E1 side is input and the secondary side power P2 on the DC voltage E2 side is supplied to the load on the secondary side, It works as follows.

The primary side DC voltage E1 of the input primary side power P1 is smoothed by the capacitor 1-1, and the smoothed DC voltage is turned on / off by the control signals S1 to S6. It is converted into an AC voltage by the FETs 11 to 16 in -1. The converted AC voltage is converted by the transformer 40. The AC voltage subjected to voltage conversion is controlled by the FETs 17 to 22 in the secondary bridge circuit 10-2 which is turned on / off by the control signals S7 to S22, or when the FETs 17 to 22 are in the OFF state It is converted into a DC voltage by the body diodes 17a to 22a. Thereafter, the capacitor is smoothed by the capacitor 1-2, and the desired secondary side power P2 of the DC voltage E2 is supplied to the load.
On the other hand, when the DC power P2 on the secondary side is input and supplied to the load on the primary side, the reverse operation to the above is performed.

JP 2012-65511 A

However, the conventional bidirectional DC / DC converter of FIG. 17 has the following problems.
In the Y-Y connection method in a three-phase DAB bidirectional DC / DC converter, for example, the number of turns of primary windings 41-1 to 43-1 and secondary windings 41-2 to 43-2 of transformer 40 Assuming that the ratio is 1: 1, the input power P to be converted is one of the AC voltage at the primary windings 41-1 to 43-1 and the AC voltage at the secondary windings 41-2 to 43-2. It becomes a function of the phase difference φ between the second order and the second order. Assuming that the DC voltages E1 and E2, the switching frequency f of the FETs 11 and 22, and the inductance value L are fixed, power control becomes possible by the phase difference φ.

In order to increase the input power P to be converted under the condition that the FETs 11 to 16 perform the zero-voltage-switching (hereinafter referred to as “ZVS”) operation, it is necessary to increase the phase difference φ. The current i flowing between the drain and the source when ~ 16 turns off also increases. The current i (for example, the outflow current from the inductors 31 to 33) at the time of turning off is regenerated to the DC voltage E1 side, but passes through the windings 41-1 to 43-1 and the FETs 11 to 16 at the time of regeneration. . Therefore, a conduction loss occurs, and when the current i when the FETs 11 to 16 are turned off is large, a loss proportional to the square of the current i occurs, which causes the power conversion efficiency to be deteriorated.
An object of the present invention is to provide a control device of a DC / DC converter which reduces the current when the switching element is turned off to improve the power conversion efficiency.

  According to the present invention, a transformer having a primary winding and a secondary winding and a plurality of first switching elements which are turned on / off by a plurality of first control signals are bridge-connected to convert a first DC voltage into an AC voltage. And a plurality of second switching elements, each of which is turned on / off by a plurality of second control signals, are bridge-connected to each other and supplied from the secondary winding side. And a second bridge circuit for rectifying the AC voltage to output a second DC voltage, the plurality of first control signals and the plurality of second control signals having a desired switching frequency, for the DC / DC converter. In a control device of a DC / DC converter that outputs and controls on / off operation of the plurality of first switching elements and the plurality of second switching elements, The control device determines an off current value when the first switching element or the second switching element is turned off, and when the off current value is positive, a value between the primary winding and the secondary winding is obtained. The switching frequency is changed to reduce the phase difference.

  According to the control device of the DC / DC converter of the present invention, the off current value when the switching element is turned off is determined, and when the off current value is positive, the phase difference between the first and second orders becomes smaller The switching frequency is changed. As a result, when the switching element is turned off, the current value flowing through the switching element is reduced, and the power conversion efficiency can be improved.

The circuit diagram of the DC / DC converter in Example 1 of this invention A functional block diagram showing a configuration of frequency control unit 210 in FIG. 1 Characteristic diagram showing input power P with respect to phase difference φ between first and second order in the DC / DC converter of FIG. 1 Characteristic diagram showing ZVS operating conditions of voltage ratio d (= E2 / E1) to phase difference φ between first and second order in the DC / DC converter of FIG. 1 Flow chart showing an example of control operation in the frequency control unit 210 of FIG. 2 Current-voltage waveform diagram of the primary side FETs 71 and 72 at the switching frequency f = 55 kHz in FIG. 1 Current-voltage waveform diagram of the primary side FETs 71 and 72 at the switching frequency f = 50 kHz in FIG. 1 Static characteristic diagram showing comparison of power conversion efficiency due to frequency change of FIG. 6 and FIG. 7 The circuit diagram which shows the DC / DC converter in Example 2 of this invention Characteristic diagram showing input power P with respect to phase difference φ between first and second order in the DC / DC converter of FIG. 9 Characteristic diagram showing ZVS operating conditions of voltage ratio d (= E2 / E1) to phase difference φ between first and second order in the DC / DC converter of FIG. 9 The circuit diagram which shows the DC / DC converter in Example 3 of this invention Characteristic diagram showing input power P with respect to phase difference φ between first and second order in the DC / DC converter of FIG. Characteristic diagram showing ZVS operating conditions of voltage ratio d (= E2 / E1) to phase difference φ between first and second order in the DC / DC converter of FIG. 12 Characteristic chart showing power comparison of Y-Y, Y-Δ, Δ-Δ connection method Characteristic chart showing comparison of ZVS operating conditions in Y-Y, Y-.DELTA., .DELTA .-. DELTA. Connection method Circuit diagram showing a conventional DC / DC converter

  The mode for carrying out the present invention will be apparent from the following description of the preferred embodiment, when read in conjunction with the attached drawings. However, the drawings are for the purpose of illustration only and do not limit the scope of the present invention.

(Configuration of Example 1)
FIG. 1 is a circuit diagram showing a DC / DC converter (for example, a three-phase DAB bidirectional DC / DC converter) according to a first embodiment of the present invention.
This three-phase DAB bidirectional DC / DC converter is a converter that can be used bi-directionally as in the conventional FIG. 17, and is applied with the first DC voltage E1 of the primary side (for example, storage battery side) power P1. And a smoothing capacitor 62 to which a second DC voltage E2 of the power P2 on the secondary side (for example, the DC link side) is applied. A first bridge circuit (for example, a primary side bridge circuit) 70-1 with a resonance function that converts DC voltage and AC voltage mutually is connected between both electrodes of the capacitor 61. Also, a second bridge circuit (for example, a secondary-side bridge circuit) 70-2 with a resonance function that mutually converts an AC voltage and a DC voltage is connected.

  The primary side bridge circuit 70-1 includes six first switching elements (for example, MOS type FETs) 71, 72, 73, 74, 75, 76, a u-phase connection point u1, a v-phase connection point v1, and and w connection points w1 of w phases, which are connected in a full bridge form. That is, FET 71, u-phase connection point u1 and FET 72 are connected in series, FET 73, v-phase connection point v1 and FET 74 are connected in series, and FET 75, w-phase connection point w1 and FET 76 are connected in series And their respective series circuits are connected in parallel to the capacitor 61. Between the drain and source of each of the FETs 71 to 76, body diodes 71a to 76a are respectively connected in antiparallel and parasitic capacitances 71b to 76b are respectively connected in parallel.

  The secondary side bridge circuit 70-2 also has six second switching elements (for example, MOS type FETs) 77, 78, 79, 80, 81, 82, a u-phase connection point u2, a v-phase connection point v2, and and w connection points w2 of the w phase, which are connected in a full bridge form. That is, FET 77, u-phase connection point u2 and FET 78 are connected in series, FET 79, v-phase connection point v2 and FET 80 are connected in series, and FET 81, w-phase connection point w2 and FET 82 are connected in series And their respective series circuits are connected in parallel to the capacitor 62. Between the drain and source of each of the FETs 77 to 82, body diodes 77a to 82a are respectively connected in antiparallel and parasitic capacitances 77b to 82b are respectively connected in parallel.

  Three-phase for resonance of inductance value L between connection points u1, v1, w1 in primary side bridge circuit 70-1 and connection points u2, v2, w2 in secondary side bridge circuit 70-2. The inductors 91, 92, 93 and the three-phase transformer 100 for insulation between input and output are connected. An LC resonance circuit is configured by the parasitic capacitances 71b to 76b on the side of the FETs 71 to 76 and the inductors 91 to 93.

  The three-phase transformer 100 has three primary windings 111, 112, 113 and three secondary windings 121, 122, 123, which are connected by a Y-Y connection method. The start of winding (black dots in FIG. 1) of each primary winding 111, 112, 113 is connected to each inductor 91, 92, 93, and the end of winding of each primary winding 111, 112, 113 It is connected to the. The start of winding of each secondary winding 121, 122, 123 is connected to each connection point u2, v2, w2 in the secondary side bridge circuit 70-2, and the winding of each secondary winding 121, 122, 123 is performed. The ends are connected to each other. An LC resonance circuit is configured by the inductances of the secondary windings 121, 122, and 123 and the parasitic capacitances 77b to 82b on the FETs 77 to 82 side.

  The bi-directional DC / DC converter includes first control signals S11 to S16 for controlling on / off operations of the FETs 71 to 82 in the primary bridge circuit 70-1 and the secondary bridge circuit 70-2. A control device 200 that generates the second control signals S17 to S22 is provided. The controller 200 controls the switching frequency of the FETs 71 to 82 to generate the frequency control signal S210, and the primary power P1 on the DC voltage E1 side or the secondary power P2 on the DC voltage E2 side. A constant power control unit 220 that generates a constant power control signal S220 for controlling to a constant power, and outputs of the frequency control unit 210 and the constant power control unit 220 are connected to the frequency control signal S210 or the constant power control signal S220. And driving unit 230 for generating switching control signals S11 to S22.

  The frequency control unit 210 detects the primary side DC voltage E1 detected by a voltage detector etc. not shown, the secondary DC voltage E2 detected by a voltage detector etc. not shown, a phase detector etc. not shown It flows between the drain and the source when the FETs 71 to 82 are turned off based on the first-secondary phase difference φ, the switching frequency f detected by a frequency detector (not shown), and the inductance value L of the inductors 91 to 93. It has a function of calculating the current i, determining the switching frequency f that maximizes the power conversion efficiency, and outputting the frequency control signal S210. The constant power control unit 220 performs feedback control calculation of the phase difference φ between the first and second order (eg, proportional) to make the error power ΔP between the primary power P1 or the secondary power P2 and the target power Pref zero. Integral (PI) control calculation etc. is performed to generate a constant power control signal S220 such that the primary side power P1 or the secondary side P2 matches the target power Pref. The frequency control unit 210 and the constant power control unit 220 are configured by, for example, a processor such as a programmable digital signal processor (DSP) using a central processing unit (CPU) or an individual circuit.

  The driving unit 230 has a function of generating the control signals S11 to S22 for switching by driving the frequency control signal S210 or the constant voltage control signal S220 and supplying the control signals S11 to S22 to the gates of the FETs 71 to 82. The drive unit 230 is configured of a transistor or the like.

FIG. 2 is a functional block diagram showing a configuration of frequency control unit 210 in FIG.
The frequency control unit 210 calculates a power conversion efficiency between the first order and the second order, a power conversion efficiency calculation unit 211, and a current value positive / negative judgment unit 212 which judges the positive / negative of the off current value flowing when the FETs 71-82 turn off. A frequency adjustment unit 213 that increases / decreases the switching frequency f by a fixed value α, and an efficiency variation determination unit 214 that determines whether the power conversion efficiency is rising, and they mutually communicate via the bus 210a. It is connected.

  The power conversion efficiency calculation unit 211 includes first, second, and second power conversion efficiency calculation units 211a, 211b, and 211c. The first power conversion efficiency calculation unit 211a performs the first power conversion based on the current and voltage on the primary DC voltage E1 side and the secondary DC voltage E2 side detected by a current detector or voltage detector not shown. It has a function of calculating the efficiency and outputting the first power conversion efficiency calculation result. The second power conversion efficiency calculation unit 211b has a function of calculating the second power conversion efficiency when the switching frequency f is lowered by a fixed value α based on the current and voltage on the DC voltages E1 and E2 side. . Furthermore, the third power conversion efficiency calculation unit 211c has a function of calculating the third power conversion efficiency when the switching frequency f is increased by a fixed value α, based on the current and voltage on the DC voltages E1 and E2 side. ing.

  The current value positive / negative determination unit 212 determines the off current value when the first power conversion efficiency calculation result is output, the primary DC voltage E1, the secondary DC voltage E2, the phase difference φ, the switching frequency f, and the like. Based on the inductance value L of the inductors 91 to 93, it is determined whether the calculated off current value is positive or negative to obtain a positive / negative determination result. If the positive / negative determination result is negative, the first power conversion efficiency calculation unit It has a function to calculate the first power conversion efficiency with respect to 211a.

  The frequency adjustment unit 213 includes first and second frequency adjustment units 213a and 213b, and the efficiency variation determination unit 214 further includes first and second efficiency variation determination units 214a and 214b.

  The first frequency adjustment unit 213a has a function of decreasing the switching frequency f by a fixed value α when the positive / negative determination result is positive. The second frequency adjustment unit 213 b has a function of increasing the switching frequency f by a fixed value α when the efficiency change result by the first efficiency change determination unit 214 a is falling. The first efficiency change determination unit 214a determines the increase or decrease of the second power conversion efficiency by the second power conversion efficiency calculation unit 211b to obtain a first efficiency change determination result, and the first efficiency change determination result is an increase. In this case, it has a function of causing the first frequency adjustment unit 213a to lower the switching frequency f by a fixed value α.

  Furthermore, the second efficiency variation determination unit 214b determines the increase or decrease of the third power conversion efficiency to obtain the second efficiency variation determination result, and when the second efficiency variation determination result is an increase, the second frequency is determined. A function to cause the adjustment unit 213b to increase the switching frequency f by a fixed value α and to cause the first power conversion efficiency calculation unit 211a to calculate the first power conversion efficiency when the second efficiency fluctuation determination result is falling have.

(Constant Power Control Operation of Embodiment 1)
For example, a constant power operation in the case where the primary side power P1 on the DC voltage E1 side is input and the fixed secondary side power P2 on the DC voltage E2 side is supplied to the load will be described.

  After startup of the DC / DC converter, the constant power control unit 220 in the control device 200 determines 2 from the secondary side DC voltage E2 and the secondary side DC current detected by the voltage detector and the current detector not shown. Feedback control calculation of the phase difference φ between the 1st and 2nd order that makes the error power ΔP of the next-side power P2 and the target power Pref transmitted from the primary side to the secondary side zero (for example, PI control calculation And the like, and outputs a constant power control signal S220 to the drive unit 230 such that the secondary power P2 matches the target power Pref. The driving unit 230 drives the constant power control signal S220 to generate switching control signals S11 to S22, and turns on / off the FETs 71 to 82. Thus, constant power control is performed such that the primary-secondary phase difference φ changes and the secondary power P2 that matches the target power Pref is supplied to the load on the secondary side.

  For example, the control signals S11 and S14 are high level (hereinafter referred to as "H level"), and the control signals S12, S13, S15 and S16 are low level (hereinafter referred to as "L level"), and the control signals S17 and S20. Is at H level, and the control signals S18, S19, S21 and S22 are at L level.

  The DC voltage E1 of the input primary side power P1 is smoothed by the capacitor 61, and the positive electrode of the capacitor 61 → the drain / source of the FET 71 on the primary side → the connection point u1 → inductor 91 → the primary winding of the transformer 100 111, 112 → inductor 92 → connection point v1 → drain / source of FET 74 → current i1 flows to the negative electrode of the capacitor 61. When the current i1 flows through the primary windings 111 and 112 of the transformer 100, an exciting current is induced in the secondary windings 121 and 122, and the winding start of this secondary winding 121 → connection point u2 → FET 77 on the secondary side → The capacitor 62 → the FET 80 → the connection point v 2 → the winding end of the secondary winding 122 From the winding end to the end → the winding end of the secondary winding 121, the current i 2 flows. Thereby, a fixed secondary side power P2 is supplied to the load on the secondary side.

  Next, control signals S12 and S13 attain H level, control signals S11, S14, S15 and S16 attain L level, control signals S18 and S19 attain H level, and control signals S17, S20, S21 and S22 attain L level. Become.

  + Electrode of the capacitor 61 → FET 73 on the primary side → connection point v 1 → inductor 92 → end of winding of the primary winding 112 → end of winding of the primary winding 111 → start of winding from the end of winding of the primary winding 111 → inductor 91 → connection point u 1 → A current i1 flows from the FET 72 to the negative electrode of the capacitor 61. When the current i1 flows through the primary windings 111 and 112 of the transformer 100, an excitation current is induced in the secondary windings 121 and 122, and the winding end of the secondary winding 121 → the winding end of the secondary winding 122 Current i2 flows from the winding start → the connection point v2 → the secondary side FET 79 → the capacitor 62 → the FET 78 → the connection point u2 → the winding start of the secondary winding 121. Thereby, a fixed secondary side power P2 is supplied to the load on the secondary side.

(Frequency control operation of the first embodiment)
In the DC / DC converter of FIG. 1, for example, assuming that the turns ratio of the primary windings 111 to 113 and the secondary windings 121 to 123 of the transformer 100 is 1: 1, the input power P to be converted is the primary It becomes a function of the phase difference φ between the primary and the secondary of the AC voltage on the winding 111 to 113 side and the AC voltage on the secondary winding 121 to 123 side, and is given by the following equations (1) and (2).

(When φ = 0 to 60 °)
P = [(E1 × E2) / (360 × f × L)] × [φ (240−φ) / 360]
... (1)
(When φ = 60 ° to 120 °)
P = [(E1 × E2) / (360 × f × L)] × [(− φ ² + 180φ-1800) / 180] (2)
Where f: switching frequency of FETs 71-82
L: Each inductance value of the inductors 91 to 93

Assuming that the DC voltages E1 and E2, the switching frequency f, and the inductance value L are fixed, power control can be performed by the phase difference φ. Also, the current i flowing between the drain and the source when the FETs 71 to 82 are turned off is
In the case of FETs 71 to 76 on the primary side (when φ = 0 to 60 °)
i = [1 / (360 × f × L)] × [(120E1 + (φ−120) E2) / 3] (3)
(When φ = 60 to 120 °)
i = [1 / (360 × f × L)] × [(120E1 + (2φ−180) E2) / 3] (4)
In the case of FET 77 to 82 on the secondary side (when φ = 0 to 60 °)
i = [1 / (360 × f × L)] × {[(120−φ) E1-120E2] / 3} (5)
(When φ = 60 to 120 °)
i = [1 / (360 × f × L)] × {[(2φ−180) E1 + 120E2] / 3} (6)
Is represented by

FIG. 3 is a characteristic diagram showing the input power P with respect to the first-secondary phase difference φ (°) in the DC / DC converter having the transformer 100 of the Y-Y connection system of FIG.
In FIG. 3, d1 to d7 curves of voltage ratio d (= E2 / E1) when the input power P with the DC voltage E2 = E1 and the phase difference φ = 90 ° is 1 are drawn. In the voltage ratio d, d1 curve = 0.14, d2 curve = 0.29, d3 curve = 0.5, d4 curve = 0.57, d5 curve = 1, d6 curve = 1.43, d7 curve = 2 is there. As the voltage ratio d increases, the input power P increases.

In the ZVS operating range of the primary side FETs 71 to 76 and the secondary side FETs 77 to 82, the ZVS operating condition of the primary side FETs 71 to 76 is
(When φ = 0 to 60 °)
φ> 120 (1-1 / d)
(When φ 60-120 °)
φ> 90 (1-2 / (3d))
Is represented by

The ZVS operating conditions of the secondary side FETs 77 to 82 are
(When φ = 0 to 60 °)
φ> 120 (1-d)
(When φ = 60 to 120 °)
φ> 90 (1- (2d) / 3)
Is represented by

FIG. 4 shows ZVS operating conditions of voltage ratio d (= E2 / E1) with respect to phase difference φ (°) between the 1st order and the 2nd order in the DC / DC converter having the transformer 100 of Y—Y connection system of FIG. FIG.
In FIG. 4, reference numeral 241 denotes a primary side boundary YY curve, and reference numeral 242 denotes a secondary side boundary YY curve. The valley-shaped area surrounded by the two primary side boundary Y-Y curves 241 and 241 is an area outside the ZVS of the primary side FETs 71 to 76, and the two secondary side boundary Y-Y curves 242 , And 242 are regions outside the ZVS of the secondary side FETs 77 to 82. The area of the two triangles on the left and right surrounded by the primary side boundary YY curve 241 and the secondary side boundary YY curve 242 is the ZVS operation region of the primary and secondary side FETs 71 to 76, 77 to 82. It is.

  In FIG. 4, in the primary side DC voltage E1 and the secondary side DC voltage E2, the FETs 77 to 82 on the low voltage side cause ZVS deviation, but the sign of the current i in the equations (5) and (6) is positive. Under the following conditions, the FETs 77 to 82 perform the ZVS operation.

  In order to increase the input power P to be converted under the conditions that the FETs 71 to 76, 77 to 82 perform the ZVS operation, it is necessary to increase the phase difference φ from the equations (1) and (2). From the equations (3), (4), (5), (6), the current (off current) i when the FETs 71 to 76, 77 to 82 are turned off also increases. The current i (for example, the outflow current from the inductors 91 to 93) when turned off is regenerated to the DC voltage E1 side, but passes through the windings 111 to 113 and the FETs 71 to 76 at the time of regeneration. Therefore, when the conduction loss occurs, and the current i is large when the FETs 71 to 76 are turned off, a loss is generated in proportion to the square of the current i, and therefore the power conversion efficiency is increased as described in the conventional problem. It will cause deterioration.

  Therefore, in the first embodiment, under the condition that the FETs 71 to 76, 77 to 82 perform the ZVS operation, the problem of the power conversion efficiency deterioration due to the current increase when the FETs 71 to 76, 77 to 82 turn off is the conventional problem. The frequency control unit 210 changes the switching frequency f to improve the frequency.

  From the equations (1) and (2), if the converted power is the same, the phase difference φ can be reduced by lowering the switching frequency f. By reducing the phase difference φ, the currents i to 76 are turned off depending on the conditions of the DC voltages E1 and E2 by the equations (3), (4), (5) and (6). Can be made smaller.

  For example, assuming that the primary side DC voltage E1 = 264 V, the secondary side DC voltage E2 = 350 V, the switching frequency f = 55 kHz, and the inductance value L = 13 μH, and the input power P = 11 kW, the phase difference φ = 62 °. At this time, the current i when the FETs 71 to 76 on the primary side are off is φ = 60 to 120 °, and therefore given by the equation (4), the current i becomes 15.6A. The current i when the FETs 77 to 82 on the secondary side turn off is i = 35.2 A according to the equation (6).

  Here, assuming that the switching frequency f = 50 kHz, the phase difference φ = 53.9 °, and the current i when the FETs 71 to 76 on the primary side are turned off has a phase difference φ = 0 to 60 °. Given), i = 12.2A. The current i when the FETs 77 to 82 on the secondary side turn off is i = 35.0 A according to equation (5).

  The DC voltage E1, E2 used, the phase difference φ, the switching frequency f, and the inductance value L determine the current i when the FETs 71 to 76, 77 to 82 turn off, and when this current value is positive, the frequency control unit By controlling the switching frequency f by 210, it is possible to reduce the current i when the FETs 71 to 76, 77 to 82 are turned off, and to reduce the loss that occurs when the current i is regenerated to the DC voltage E1, E2. be able to. By controlling the switching frequency f so that the current i in the equation (3), (4) or the equations (5), (6) becomes zero, the current i regenerated to the DC voltage E1, E2 side becomes zero. And the losses due to controlling the switching frequency f can be minimized.

FIG. 5 is a flowchart showing an example of control operation of the switching frequency f in the frequency control unit 210 of FIG.
In the flowchart of FIG. 5, an operation example is illustrated in which the frequency control unit 210 executes steps ST1 to ST9 to control the switching frequency f to reduce the loss.

  In step ST1, when the frequency control unit 210 starts operation, it proceeds to the efficiency calculation process of step ST2. In step ST2, the first power conversion efficiency calculation unit 211a calculates the current value (i) at the time when the FETs 71 to 76, 77 to 82 are turned off, the current DC voltages E1 and E2, the phase difference φ, the switching frequency f, The first power conversion efficiency is calculated by calculation using the inductance value L, and the process proceeds to a process of determining whether the current value (i) is positive or negative in step ST3. In step ST3, the current value positive / negative determination unit 212 determines whether the current value (i) is positive or negative, and if the current value (i) is positive (Yes), the FETs 71 to 76 (or 77 to 82) perform ZVS. Therefore, when the current value (i) is not positive (No), since the FETs 71 to 76 (or 77 to 82) are out of the ZVS operation, the step proceeds to step ST4. Return to ST1.

  In step ST4, since the FETs 71 to 76 (or 77 to 82) are operating at ZVS, the first frequency adjustment unit 213a decreases the switching frequency f by a fixed value α, and proceeds to the efficiency calculation process of step ST5. In step ST5, the second power conversion efficiency calculation unit 211b calculates the second power conversion efficiency when the switching frequency f is lowered by a fixed value α, using the current and voltage on the DC voltages E1 and E2 side, and step ST6. The second power conversion efficiency increase determination processing of In step ST6, the first efficiency variation determination unit 214a determines whether or not the second power conversion efficiency is rising, and if it is rising (Yes), the process returns to step ST4, and the first frequency adjustment unit 213a The switching frequency f is lowered again, and in step ST5, the second power conversion efficiency is calculated by the second power conversion efficiency calculating unit 211b.

  As a result of the determination in step ST6, when the power conversion efficiency is decreasing (No), the process proceeds to the switching frequency addition process in step ST7. In step ST7, the second frequency adjustment unit 213b adds the switching frequency f by a constant value α to raise the switching frequency f, and proceeds to the efficiency calculation process of step ST8. In step ST8, the third power conversion efficiency calculation unit 211c calculates the third power conversion efficiency when the switching frequency f is increased by a fixed value α using the current and voltage on the DC voltages E1 and E2 side, and step ST9. The third power conversion efficiency increase determination processing of

In step ST9, the second efficiency fluctuation determination unit 214b determines whether the third power conversion efficiency is rising, and if it is rising (Yes), the process returns to step ST7, and the second frequency adjustment unit 213b The switching frequency f is raised again, and in step ST8, the third power conversion efficiency is calculated by the third power conversion efficiency calculation unit 211c. If the third power conversion efficiency is decreasing (No) based on the second efficiency change determination result of step ST9, the process returns to step ST1 and repeats the processes of steps ST2 to ST9.
Thus, by controlling the switching frequency f by the frequency control unit 210, the power conversion operation can be performed in the state where the power conversion efficiency is the highest.

(Effect of Example 1)
6 shows the currents of the primary side FETs 71 and 72 when DC voltage E1 = 264 V, DC voltage E2 = 350 V, input power P = 11 kW, and switching frequency f = 55 kHz using the DC / DC converter of FIG. It is a voltage waveform figure.
7, similarly to FIG. 6, using the DC / DC converter of FIG. 1, DC voltage E1 = 264 V, DC voltage E2 = 350 V, input power P = 11 kW, and switching frequency f = 50 kHz different from FIG. It is a current-voltage waveform figure of primary side FET71, 72 when having done.

6 and 7, the time axis of the horizontal axis is 5 μsec / 1 division (div). In the current / voltage values on the vertical axis, waveform CH1 is the drain-source voltage Vds of FET 71 = 200 V / div, waveform CH2 is the drain current Id of FET 71 = 20 A / div, waveform CH3 is the drain-source voltage V FETs of FET 72 = The drain current Id of the FET 72 is 200 A / div and the waveform CH 4 is 200 V / div.
Comparing FIG. 6 and FIG. 7, it can be seen that when the switching frequency f is lowered from 55 kHz in FIG. 6 to 50 kHz in FIG. 7, the waveform CH2 of the drain current Id in FIG. .

FIG. 8 is a static characteristic diagram showing a comparison of the power conversion efficiency due to the frequency change of FIG. 6 and FIG.
As shown in FIG. 8, the phase difference φ is reduced from 75 ° to 61.3 ° by decreasing the switching frequency f from 55 kHz to 50 kHz. Furthermore, as indicated by the reference numeral 250 of the waveform CH2 of the drain current Id in FIG. 7, the drain current Id decreases when the FET 71 is turned off. This confirms that the power conversion efficiency has been improved from 94.60% to 95.34%.
As described above, according to the control device 200 of the first embodiment, the current i is reduced when the FETs 71 to 82 are turned off, so that the power conversion efficiency can be improved.

(Configuration of Example 2)
FIG. 9 is a circuit diagram showing a DC / DC converter (for example, a three-phase DAB bidirectional DC / DC converter) according to a second embodiment of the present invention.
In this three-phase DAB bidirectional DC / DC converter, a three-phase transformer 100A of the Δ-Δ connection system is provided in place of the three-phase transformer 100 of the Y-Y connection system in FIG. There is. Similar to the three-phase transformer 100 of the first embodiment, the three-phase transformer 100A has three primary windings 111 to 113 and three secondary windings 121 to 123.

The winding start of the primary winding 111 is connected to the other end of the inductor 91, and the winding end of the primary winding 111 is connected to one end of the inductor 92. The winding start of the primary winding 112 is connected to the other end of the inductor 92, and the winding end of the primary winding 112 is connected to one end of the inductor 93. The winding start of the primary winding 113 is connected to the other end of the inductor 93, and the winding end of the primary winding 113 is connected to one end of the inductor 91. Furthermore, the winding start of the secondary winding 121 is connected to the winding end of the secondary winding 123, and the winding end of the secondary winding 121 is connected to the winding start of the secondary winding 122. The winding end of the secondary winding 122 is connected to the winding start of the secondary winding 123.
The other configuration is the same as that of the first embodiment.

(Frequency control operation of the second embodiment)
In the DC / DC converter of FIG. 9, for example, assuming that the turns ratio of the primary windings 111 to 113 and the secondary windings 121 to 123 of the transformer 100A is 1: 1, the input power P to be converted is the primary It becomes a function of the phase difference φ between the primary and the secondary of the AC voltage at the windings 111 to 113 and the AC voltage at the secondary windings 121 to 123, and is given by the following equations (7) and (8).

(When φ = 0 to 60 °)
P = [(E1 × E2) / (360 × f × L)] × [φ (240-φ) / 120]
... (7)
(When φ = 60 ° to 120 °)
P = [(E1 × E2) / (360 × f × L)] × [(− φ ² + 180φ-1800) / 60] (8)
Where f: switching frequency of FETs 71-82
L: Each inductance value of the inductors 91 to 93 If the DC voltages E1 and E2, the switching frequency f and the inductance value L are fixed as in the first embodiment, the power control can be performed by the phase difference φ.

FIG. 10 is a characteristic diagram showing input power P with respect to phase difference φ (°) between the first order and the second order in the DC / DC converter having the transformer 100A of the Δ-Δ connection system of FIG.
In FIG. 10, d1 to d7 curves of voltage ratios d (= E2 / E1) when the power of the DC voltage E2 = E1 and the phase difference φ = 90 ° is 1 are drawn as in FIG. In the voltage ratio d, d1 curve = 0.14, d2 curve = 0.29, d3 curve = 0.5, d4 curve = 0.57, d5 curve = 1, d6 curve = 1.43, d7 curve = 2 is there. As the voltage ratio d increases, the input power P increases.
In the ZVS operating range of the primary side FETs 71 to 76 and the secondary side FETs 77 to 82, the ZVS operating conditions of the primary side FETs 71 to 76 and the ZVS operating conditions of the secondary side FETs 77 to 82 are the same as in the first embodiment. is there.

FIG. 11 shows ZVS operating conditions of voltage ratio d (= E2 / E1) with respect to phase difference φ (°) between the 1st order and the 2nd order in the DC / DC converter having the transformer 100A of the Δ-Δ connection method of FIG. FIG.
This FIG. 11 has substantially the same characteristics as FIG. 4 of the first embodiment.

  In the second embodiment, as in the first embodiment, under the condition that the FETs 71 to 76, 77 to 82 perform the ZVS operation, the power due to the current increase when the FETs 71 to 76, 77 to 82 are turned off is the conventional problem. In order to improve the problem of the conversion efficiency deterioration, the switching frequency f is made variable by the frequency control unit 210 similar to that of the first embodiment.

(Effect of Example 2)
In the second embodiment, as in the first embodiment, since the switching frequency f is controlled by the frequency control unit 210, the power conversion operation can be performed in the state where the power conversion efficiency is the highest.

(Configuration of Example 3)
FIG. 12 is a circuit diagram showing a DC / DC converter (for example, a three-phase DAB bidirectional DC / DC converter) according to a third embodiment of the present invention.
In this three-phase DAB bidirectional DC / DC converter, a Y-.DELTA. Connection three-phase transformer 100B is provided in place of the Y-Y connection three-phase transformer 100 in FIG. 1 of the first embodiment. There is. Similar to the three-phase transformer 100 according to the first embodiment, the three-phase transformer 100B includes three primary windings 111 to 113 and three secondary windings 121 to 123.

The winding start of the primary winding 111 is connected to the inductor 91, and the winding end of the primary winding 111 is connected to the winding ends of the primary windings 112 and 113. The winding start of the primary winding 112 is connected to the inductor 92, and the winding start of the primary winding 113 is also connected to the inductor 93. Furthermore, the winding start of the secondary winding 121 is connected to the winding end of the secondary winding 123, and the winding end of the secondary winding 121 is connected to the winding start of the secondary winding 122. The winding end of the secondary winding 122 is connected to the winding start of the secondary winding 123.
The other configuration is the same as that of the first embodiment.

(Frequency control operation of the third embodiment)
In the DC / DC converter of FIG. 12, for example, assuming that the turns ratio of the primary windings 111 to 113 and the secondary windings 121 to 123 of the transformer 100B is 1: 1, the input power P to be converted is the primary It becomes a function of the phase difference φ between the primary and the secondary of the AC voltage on the winding 111 to 113 side and the AC voltage on the secondary winding 121 to 123 side, and is given by the following equations (9) and (10).

(When φ = 0 to 60 °)
P = [(E1 × E2) / (360 × f × L)] × [φ-30] (9)
(When φ = 60 ° to 120 °)
P = [(E1 × E2) / (360 × f × L)] × [(− φ ² + 240φ-7200) / 120] (10)
Where f: switching frequency of FETs 71-82
L: Each inductance value of the inductors 91 to 93 If the DC voltages E1 and E2, the switching frequency f and the inductance value L are fixed as in the first embodiment, the power control can be performed by the phase difference φ.

FIG. 13 is a characteristic diagram showing the input power P with respect to the phase difference φ (°) between the first order and the second order in the DC / DC converter having the transformer 100B of the Y-Δ connection system of FIG.
In FIG. 13, similarly to FIG. 3, d1 to d7 curves of voltage ratio d (= E2 / E1) when power of DC voltage E2 = E1 and phase difference φ = 90 ° is 1 are drawn. In the voltage ratio d, d1 curve = 0.14, d2 curve = 0.29, d3 curve = 0.5, d4 curve = 0.57, d5 curve = 1, d6 curve = 1.43, d7 curve = 2 is there. In the region where the phase difference φ is 30 ° or more, the input power P increases as the voltage ratio d increases.

  In the ZVS operating range of the primary side FETs 71 to 76 and the secondary side FETs 77 to 82, the ZVS operating conditions of the primary side FETs 71 to 76 and the ZVS operating conditions of the secondary side FETs 77 to 82 are the same as in the first embodiment. is there.

FIG. 14 shows ZVS operating conditions of voltage ratio d (= E2 / E1) with respect to phase difference φ (°) between the 1st order and the 2nd order in the DC / DC converter having the transformer 100B of Y-Δ connection method of FIG. FIG.
In FIG. 14, reference numeral 243 denotes a primary side boundary Δ-Y curve, and reference numeral 244 denotes a secondary side boundary Δ-Y curve.

  The primary / secondary winding ratio 1: 0.583 of the transformer 100 B, the voltage ratio d = E1 / 0.583 E 2, and the phase difference φ transitions to (φ−30 °). An inverted trapezoidal area surrounded by the primary side boundary Δ-Y curve 243 is an area outside the ZVS of the primary side FETs 71 to 76, and a trapezoidal area surrounded by the secondary side boundary Δ-Y curve 244 is , An area outside the ZVS of the secondary side FETs 77-82. The area between the inverted trapezoidal area and the trapezoidal area is the ZVS operation area of the primary and secondary FETs 71 to 76, and 77 to 82. ZVS operation is performed in the entire output voltage range of ± 14%.

  In FIG. 14, in the primary side DC voltage E1 and the secondary side DC voltage E2, the FETs 77 to 82 on the low voltage side cause the ZVS deviation, as in the first embodiment. Under the condition that the sign of the current i in the equations (5) and (6) is positive, the FETs 77 to 82 perform the ZVS operation.

  In the third embodiment, as in the first embodiment, under the condition that the FETs 71 to 76, 77 to 82 perform the ZVS operation, the power by the increase in current when the FETs 71 to 76, 77 to 82 are turned off is the conventional problem. In order to improve the problem of the conversion efficiency deterioration, the switching frequency f is changed by the frequency control unit 210 similar to that of the first embodiment.

(Effect of Example 3)
In the third embodiment, as in the first embodiment, since the switching frequency f is controlled by the frequency control unit 210, the power conversion operation can be performed in the state where the power conversion efficiency is the highest.

Comparison of Examples 1 to 3
The DC / DC converter of the first embodiment having the Y-Y connection type transformer 100, the DC / DC converter of the second embodiment having the Δ-Δ connection type transformer 100A, and the Y-Δ connection type transformer 100B The DC / DC converter of Example 3 is compared.

(1) Power conversion ratio In the same circuit and switching frequency f, the second embodiment of the Δ-Δ connection system can perform three times as much power conversion as the first embodiment of the Y-Y connection system. When obtaining the same input power P, the inductors 91 to 93 of the second embodiment can be miniaturized to 1/3 compared to the first embodiment. In the case of the third embodiment of the Y-Δ connection method, power conversion in the positive direction is performed from the phase difference φ> 30 °. In the case of the third embodiment, when the ZVS condition is optimized, it is necessary to set the turns ratio of the primary winding 111 to 113/2 windings 121 to 123 of the transformer 100B to 1: 0.583. In this case, in the third embodiment, substantially the same input power P as in the first embodiment of the Y-Y connection system can be obtained.

(2) ZVS operation condition In the case of the second embodiment of the Δ-Δ connection system, the ZVS operation area is the same as that of the first embodiment of the Y-Y connection system. In the case of the third embodiment of the Y-.DELTA. Connection method, the ZVS operation is performed in the entire range within the output voltage ± 14%. The power conversion characteristics and the ZVS operating area and characteristics can be verified by simulation. Since the power P-phase difference φ characteristics and the ZVS operating region characteristics are affected by the dead time of the upper and lower FETs in each of the bridge circuits 70-1 and 70-2, the phase difference φ fluctuates around conditions that deviate from the ZVS operation. Even if the input power P does not change. The above characteristics do not take into account the effects of dead time.

FIG. 15 is a characteristic diagram showing power comparison of YY, Y-Δ, and Δ-Δ connection systems.
The horizontal axis in FIG. 15 is the first-secondary phase difference φ (°), and the vertical axis is the input power P. Assuming that the input power of the Δ-Δ connection method is P (Δ-Δ), the input power of the Y-Δ connection method is P (Y-Δ), and the input power of the Y-Y connection method is P (Y-Y), P ([Delta]-[Delta]) = 3P (Y- [Delta]), P (Y- [Delta]) = P (Y-Y). In the case of the Y-.DELTA. Connection method, the phase difference .phi. Transitions to .phi.-30.degree., Resetting is performed, and the transformer primary / secondary winding ratio is set to 1: 0.583. Reference numeral 245 is a Y-YE1 = E2 curve, reference numeral 246 is a Δ-ΔE1 = E2 curve, and reference numeral 247 is a Y-ΔE1 = E2 (transformer primary / secondary winding ratio = 1: 0.583) curve.

  As can be seen from FIG. 15, in the same circuit and at the switching frequency f, the Δ-Δ connection scheme can convert three times more power than the Y-Y connection scheme. Therefore, in the Δ-Δ connection method, the inductors 91 to 93 can be miniaturized. The Y- [Delta] connection method can perform substantially the same power conversion as the Y-Y connection method.

FIG. 16 is a characteristic diagram showing comparison of ZVS operating conditions in the YY, Y-Δ, and Δ-Δ connection systems.
The horizontal axis in FIG. 16 is the first-secondary phase difference φ (°), and the vertical axis is the voltage ratio d (E2 = E1). Reference numeral 241 is a primary side boundary YY curve, reference numeral 242 is a secondary side boundary YY curve, reference numeral 243 is a primary side boundary Y-Δ curve, and reference numeral 244 is a secondary side boundary Y-Δ curve. . In the case of the Y-.DELTA. Connection method, the transformer primary / secondary winding ratio is 1: 0.583, the phase difference .phi. Is transitioned to .phi.-30.

As can be seen from FIG. 16, the ZVS operation area of the Δ-Δ connection method is the same as the Y-Y connection method. In the case of the Y-.DELTA. Connection method, the whole area ZVS operation is performed in the input or output voltage ± 14% fluctuation range.
As is clear from FIGS. 15 and 16, the Y-.DELTA. Connection method has advantages (merits) over the Y-Y connection method and the .DELTA .-. DELTA. Connection method under ZVS operating conditions. However, since the reactive current increases in the Y-Δ connection method, it is expected that the conduction loss of the FETs 71 to 82 and the windings 111 to 113 and 121 to 123 will increase. From the viewpoint of power conversion efficiency, it is necessary to compare not only the ZVS operating conditions but the stress of each component (device) to make a comprehensive judgment.

In order to realize an optimal DC / DC converter, for example, it is desirable to perform the following comparative study of (A) to (C).
(A) Ripple current comparison of input / output capacitors 61 and 62 (B) Comparison of average value and effective value of conduction current of FETs 71 to 82 (C) Comparison of magnitude of loss by voltage and current analysis of transformer winding It is desirable to comprehensively evaluate from a viewpoint of power conversion efficiency, a size, and cost, and to realize a DC / DC converter by comparison examination of A)-(C).

(Modification)
The present invention is not limited to the above first to third embodiments, and various modes of use and modifications are possible. For example, the following (a) to (d) may be used as this usage form or modification.

(A) In FIG. 1 etc., each of the inductors 91 to 93, together with each of the parasitic capacitances 71b to 76b, constitutes an LC resonant circuit, but the inductors 91 to 93 are omitted and each primary winding is omitted. An LC resonant circuit may be configured by the inductances 111 to 113 and the parasitic capacitances 71b to 76b.
(B) In the first to third embodiments, the three-phase DAB (Y-Y), (.DELTA .-. DELTA.), (Y-.DELTA.) Connection method has been described, but other connection methods (for example, single phase DAB method) The present invention is also applicable to
(C) The FETs 71 to 82 use other switching elements (for example, insulated gate bipolar transistor (IGBT), SiC (silicon carbide, silicon carbide) elements, GaN (gallium nitride, gallium nitride) elements, etc.) Also good.
(D) In the first to third embodiments, the bidirectional DC / DC converter has been described. However, the present invention can be applied to a unidirectional DC / DC converter.

61, 62 1, 2 side DC voltage 70-1, 70-2 Primary side, secondary side bridge circuit 71-82 FET
71a to 82a body diode 71b to 82b parasitic capacitance 91 to 93 inductor 100, 100A, 100B transformer 111 to 113 primary winding 121 to 123 secondary winding 200 control device 210 frequency control unit 211 power conversion efficiency calculation unit 211a, 211b , 211c, first, second, and third power conversion efficiency calculation units 212, current value positive / negative determination units 213, frequency adjustment units 213a, 213b, first and second frequency adjustment units 214, efficiency variation determination units 214a, 214b, first and second efficiencies Fluctuation determination unit 220 Constant power control unit 230 Drive unit

Claims (6)

A transformer having a primary winding and a secondary winding;
A first bridge circuit in which a plurality of first switching elements, each of which is turned on / off by a plurality of first control signals, is bridge-connected to convert a first DC voltage to an AC voltage and supply it to the primary winding side;
A second bridge which is bridge-connected to a plurality of second switching elements which are turned on / off by a plurality of second control signals, rectifies an AC voltage supplied from the secondary winding side, and outputs a second DC voltage Circuit,
Outputting the plurality of first control signals and the plurality of second control signals having a desired switching frequency to the DC / DC converter including the plurality of first switching elements and the plurality of second switching elements. In a controller for a DC / DC converter that controls on / off operation,
The controller is
The off current value when the first switching element or the second switching element is turned off is determined, and when the off current value is positive, the phase difference between the primary winding and the secondary winding is small. The control device of a DC / DC converter, wherein the switching frequency is changed to be   The control device for a DC / DC converter according to claim 1, wherein an inductor for resonance is connected between the first bridge circuit and the primary winding. A first power conversion efficiency calculation unit that calculates a first power conversion efficiency based on the current and voltage on the first DC voltage side and the second DC voltage side, and outputs a first power conversion efficiency calculation result based on the first DC voltage side and the second DC voltage side. When,
The off current value when the first power conversion efficiency calculation result is output is based on the first DC voltage, the second DC voltage, the phase difference, the switching frequency, and the inductance value of the primary winding. Calculation and determining whether the calculated off current value is positive or negative to obtain a positive / negative determination result, and when the positive / negative determination result is negative, the first power conversion is performed on the first power conversion efficiency calculation unit Current value positive / negative judgment unit which calculates efficiency,
A first frequency adjustment unit that reduces the switching frequency by a fixed value when the positive / negative determination result is positive;
A second power conversion efficiency calculation unit that calculates a second power conversion efficiency when the switching frequency is lowered by a fixed value, based on the current and voltage on the first DC voltage side and the second DC voltage side;
Determine the increase or decrease of the second power conversion efficiency to obtain a first efficiency change determination result, and if the first efficiency change determination result is an increase, the switching frequency is output to the first frequency adjustment unit A first efficiency change determination unit that reduces the value by a fixed value;
A second frequency adjustment unit that raises the switching frequency by a fixed value when the efficiency variation result is falling;
A third power conversion efficiency calculation unit that calculates a third power conversion efficiency when the switching frequency is increased by a fixed value, based on the current and voltage of the first DC voltage side and the second DC voltage side;
Determine the increase or decrease of the third power conversion efficiency to obtain a second efficiency change determination result, and if the second efficiency change determination result is an increase, the switching frequency is output to the second frequency adjustment unit A second efficiency variation determination unit that causes the first power conversion efficiency calculation unit to calculate the first power conversion efficiency when the second efficiency change determination result is a decrease by raising the value by a fixed value;
The control apparatus of the DC / DC converter of Claim 1 which has these. A first power conversion efficiency calculation unit that calculates a first power conversion efficiency based on the current and voltage on the first DC voltage side and the second DC voltage side, and outputs a first power conversion efficiency calculation result based on the first DC voltage side and the second DC voltage side. When,
The off current value when the first power conversion efficiency calculation result is output is calculated based on the first DC voltage, the second DC voltage, the phase difference, the switching frequency, and the inductance value of the inductor. The positive / negative determination result is determined by determining the positive / negative of the calculated off current value, and when the positive / negative determination result is negative, the first power conversion efficiency is calculated with respect to the first power conversion efficiency calculation unit. Current value positive / negative judgment unit
A first frequency adjustment unit that reduces the switching frequency by a fixed value when the positive / negative determination result is positive;
A second power conversion efficiency calculation unit that calculates a second power conversion efficiency when the switching frequency is lowered by a fixed value, based on the current and voltage on the first DC voltage side and the second DC voltage side;
Determine the increase or decrease of the second power conversion efficiency to obtain a first efficiency change determination result, and if the first efficiency change determination result is an increase, the switching frequency is output to the first frequency adjustment unit A first efficiency change determination unit that reduces the value by a fixed value;
A second frequency adjustment unit that raises the switching frequency by a fixed value when the efficiency variation result is falling;
A third power conversion efficiency calculation unit that calculates a third power conversion efficiency when the switching frequency is increased by a fixed value, based on the current and voltage of the first DC voltage side and the second DC voltage side;
Determine the increase or decrease of the third power conversion efficiency to obtain a second efficiency change determination result, and if the second efficiency change determination result is an increase, the switching frequency is output to the second frequency adjustment unit A second efficiency variation determination unit that causes the first power conversion efficiency calculation unit to calculate the first power conversion efficiency when the second efficiency change determination result is a decrease by raising the value by a fixed value;
The control apparatus of the DC / DC converter of Claim 2 which has these. The controller is
The control device of a DC / DC converter according to any one of claims 1 to 4, which is configured by a program controllable processor or an individual circuit. The DC / DC converter is
The control device of a DC / DC converter according to any one of claims 1 to 5, which is a dual active bridge type bidirectional DC / DC converter.

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