JP2019115009A - Input circuit - Google Patents

Abstract

[Problem] To realize an input circuit with little distortion of the output waveform even when the input signal is high speed. [Solution] The present invention comprises a CMOS operational amplifier 1 having an input differential pair 11 and a current source 12, one or more input differential pairs 2 connected in parallel to the input differential pair 11, a current source 3 provided for each input differential pair 2 for driving the input differential pair 2, and a current source selection circuit 4 for selecting which of the current sources 12 and 3 to drive depending on the level of the voltage input to the input differential pair 11 and the input differential pair 2. [Selected Figure] Figure 2

Description

  The present invention relates to an input circuit to which a signal is input.

  In a sensor device using an oscillation circuit, such as a proximity switch, the approach of a detection object is determined by detecting a change in voltage amplitude of an oscillation signal output from the oscillation circuit. In this sensor device, when AD conversion of the oscillation signal is performed, when the required rate is slower than the oscillation frequency, AD conversion is performed by rectifying the oscillation signal and smoothing it with a low pass filter or the like.

Here, a half wave rectifier circuit (referred to as an ideal diode circuit) using an operational amplifier and a diode can be considered as an example of a circuit that rectifies an input signal. A configuration example of this ideal diode circuit is shown in FIG. 7A shows a half wave rectification circuit that outputs only the positive side waveform of the input signal, and FIG. 7B shows a half wave rectification circuit that outputs only the negative side waveform of the input signal.
Although the configuration is different from that of FIG. 7, Patent Documents 1 and 2 also show a half-wave rectifier circuit using an operational amplifier and a diode.

JP, 2008-199320, A Japanese Patent Application Laid-Open No. 7-46845

In the conventional half wave rectification circuit as described above, the error of the forward voltage of the diode can be canceled by the effect of the virtual short circuit by the feedback of the operational amplifier. As a result, in the conventional half-wave rectifier circuit, the amplitude error can be reduced as compared with the diode-only half-wave rectifier circuit.
However, in the conventional half-wave rectifier circuit, the conduction state of the diode changes every time the voltage of the input signal and the reference voltage are switched, and the feedback loop is broken (or switched). There is a problem that the output voltage suddenly changes. At this time, as shown in FIG. 8, distortion occurs in the output waveform, which may result in an error when smoothing. In FIG. 8, reference numeral 801 denotes a 1 MHz signal inputted to the conventional half wave rectification circuit, and reference numeral 802 denotes a signal outputted from the conventional half wave rectification circuit. In order to reduce this distortion, it is necessary to design the slew rate of the operational amplifier fast enough for the input waveform. Therefore, when the input signal is high speed, it is difficult to perform rectification.

  The present invention has been made to solve the problems as described above, and it is an object of the present invention to provide an input circuit with less disturbance of the output waveform even when the input signal is high speed.

  An input circuit according to the present invention comprises a CMOS type operational amplifier having an input differential pair and a current source for driving the input differential pair, and one or more second input differences connected in parallel to the input differential pair. A second current source provided for each of the second input differential pair and driving the second input differential pair, and input to the input differential pair and the second input differential pair It is characterized by comprising a current source selection circuit which selects a current source to be driven out of the current source and the second current source according to the level of the voltage.

  According to the present invention, as configured as described above, it is possible to realize an input circuit with less disturbance of the output waveform even when the input signal is high speed.

It is a figure which shows the structural example of the half wave rectifier circuit which concerns on Embodiment 1 of this invention. It is a figure which shows the structural example of the operational amplifier with a signal selection function concerning Embodiment 1 of this invention. It is a figure which shows an example of the output waveform at the time of inputting a 1-MHz signal with respect to the half wave rectifier circuit which concerns on Embodiment 1 of this invention, and the conventional half wave rectifier circuit. It is a figure which shows the other structural example of the operational amplifier with a signal selection function concerning Embodiment 1 of this invention. It is a figure which shows the other structural example of the operational amplifier with a signal selection function concerning Embodiment 1 of this invention. It is a figure which shows the other structural example of the operational amplifier with a signal selection function concerning Embodiment 1 of this invention. FIG. 7A and FIG. 7B are diagrams showing configuration examples of a conventional half wave rectification circuit. It is a figure which shows an example of the output waveform at the time of inputting the signal of 1 MHz with respect to the conventional half wave rectifier circuit.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Embodiment 1
FIG. 1 is a view showing an example of the configuration of a half wave rectification circuit according to Embodiment 1 of the present invention.
The half wave rectification circuit rectifies the input signal. As shown in FIG. 1, this half wave rectification circuit includes an operational amplifier (input circuit) 10 with a signal selection function.

The operational amplifier 10 with signal selection function amplifies one of the input signal and the reference voltage. The operational amplifier 10 with signal selection function is a complementary metal oxide semiconductor (CMOS) type operational amplifier, and has one inverting input terminal, a plurality of non-inverting input terminals, and one output terminal.
The operational amplifier 10 with signal selection function used for the half-wave rectifier circuit has two non-inverting input terminals. The inverting input terminal is connected to the output terminal, a signal is input to one of the two non-inverting input terminals, and a reference voltage is input to the other. FIG. 1 shows the case where an AC voltage source is connected to one of two non-inverting input terminals and a reference voltage is connected to the other.

  In the following, first, a half wave rectification circuit that outputs only the positive side waveform of the input signal will be described.

  As shown in FIG. 2, the operational amplifier 10 with signal selection function includes an operational amplifier 1, an input differential pair (second input differential pair) 2, a current source (second current source) 3 and a current source selection circuit 4 Have.

  The operational amplifier 1 is a general CMOS type operational amplifier known from the prior art. The operational amplifier 1 includes an input differential pair 11, a current source 12, an active load 13 and an output stage 14.

  The input differential pair 11 is a differential pair for operational amplification. The input differential pair 11 includes a MOS transistor (first MOS transistor) 111 which is an NMOS transistor, and a MOS transistor (second MOS transistor) 112 which is an NMOS transistor.

The gate terminal of the MOS transistor 111 corresponds to one of the two non-inverting input terminals.
The gate terminal of the MOS transistor 112 corresponds to the above-mentioned inverting input terminal.

  The current source 12 drives the input differential pair 11. The current source 12 has a MOS transistor 121 which is an NMOS transistor.

  The source terminal of the MOS transistor 121 is connected to the ground, and the drain terminal is connected to the source terminal of the MOS transistor 111 and the source terminal of the MOS transistor 112.

  Active load 13 is an active load on input differential pair 11. The active load 13 includes a MOS transistor 131 which is a PMOS transistor and a MOS transistor 132 which is a PMOS transistor.

The source terminal of the MOS transistor 131 is connected to the power supply, and the drain terminal is connected to the drain terminal of the MOS transistor 111.
The source terminal of the MOS transistor 132 is connected to the power supply, the drain terminal is connected to the drain terminal of the MOS transistor 112, and the gate terminal is connected to the drain terminal and the gate terminal of the MOS transistor 131.

  The output stage 14 includes a MOS transistor 141 which is a PMOS transistor, a resistor 142, a capacitor 143, and a MOS transistor 144 which is an NMOS transistor.

The source terminal of the MOS transistor 141 is connected to the power supply, the drain terminal is connected to the output terminal, and the gate terminal is connected to the drain terminal of the MOS transistor 131.
One end of the resistor 142 is connected to the drain terminal of the MOS transistor 131 and the gate terminal of the MOS transistor 141.
One end of the capacitor 143 is connected to the other end of the resistor 142, and the other end is connected to the drain terminal of the MOS transistor 141 and the output terminal.
The source terminal of the MOS transistor 144 is connected to the ground, and the drain terminal is connected to the drain terminal of the MOS transistor 141, the other end of the capacitor 143, and the output terminal. Further, a bias voltage is input to the gate terminal of the MOS transistor 144.

  One or more input differential pairs 2 are differential pairs for operational amplification connected in parallel to the input differential pair 11. In the operational amplifier 10 with signal selection function used for the half wave rectification circuit, the input differential pair 2 is single. The input differential pair 2 includes a MOS transistor (third MOS transistor) 21 which is an NMOS transistor, and a MOS transistor (fourth MOS transistor) 22 which is an NMOS transistor.

The drain terminal of the MOS transistor 21 is connected to the drain terminal of the MOS transistor 111. Although the MOS transistor 21 normally uses the same element as the MOS transistor 111, a different element may be used. The gate terminal of the MOS transistor 21 corresponds to the other of the two non-inverting input terminals.
The drain terminal of the MOS transistor 22 is connected to the drain terminal of the MOS transistor 112, and the gate terminal is connected to the gate terminal of the MOS transistor 112. Although the MOS transistor 22 normally uses the same element as the MOS transistor 112, a different element may be used.

  A current source 3 is provided for each input differential pair 2 and drives the input differential pair 2. The current source 3 has a MOS transistor 31 which is an NMOS transistor.

  The source terminal of the MOS transistor 31 is connected to the ground, and the drain terminal is connected to the source terminal of the MOS transistor 21 and the source terminal of the MOS transistor 22.

  The current source selection circuit 4 receives the current source 12 and the current source 3 according to the level of the voltage inputted to the input differential pair 11 (gate terminal of the MOS transistor 111) and the input differential pair 2 (gate terminal of the MOS transistor 21). Select the current source to drive. The current source selection circuit 4 includes an input differential pair 41, a current mirror 42 and a MOS transistor 43.

  The input differential pair 41 is a differential pair for current source selection. The input differential pair 41 includes a MOS transistor 411 which is a PMOS transistor, and a MOS transistor 412 which is a PMOS transistor.

The gate terminal of the MOS transistor 411 is connected to the gate terminal of the MOS transistor 111.
The gate terminal of the MOS transistor 412 is connected to the gate terminal of the MOS transistor 21.

  The current mirror 42 has a MOS transistor 421 which is an NMOS transistor, and a MOS transistor 422 which is an NMOS transistor.

The source terminal of the MOS transistor 421 is connected to the ground of the operational amplifier 1, and the drain terminal is connected to the gate terminal, the drain terminal of the MOS transistor 412, and the gate terminal of the MOS transistor 121.
The source terminal of the MOS transistor 422 is connected to the ground of the operational amplifier 1, and the drain terminal is connected to the gate terminal, the drain terminal of the MOS transistor 411, and the gate terminal of the MOS transistor 31.

  The source terminal of the MOS transistor 43 is connected to the power supply of the operational amplifier 1, and the drain terminal is connected to the source terminal of the MOS transistor 411 and the source terminal of the MOS transistor 412. Further, a bias voltage is input to the gate terminal of the MOS transistor 43.

Next, the operation of the half wave rectification circuit according to the first embodiment will be described. Here, a half wave rectification circuit is configured using the operational amplifier 10 with a signal selection function shown in FIG. 2, and a signal is input to the gate terminal of the MOS transistor 111 and the gate terminal of the MOS transistor 411. It is assumed that a reference voltage is input to the gate terminal of the MOS transistor 412.
In this case, when the voltage of the signal input to the half-wave rectifier circuit is higher than the reference voltage, the MOS transistor 412 is turned on, and the current source 12 is driven by the effect of the current mirror 42. The half-wave rectifier circuit operates as a voltage follower of the signal. Also, when the voltage of the signal input to the half-wave rectifier circuit is lower than the reference voltage, the MOS transistor 411 is turned on, and the current source 3 is driven by the effect of the current mirror 42. The half-wave rectifier circuit operates as a voltage follower of the reference voltage. As a result, only the positive side waveform of the above signal is output from the half wave rectification circuit.

In this half-wave rectifier circuit, unlike a conventional half-wave rectifier circuit using a diode, a feedback loop is always connected. Therefore, the voltage fluctuation of the output terminal of the operational amplifier with signal selection function 10 at the timing when the voltage of the signal input to the half wave rectification circuit and the reference voltage switches is small, and the slew rate required of the operational amplifier 1 is small. There is an advantage.
FIG. 3 shows an example of an output waveform when a 1 MHz signal is input to the half wave rectification circuit according to the first embodiment and the conventional half wave rectification circuit. In FIG. 3, reference numeral 301 denotes a 1 MHz signal input to the half wave rectification circuit according to the first embodiment and the conventional half wave rectification circuit, and reference numeral 302 is output from the half wave rectification circuit according to the first embodiment. And a reference numeral 303 indicates a signal output from the conventional half wave rectifier circuit. As shown in FIG. 3, it can be seen that in the half wave rectification circuit according to the first embodiment, the followability of the output waveform to the input waveform is improved as compared to the conventional half wave rectification circuit using a diode.

Further, in the half wave rectification circuit according to the first embodiment, even when the amplitude of the input signal is small, the error of the output waveform can be suppressed. That is, when the amplitude of the input signal is small, in order to suppress the error of the output waveform, it is necessary to rapidly switch the input differential pair to be operated among the input differential pair 11 and the input differential pair 2 . Therefore, in this case, by increasing the transistor size W / L of the input differential pair 41 of the current source selection circuit 4, the gate-source voltage (VGS) −the threshold voltage (VTH) is reduced. The input differential pair 41 for current source selection is separate from the input differential pair 11 for operational amplification and the input differential pair 2, and the transistor size W / L of the input differential pair 41 is increased. However, the bandwidth of the signal selection functional operational amplifier 10 does not increase.
As described above, in the half-wave rectifier circuit according to the first embodiment, even when the amplitude of the input signal is small, the error of the output waveform can be suppressed, and the circuit design becomes easy.

  In the above, the case of the half wave rectifier circuit which outputs only the positive side waveform of the input signal was shown. On the other hand, in the case of a half wave rectification circuit that outputs only the negative side waveform of the input signal, for example, it is possible to replace the corresponding current source with the selection result of the current source selection circuit 4 . On the other hand, when the input differential pair 11 and the input differential pair 2 are configured using NMOS transistors, the lower limit of the input voltage at which the input differential pair 11 and the input differential pair 2 operate is the threshold voltage of the NMOS transistor. Limited Therefore, in the case of a half wave rectification circuit that outputs only the negative side waveform of the input signal, for example, as shown in FIG. 4, the input differential pair 11 and the input differential pair 2 are configured using PMOS transistors. This makes it possible to cope with low input voltages.

  In this case, the relationship between the high and low voltage relationships and the relationship between the operating MOS transistors 111 and 21 is reversed. That is, when the voltage of the signal input to the half wave rectification circuit is lower than the reference voltage, the MOS transistor 412 is turned on, the current source 12 is driven by the effect of the current mirror 42, and the MOS transistor 111 to which the signal is input is output. In order to conduct, the half wave rectification circuit operates as a voltage follower of the signal. Also, when the voltage of the signal input to the half wave rectification circuit is higher than the reference voltage, the MOS transistor 411 is turned on, and the current source 3 is driven by the effect of the current mirror 42, and the MOS transistor 21 to which the reference voltage is input. The half-wave rectifier circuit operates as a voltage follower of the reference voltage. As a result, only the negative side waveform of the above signal is output from the half wave rectification circuit.

  In the above, the transistor size W / L of the input differential pair 41 of the current source selection circuit 4 is increased to switch the input differential pair to be operated among the input differential pair 11 and the input differential pair 2. It showed the case of doing it sharply. On the other hand, for example, as shown in FIG. 5, even if the differential amplifier circuit 5 is provided at the front stage of the current source selection circuit 4, the input signal itself to the current source selection circuit 4 is amplified by the differential amplifier circuit 5. Good. This makes it possible to switch the operating input differential pair among the input differential pair 11 and the input differential pair 2 more sharply.

  Differential amplifier circuit 5 amplifies a differential component of the voltage input to input differential pair 11 (the gate terminal of MOS transistor 111) and input differential pair 2 (the gate terminal of MOS transistor 21). The differential amplifier circuit 5 includes an input differential pair 51, a resistor 52, a resistor 53, and a MOS transistor 54.

  The input differential pair 51 includes a MOS transistor 511 which is a PMOS transistor and a MOS transistor 512 which is a PMOS transistor.

The gate terminal of the MOS transistor 511 is connected to the gate terminal of the MOS transistor 111, and the drain terminal is connected to the gate terminal of the MOS transistor 412.
The gate terminal of the MOS transistor 512 is connected to the gate terminal of the MOS transistor 21, and the drain terminal is connected to the gate terminal of the MOS transistor 411.

One end of the resistor 52 is connected to the drain terminal of the MOS transistor 511 and the gate terminal of the MOS transistor 412, and the other end is connected to the ground of the operational amplifier 1.
One end of the resistor 53 is connected to the drain terminal of the MOS transistor 512 and the gate terminal of the MOS transistor 411, and the other end is connected to the ground of the operational amplifier 1.

  The source terminal of the MOS transistor 54 is connected to the power supply of the operational amplifier 1, and the drain terminal is connected to the source terminal of the MOS transistor 511 and the source terminal of the MOS transistor 512. Further, a bias voltage is input to the gate terminal of the MOS transistor 54.

  In this case, the current source selection circuit 4 selects a current source to be driven out of the current source 12 and the current source 3 according to the differential component amplified by the differential amplifier circuit 5.

  Also, in the case of the differential amplifier circuit 5 being added to the case of the operational amplifier 10 with signal selection function used in the half wave rectification circuit that outputs only the negative side waveform of the input signal, for example, as shown in FIG. The circuit configuration is as follows.

Further, in the above, the case where the circuit configuration shown in FIG. However, the circuit configuration of the differential amplifier circuit 5 is not limited to this, as long as the differential components of the voltages input to the input differential pair 11 and the input differential pair 2 are amplified.
For example, the resistors 52 and 53 shown in FIG. 5 may be replaced with the MOS transistors 131 and 132 of the active load 13 shown in FIG. Similarly, for example, the resistors 52 and 53 shown in FIG. 6 may be replaced with the MOS transistors 131 and 132 of the active load 13 shown in FIG.

  In the above, the case where the circuit configuration shown in FIGS. 2 and 4-6 is used as the operational amplifier 1 is shown. However, the circuit configuration of the operational amplifier 1 is not limited to this, as long as the input differential pair 11 and the current source 12 are provided.

In the above, the case where the operational amplifier with signal selection function 10 is applied to the half wave rectification circuit and the input differential pair 2 is single is shown. However, the application destination of the operational amplifier with signal selection function 10 is not limited to this, and a plurality of input differential pairs 2 may be connected in parallel to the input differential pair 11.
Here, when the input differential pair 41 is configured using an NMOS transistor, the input differential pair to which the highest voltage of the input differential pair 11 and the plurality of input differential pairs 2 is input conducts. , And other input differential pairs are cut off regions. When the input differential pair 41 is configured using PMOS transistors, the input differential pair to which the lowest voltage of the input differential pair 11 and the plurality of input differential pairs 2 is input conducts. The other input differential pair is in the cutoff region.

  As described above, according to the first embodiment, the CMOS type operational amplifier 1 having the input differential pair 11 and the current source 12, and one or more input differential pairs connected in parallel to the input differential pair 11. 2 and a current source 3 provided for each input differential pair 2 to drive the input differential pair 2, and a current source 12 due to high and low voltages inputted to the input differential pair 11 and the input differential pair 2. And, since the current source selection circuit 4 for selecting the current source to be driven out of the current sources 3 is provided, it is possible to realize an input circuit with less disturbance of the output waveform even when the input signal is high speed.

  In the present invention, within the scope of the invention, modifications of optional components of the embodiment or omission of optional components of the embodiment is possible.

1 op amp 2 input differential pair (second input differential pair)
3 current source (second current source)
4 current source selection circuit 5 differential amplifier circuit 10 operational amplifier with signal selection function (input circuit)
11 input differential pair 12 current source 13 active load 14 output stage 21 MOS transistor (third MOS transistor)
22 MOS transistor (fourth MOS transistor)
31 MOS transistor 41 input differential pair 42 current mirror 43 MOS transistor 51 input differential pair 52 resistor 53 resistor 54 MOS transistor 111 MOS transistor (first MOS transistor)
112 MOS transistor (second MOS transistor)
121 MOS transistor 131 MOS transistor 132 MOS transistor 141 MOS transistor 142 resistor 143 capacitor 144 MOS transistor 411 MOS transistor 412 MOS transistor 421 MOS transistor 422 MOS transistor 511 MOS transistor 512 MOS transistor

Claims (3)

A CMOS-type operational amplifier having an input differential pair and a current source for driving the input differential pair;
One or more second input differential pairs connected in parallel to the input differential pair;
A second current source provided for each of the second input differential pairs and driving the second input differential pair;
A current source selection circuit for selecting one of the current source and the second current source to be driven according to the level of the voltage input to the input differential pair and the second input differential pair Input circuit. A differential amplification circuit that amplifies differential components of voltages input to the input differential pair and the second input differential pair;
The current source selection circuit selects a current source to be driven out of the current source and the second current source according to the differential component amplified by the differential amplifier circuit. Input circuit. The input differential pair comprises a first MOS transistor whose gate terminal is a non-inversion input terminal and a second MOS transistor whose gate terminal is an inversion input terminal.
The second input differential pair is single, the third MOS transistor whose drain terminal is connected to the drain terminal of the first MOS transistor, and the drain terminal is the drain terminal of the second MOS transistor. Consisting of a connected fourth MOS transistor,
An output terminal of the operational amplifier is connected to a gate terminal of the second MOS transistor and a gate terminal of the fourth MOS transistor.
The reference voltage is input to one of the gate terminal of the first MOS transistor and the gate terminal of the third MOS transistor, and the signal is input to the other. The input circuit of 2.

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