JP2019097288A - Power conversion device - Google Patents

Abstract

To fast discriminate voltage reduction in a power conversion device.SOLUTION: In a case where a voltage differential Vdef between a d-axis voltage Vd and a voltage effective value Vrms is equal to or greater than a switching setting voltage level and the voltage effective value is greater than the d-axis voltage Vd, a first voltage reduction discrimination signal FLG1 is ON. In a case where an absolute value |θdq| of a DQ phase is equal to or greater than a switching setting phase level, a second voltage reduction discrimination signal FLG2 is ON. A third voltage reduction discrimination signal FLG3 is OFF in a case where both the first voltage reduction discrimination signal FLG1 and the second voltage reduction discrimination signal FLG2 are OFF, and is ON in a case where at least any one of the first voltage reduction discrimination signal FLG1 and the second voltage reduction discrimination signal FLG2 is ON. In accordance with the third voltage reduction discrimination signal FLG3, FF terms of d-axis and q-axis inverter current control parts 1 and 4 are switched.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a method of detecting an unbalanced voltage drop including a phase change of a power converter.

  A power converter for distributed power supply represented by a solar PCS (Power Conditioning System) needs to comply with a standard for grid interconnection. Examples of standards to be protected include harmonic current countermeasures and FRT (Fault Ride Through). FRT is the operation continuation performance at the time of system disturbance which a power conditioner etc. have.

  An example is given and demonstrated about the power converter device which is performing the countermeasure against harmonic current and FRT correspondence. FIG. 4 shows the configuration of a system in which the distributed power source and the power system are interconnected via the power conversion device 5. A solar panel 6 of solar power generation is provided as a distributed power source, and power is supplied to the grid 8 by maximum power point tracking (MPPT) control.

  FIG. 5 illustrates the controller 9 of the solar PCS. Details of the d-axis inverter current control unit 1 are shown in FIG.

  The PI controller 2a performs PI calculation of the deviation of the d-axis current command value Id_ref and the d-axis current detection value Id_det to perform ACR control. An AC voltage is added to the output of the PI controller 2a as a feedforward term (hereinafter referred to as an FF term). This alternating voltage is a voltage which becomes the output reference of the inverter.

  When the first voltage drop determination signal FLG1 is OFF, the FF term is the voltage effective value Vrms because of the system steady state, and when the first voltage drop determination signal FLG1 is ON, the FF term is the d axis voltage Vd because the system voltage drop state. I assume.

  In the system steady state, the distortion of the voltage command value can be balanced by setting the AC voltage detection value to the voltage effective value Vrms instead of the d-axis voltage Vd, so that harmonics can be stabilized. Current control is stabilized because the voltage command value does not include unbalance, pulsation, or harmonic components.

  When the system voltage drops in FRT, if the FF term is the voltage effective value Vrms, the response speed will be slow, and a difference will be generated between the system voltage and the output reference voltage of the device, and the inverter current will rise. When the current rises to the overcurrent level, the device stops and the operation can not be continued. Therefore, when the system voltage drops, it is necessary to make a judgment at high speed and promptly switch the FF term to the d-axis voltage Vd having a quick response.

  The d-axis inverter current control unit 1 shown in FIG. 6 performs switching control of the FF term based on the first voltage drop determination signal FLG1 of the first system voltage drop determination unit 3 shown in FIG. A method of generating the first voltage drop determination signal FLG1 is shown in FIG.

  A method of using the voltage difference Vdef between the voltage effective value Vrms of the system voltage and the d-axis voltage (instantaneous value) Vd subjected to DQ axis conversion will be described as an example of the voltage drop determination. As shown in FIG. 8, in S1, it is determined whether the d-axis voltage (instantaneous value) Vd is equal to or higher than the voltage effective value Vrms. If the d-axis voltage (instantaneous value) Vd is equal to or higher than the voltage effective value Vrms, the process proceeds to S2, and if not, the process proceeds to S3.

  In S2, the voltage difference Vdef is calculated based on the voltage difference Vdef = d-axis voltage (instantaneous value) Vd−voltage effective value Vrms, and the output voltage increase flag is turned ON.

  In S3, the voltage difference Vdef is calculated based on the voltage difference Vdef = voltage effective value Vrms−d axis voltage (instantaneous value) Vd, and the output voltage increase flag is turned OFF.

  In S4, it is determined whether or not the voltage difference Vdef is equal to or higher than the switching set voltage level. If the voltage difference Vdef is equal to or higher than the switching set voltage level, the process proceeds to S5. If not, the process proceeds to S7.

  In S5, it is determined whether or not the output voltage increase flag is OFF. If the output voltage increase flag is OFF, the process proceeds to S6 and the first voltage decrease determination signal FLG1 is turned ON. If the output voltage increase flag is not OFF, the processing in that control cycle is ended.

  In S7, it is determined whether or not the confirmation time (the time when the voltage difference Vdef is smaller than the switching set voltage level) has passed the set time, and if the confirmation time has passed the set time, the process proceeds to S8 The first voltage drop determination signal FLG1 is turned off. If the confirmation time has not passed the set time, the process proceeds to S9, the confirmation time is updated, and the process in the control cycle is ended.

  That is, when the voltage difference Vdef is equal to or higher than the switching set voltage level and Vrms> Vd, the first voltage drop determination signal FLG1 is switched to ON.

  FIG. 9 shows the line voltage, the voltage difference, and the switching setting voltage level (e.g. 20%) at the steady voltage 91%, and FIG. 10 shows the line voltage and the voltage difference 71 when the steady voltage drops from 91% to 20%. % (91%-20%), indicating the switching set voltage level (e.g. 20%).

  The switching set voltage level designates any voltage outside the device specification range. The first voltage drop determination signal FLG1 is switched from ON to OFF when the confirmation time has passed the set time after returning from the system voltage drop state. The setting time is set to a time that assumes that the system voltage is stable.

  The details of the q-axis inverter current control unit 4 are shown in FIG. The q-axis inverter current control unit 4 performs PI operation on the deviation of the q-axis current command value Iq_ref and the q-axis current detection value Iq_det by the PI controller 2b to perform ACR control. The FF term is added to the output of the PI controller 2b.

  When there is no phase change in the grid voltage, the q-axis voltage Vq is 0, so that the FF term in steady state is 0, and the q-axis voltage Vq is added only when the voltage drops. Similarly to the d-axis inverter current control unit 1, the voltage drop determination is performed by the first voltage drop determination signal FLG1.

JP, 2015-192562, A

The method of using the voltage difference Vdef between the voltage effective value Vrms and the d-axis voltage (instant value) Vd has been described as the voltage drop determination method. However, as shown in the line voltage and d-axis voltage when the steady voltage 91% → 20% including the phase change shown in FIG. 11, the unbalanced voltage drop (two-phase short circuit) including the phase change is the d axis Since the voltage Vd is oscillated at twice the frequency of the fundamental wave, a dead zone is generated. Therefore, as shown in FIG. 12A, the delay of the voltage difference Vdef becoming equal to or higher than the switching set voltage level is delayed. At the same time, the switching of the FF term is delayed, and when the inverter current rises and rises to the overcurrent level, the device is stopped and the operation can not be continued. Therefore, the conventional voltage drop determination method is insufficient as a determination method.

  As described above, in the power conversion device, it is a problem to perform the voltage drop determination at high speed.

  The present invention has been made in view of the above-described conventional problems, and one aspect thereof is that a voltage difference between a d-axis voltage and a voltage effective value is equal to or higher than a switching set voltage level, and the voltage effective value is the above a first system voltage drop determination unit that outputs a first voltage drop determination signal that is turned on when the voltage is larger than the d-axis voltage; a polar coordinate conversion unit that calculates DQ phase based on the d-axis voltage and the q-axis voltage; An absolute value calculation unit that calculates an absolute value of the DQ phase; and a second system voltage drop determination unit that outputs a second voltage drop determination signal that is turned on when the absolute value of the DQ phase is equal to or higher than the switch setting phase level; When both the first voltage drop determination signal and the second voltage drop determination signal are off, they are turned off, and at least one of the first voltage drop determination signal and the second voltage drop determination signal is on. Third voltage drop check that turns on When the third voltage drop determination unit that outputs a signal and the third voltage drop determination signal is OFF, the voltage is effective at the output of PI control based on the deviation between the d-axis current command value and the d-axis current detection value. When a value obtained by adding the values is output as a d-axis voltage command value and the third voltage drop determination signal is ON, the output of PI control based on the deviation of the d-axis current command value and the d-axis current detection value A d-axis inverter current control unit that outputs a value obtained by adding the d-axis voltage as the d-axis voltage command value, and a q-axis current command value and a q-axis current detection value when the third voltage drop determination signal is OFF And outputs the PI control output based on the deviation between them as a q-axis voltage command value, and when the third voltage drop determination signal is ON, based on the deviation between the q-axis current command value and the q-axis current detection value. The value obtained by adding the q-axis voltage to the output of PI control And q-axis inverter current controller for outputting the serial q-axis voltage command value, a, provided, said d-axis voltage command value, and controlling the inverter on the basis of the q-axis voltage command value.

  Further, as one aspect thereof, the first system voltage drop determination unit sets the first voltage drop determination signal to OFF when a set time has elapsed since the voltage difference becomes smaller than the switching set voltage level. I assume.

  Further, as one aspect thereof, the second system voltage drop determination unit turns off the second voltage drop determination signal when a set time has elapsed since the absolute value of the DQ phase becomes smaller than the switching phase set level. It is characterized by

  According to the present invention, it is possible to perform the voltage drop determination at high speed in the power conversion device.

BRIEF DESCRIPTION OF THE DRAWINGS The block diagram which shows the control apparatus of the power converter device in embodiment. The flowchart which shows the processing of the 2nd voltage fall judging part in an embodiment. The time chart which shows the line voltage in the case of falling to the steady-state voltage 91%-> 20%, DQ voltage, and DQ phase. BRIEF DESCRIPTION OF THE DRAWINGS The block diagram which shows the system by which a distributed power supply and an electric power grid are connected via a power converter. The block diagram which shows the control device of the power converter in the past. The block diagram which shows d axis inverter current control part. The block diagram which shows q axis inverter current control part. The flowchart which shows the processing of the 1st voltage fall judging part. The time chart which shows the voltage between lines in the steady state voltage 91%, and a voltage difference. The time chart which shows the voltage between lines in case of falling to a steady-state voltage 91%-> 20%, and a voltage difference. The time chart which shows the voltage between lines at the time of falling to steady-state voltage 91%-> 20% including a phase change, and a voltage difference. The time chart which shows the system voltage at the time of the voltage fall including the phase change in FRT, inverter current, and a voltage fall determination signal.

  Hereinafter, an embodiment of a power conversion device in the present invention will be described in detail based on FIGS. 1 to 4.

[Embodiment]
In this embodiment, a power converter for distributed power supply represented by sunlight PCS as shown in FIG. 4 will be described as an example. As shown in FIG. 4, a solar panel 6 as a distributed power source and a grid 8 are interconnected via a power converter 5. The direct current side of the inverter 7 of the power conversion device 5 is connected to the solar panel 6. The AC side of the inverter 7 is connected to the primary side of the transformer Tr via a reactor L for filter and a capacitor C. The secondary side of the transformer Tr is connected to the grid 8.

  Control device 9 receives DC current detection value Idc, DC voltage detection value Vdc, inverter current detection value Iinv_r, Iinv_t, grid current detection value, grid voltage detection value Vrs, Vst, and is used to control power conversion device 5 Be

  The control device 9 of the first embodiment is shown in FIG. The control device 9 shown in FIG. 1 is obtained by adding a polar coordinate conversion unit 18, an absolute value calculation unit 19, a second system voltage drop determination unit 20, and an OR element 21 to the control device 9 shown in FIG. The other configuration is the same as that of FIG.

  The control device 9 of the power conversion device according to the present embodiment will be described based on FIG. For control, values obtained by moving averages of the DC voltage detection value Vdc_det, the DC current detection value Idc_det, the inverter current detection values Iinv_r, Iinv_t, and the AC voltage detection values Vrs and Vst by the moving average units 10a and 10b are used. AC voltage detection value Vtr is obtained from Vtr = − (Vrs + Vst), and inverter current detection value Iinv_s is obtained from Iinv_s = − (Iinv_r + Iinv_t).

  In order to perform the MPPT control, the multiplying unit 11 multiplies the DC voltage detection value Vdc_det by the DC current detection value Idc_det to determine the DC power Pdc. The MPPT control unit 12 calculates a DC voltage command value Vdc_ref from the DC voltage detection value Vdc_det and the DC power Pdc.

  The DC voltage control unit 13 performs AVR from the DC voltage detection value Vdc_det and the DC voltage command value Vdc_ref calculated by the MPPT control unit 12, and outputs a d-axis current command value Id_ref.

  The inverter current three-phase / two-phase converter 14 calculates the d-axis current detection value Id_det and the q-axis current detection value Iq_det using the inverter current detection values Iinv_r, Iinv_s, Iinv_t. Similarly, the AC voltage three-phase / two-phase converter 15 calculates the d-axis voltage Vd and the q-axis voltage Vq using the AC voltage detection values Vrs, Vtr, and Vst.

  The phase θ required by the inverter current three-phase / two-phase converter 14 and the AC voltage three-phase / two-phase converter 15 is calculated by the phase controller 16 based on the AC voltage detection values Vrs, Vtr, Vst. Since the phase θ corresponds to a voltage drop including a phase change in FRT, it is necessary to use a quick response control.

  The AC voltage effective value calculation unit 17 calculates the voltage effective value Vrms based on the AC voltage detection values Vrs, Vtr, and Vst.

  As shown in FIG. 8, the first system voltage drop determination unit 3 generates a first voltage drop determination signal FLG1 based on the d-axis voltage (instantaneous value) Vd and the voltage effective value Vrms.

  The polar coordinate conversion unit 18 calculates the DQ phase θdq from the d-axis voltage Vd and the q-axis voltage Vq. The absolute value calculation unit 19 performs absolute value processing of the DQ phase θdq.

  Since the amplitude of the DQ phase θdq largely changes at the time of voltage imbalance and phase change, the second system voltage drop judging unit 20 compares the absolute value | θdq | of the DQ phase θdq with the switch setting phase level, Determine a voltage drop that includes a change. A flowchart of the second system voltage drop determination unit 20 is shown in FIG.

  In S11, it is determined whether or not the absolute value | θdq | of the DQ phase θdq is equal to or higher than the switch setting phase level. If the absolute value | θdq | of the DQ phase θdq is equal to or higher than the switch setting phase level, the process proceeds to S12; In the case of S13. At S12, the second voltage drop determination signal FLG2 is turned ON.

  In S13, it is determined whether or not the confirmation time (absolute value of DQ phase | θdq | <time of switching setting phase level) has passed the set time, and if it has, the process proceeds to S14 and the second voltage The decrease determination signal FLG2 is turned off. If the time has not elapsed, the confirmation time is updated in S15, and the process in the control cycle is ended.

  As described above, when the absolute value | θdq | of the DQ phase is equal to or higher than the switching set phase level, the second voltage drop determination signal FLG2 is turned ON. Since the DQ phase θdq also fluctuates due to distortion of the system voltage, the switching setting phase level is set to a level that does not cause a malfunction within the device specification range of the system voltage distortion.

  The second voltage drop determination signal FLG2 is switched from ON to OFF when the confirmation time has passed a set time after returning from the system voltage drop state, and is set to a time assuming that the system voltage is stabilized.

  The OR circuit 21 outputs ON when at least one of the first voltage drop determination signal FLG1 and the second voltage drop determination signal FLG2 is ON, and the third voltage drop determination is OFF when both are OFF. The signal FLG3 is output. The first voltage drop determination signal FLG1 is for balanced voltage drop not including a phase change, and the second voltage drop determination signal FLG2 is for unbalanced voltage drop including a phase change.

  The d-axis inverter current control unit 1 of this embodiment is obtained by changing the first voltage drop determination signal FLG1 of the conventional d-axis inverter current control unit 1 shown in FIG. 6 to a third voltage drop determination signal FLG3.

  When the third voltage drop determination signal FLG3 is OFF, it is determined that the steady state is established, and the voltage effective value Vrms is added to the output of the PI controller 2a. When the third voltage drop determination signal FLG3 is ON, it is determined that the system voltage drops, and the d-axis voltage Vd is added to the output of the PI controller 2a. The addition result is the d-axis voltage command value.

  Similarly, the q-axis inverter current control unit 4 of the present embodiment is obtained by changing the first voltage drop determination signal FLG1 of the conventional q-axis inverter current control unit 4 shown in FIG. 7 to a third voltage drop determination signal FLG3. is there.

  When the third voltage drop determination signal FLG3 is OFF, it is determined that the steady state is established, and 0 is added to the output of the PI controller 2b. When the third voltage drop determination signal FLG3 is ON, it is determined that the system voltage is in a reduced state, and the q-axis voltage Vq is added to the output of the PI controller 2b. The addition result is the q-axis voltage command value.

  The two-phase / three-phase conversion unit 24 converts the d-axis voltage command value and the q-axis voltage command value into two-phase / three-phase based on the phase θ, and outputs the result as a three-phase voltage command value. The PWM controller 25 outputs a gate signal to the switching device of the inverter 7 based on the comparison between the three-phase voltage command value and the carrier triangular wave.

  FIG. 3 shows the result of theoretical calculation of the operation of the DQ phase θdq when the steady-state voltage drops to 91% → 20% due to an unbalanced voltage drop including phase conversion. Although there are four dead zones in which the voltage drop determination is delayed, the dead zones in (2) and (4) are the third voltage drop which is the logical sum of the conventional first voltage drop determination signal FLG1 and the second voltage drop determination signal FLG2. The problem can be solved by using the determination signal FLG3.

  Although the dead zones of (1) and (3) remain, the maximum time of the dead zone can be made shorter than in the prior art, so the inverter current does not rise to the overcurrent level and there is no failure and stoppage.

  In the present embodiment, as shown in FIG. 12B, the determination of the voltage drop becomes fast, and the rise of the inverter current is suppressed. Operation can be continued even at unbalanced voltage drop including phase change.

  In the present embodiment, at the time of system voltage drop including phase change, switching of the FF term of inverter current control is performed based on the voltage drop determination using the DQ phase θdq of the AC voltage. This suppresses the increase of the inverter current, and enables the device to continue operating.

  In patent document 1, the voltage amplitude of system voltage and frequency information are utilized for voltage drop determination. In order to comply with the FRT standard, it is necessary to detect voltage abnormality as early as possible. In this embodiment, polar coordinate conversion is performed on the AC voltage detection values Vrs, Vtr, and Vst, and voltage drop determination is performed using three types of d-axis voltage Vd (amplitude), q-axis voltage Vq (phase difference), and voltage effective value Vrms. The condition is When q-axis voltage Vq is integrated, it becomes frequency information. However, according to the present embodiment, system abnormality can be detected quickly under conditions closer to an instantaneous value in phase. Also, a dead zone is provided to prevent false detection.

  Although the present invention has been described in detail with reference to the specific examples described above, it is obvious to those skilled in the art that various variations and modifications are possible within the scope of the technical idea of the present invention. It is natural that such variations and modifications fall within the scope of the claims.

DESCRIPTION OF SYMBOLS 1 ... d axis inverter current control part 3 ... 1st system voltage drop determination part 4 ... q axis inverter current control part 10a, 10b ... moving average part 11 ... multiplication part 12 ... MPPT control part 13 ... DC voltage control part 14 ... inverter Current three-phase to two-phase converter 15: AC voltage three-phase to two-phase converter 16: phase controller 17: AC voltage effective value calculator 18: polar coordinate converter 19: absolute value calculator 20: second system voltage drop Determination unit 21 ... OR element 24 ... 2 phase / 3 phase conversion unit 25 ... PWM control unit

Claims (3)

A first system for outputting a first voltage drop determination signal that is turned on when the voltage difference between the d-axis voltage and the voltage effective value is equal to or higher than the switching setting voltage level and the voltage effective value is larger than the d-axis voltage A voltage drop determination unit,
A polar coordinate conversion unit that calculates a DQ phase based on the d-axis voltage and the q-axis voltage;
An absolute value calculation unit that calculates an absolute value of the DQ phase;
A second system voltage drop determination unit that outputs a second voltage drop determination signal that is turned on when the absolute value of the DQ phase is equal to or higher than the switching set phase level;
When both the first voltage drop determination signal and the second voltage drop determination signal are off, they are turned off, and at least one of the first voltage drop determination signal and the second voltage drop determination signal is on. A third voltage drop determination unit that outputs a third voltage drop determination signal that is turned on;
When the third voltage drop determination signal is OFF, a value obtained by adding the voltage effective value to the output of PI control based on the deviation between the d-axis current command value and the d-axis current detection value is used as the d-axis voltage command value. When the third voltage drop determination signal is ON, the d-axis voltage is added to the output of PI control based on the deviation of the d-axis current command value and the d-axis current detection value. A d-axis inverter current control unit that outputs a shaft voltage command value;
When the third voltage drop determination signal is OFF, the output of PI control based on the deviation between the q-axis current command value and the q-axis current detection value is output as a q-axis voltage command value, and the third voltage drop determination signal And the q-axis voltage command value is output as the q-axis voltage command value by adding the q-axis voltage to the output of PI control based on the deviation between the q-axis current command value and the q-axis current detection value. An inverter current control unit,
And controlling the inverter based on the d-axis voltage command value and the q-axis voltage command value. The first system voltage drop determination unit
The power conversion device according to claim 1, wherein the first voltage drop determination signal is turned off when a set time has elapsed since the voltage difference becomes smaller than the switching set voltage level. The second system voltage drop determination unit
The power conversion device according to claim 1 or 2, wherein the second voltage drop determination signal is turned OFF when a set time has elapsed after the absolute value of the DQ phase becomes smaller than the switching phase set level.

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