JP2019068559A - Power converter and power conversion system - Google Patents

Abstract

[Problem] To provide a power conversion device in which each power converter can autonomously adjust the carrier frequency to suppress cross currents without mutually transmitting information between multiple power converters. [Solution] In a power conversion device that supplies a combined output of inverter devices 20, 30 connected in parallel to a load 40, in which inverter units 23, 33 perform PWM control based on a carrier and a signal wave, each control circuit 24, 34 is provided with a means for detecting an output current, a means for detecting high-frequency components other than the fundamental wave frequency from the output current and detecting an output current fluctuation amount ΔiL based on the high-frequency components, and a means for calculating a carrier frequency increase/decrease amount Δfc so that ΔiL is small when the carrier frequency is increased or decreased, and the inverter unit is controlled using a carrier with a frequency (f0+Δfc) obtained by adding Δfc to a carrier reference frequency f0. [Selected Figure] Figure 1

Description

  The present invention relates to a technology for suppressing a cross current (circulating current) flowing between a plurality of power converters connected in parallel.

Patent Document 1 and Patent Document 2 disclose a detection circuit of a cross current flowing between a plurality of inverter devices connected in parallel.
FIG. 5 is a block diagram of the cross current detection circuit described in Patent Document 1. INV1, INV2 and INV3 correspond to inverter devices whose output side is connected in parallel, LOAD corresponds to load, and 510, 520 and 530 correspond to each inverter device. It is a cross current detection circuit provided. Also, 511, 521, 531 are current transformers, 512, 522, 532 are current detectors, 513, 523, 533 are resistors, 514, 524, 534 are difference current detectors, 515, 525, 535 are control circuits. is there. FIG. 6 shows the main parts of the cross current detection circuits 510, 520, and 530.

  In the cross current detection circuit described above, the current detectors 512, 522, 532 respectively detect signals proportional to the output currents of the respective inverter devices, and the difference current detectors 514, 524, 534 are proportional to the cross current flowing between the respective inverter devices. Detect each signal. These detection signals are input to the control circuits 515, 525, 535, and the output current of each inverter device is controlled so that the signal proportional to the cross current becomes zero, thereby suppressing the cross current and operating the inverter devices in parallel. It is possible.

  Further, in Patent Document 2, each inverter device is operated in parallel while suppressing the cross current according to the same principle as Patent Document 1, but when a signal proportional to the cross current exceeds a predetermined value when an abnormality such as a current detector occurs. And means for temporarily stopping the inverter device and disconnecting it from the parallel connection circuit.

Further, Patent Document 3 describes a parallel synchronous auxiliary power supply that controls each inverter device so that the deviation of the output current of a plurality of inverter devices approaches zero.
In this prior art, the control circuit of each inverter device controls the output current of its own inverter device so as to eliminate the deviation compared with the output current of another inverter device. That is, each inverter device mutually transmits information such as the output current, thereby enabling parallel synchronous operation while suppressing the cross current between the inverter devices without using the cross current detection circuit.

JP-A-8-214553 (paragraphs [0027] to [0036], FIG. 1, FIG. 2 etc.) JP-A-2002-64938 (Paragraphs [0019] to [0024], FIG. 1, etc.) Unexamined-Japanese-Patent No. 2017-28909 (Paragraph [0023]-[0030], FIG. 1, FIG. 2 etc.)

According to the prior art described in patent documents 1-3, since the fundamental wave component of the output current of each inverter apparatus is equalized, it is possible to suppress a cross current.
However, in the case where a cross current flows between the inverter devices due to the mismatch in the frequency or phase of the carrier provided for each inverter device, it is difficult to suppress this.

For example, it is assumed that the carrier frequency of the first inverter matches the reference frequency (for example, 2 [kHz]) and the carrier frequency of the second inverter deviates from the reference frequency.
In this case, the output current of the second inverter includes a high frequency ripple component other than the reference frequency, and as a result of the high frequency ripple component fluctuating at a low frequency, a cross current flows between the second inverter and the first inverter. was there.

  Therefore, the problem to be solved by the present invention is that it is not necessary to mutually transmit information among a plurality of power converters, and the individual power converters autonomously adjust the carrier frequency to cross-flow between the converters. Power conversion device and power conversion system capable of suppressing

In order to solve the said subject, the power converter device which concerns on Claim 1 is
A power converter that converts DC power and outputs AC power;
An output current detection unit that detects an output current of the power conversion unit;
High frequency component extraction means for extracting high frequency components other than the fundamental frequency from the output current at a predetermined cycle;
A carrier frequency adjustment amount calculation unit that calculates the adjustment amount of the carrier frequency for controlling the power conversion unit in the predetermined cycle based on the high frequency component, and holds the adjustment amount until the next calculation;
Equipped with
The carrier frequency adjustment amount calculation unit may calculate the current value of the adjustment amount of the carrier frequency based on the previous value and the current value of the extracted high frequency component and the previous value of the adjustment amount.

  A power converter according to a second aspect is the power converter according to the first aspect, wherein the extraction means is a filter for extracting a high frequency component higher than a reference frequency of a carrier from the output current.

  The power conversion device according to claim 3 is the power conversion device according to claim 1 or 2, wherein the carrier frequency adjustment amount calculation unit calculates an output current fluctuation amount based on the previous value and the current value of the extracted high frequency component. Calculating the current value of the adjustment amount of the carrier frequency based on the fluctuation of the output current and the previous value of the adjustment amount.

  The power conversion device according to claim 4 is the power conversion device according to any one of claims 1 to 3, wherein the high frequency component extraction unit is a component included in the high frequency component as a fluctuation of the output current. And detecting a low frequency fluctuation component fluctuating at a frequency lower than the fundamental wave frequency.

  The power converter according to claim 5 is the power converter according to claim 4, wherein the carrier frequency adjustment amount calculator adjusts the carrier frequency when the magnitude of the low frequency fluctuation component exceeds a predetermined range. It is characterized by calculating a quantity.

  The power conversion system according to claim 6 is characterized by comprising at least two or more of the power conversion devices according to any one of claims 1 to 5, and the output side is connected in parallel to supply AC power to the load. Do.

  According to the present invention, the power converter reduces the high frequency ripple component included in the output current by adjusting the carrier frequency without requiring information such as the output current of the other power converter, and thus the power converter It is possible to suppress the cross flow between them. For this reason, a means for transmitting information between a plurality of power converters is not necessary, and the cost of the entire system can be reduced.

FIG. 1 is an overall configuration diagram of a power conversion device according to an embodiment of the present invention. It is a block diagram of a control circuit in an embodiment of the present invention. It is a block diagram of the test circuit for operation confirmation by embodiment of this invention. It is a wave form diagram for explaining the effect of the embodiment of the present invention. It is a circuit diagram of the prior art described in patent document 1. FIG. It is a circuit diagram which shows the principal part of FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is an overall configuration diagram of a power conversion device according to an embodiment of the present invention. In FIG. 1, inverter devices 20 and 30 are connected in parallel with each other between an alternating current power supply (commercial power supply) 10 and a load 40. The number of inverter devices connected in parallel is not limited to two, and may be three or more.

  One inverter device 20 includes a converter unit 21 that performs AC / DC conversion, and an inverter unit 23 that is connected to the DC side via a smoothing capacitor 22 and that performs DC / AC conversion. Here, the converter unit 21 is configured by a diode rectification circuit, and the inverter unit 23 includes a semiconductor switching element controlled by PWM (pulse width modulation) by the control circuit 24. A so-called PWM converter may be used for the converter unit 21 as well. Further, the AC power supply (commercial power supply) 10 and the converter units 21 and 31 may not be provided, and only the inverter units 23 and 33 may be included, and the DC power may be supplied to the inverter units 23 and 33 from the DC power supply.

Similarly to the inverter device 20, the other inverter device 30 is also configured by the converter unit 31, the smoothing capacitor 32, the inverter unit 33, and the control circuit 34.
The output currents i _L20 and i _L30 of these inverter devices 20 and ₃₀ are synthesized and supplied to the load 40.
In the present embodiment, in order to suppress the cross flow (indicated by a broken line) between the inverter devices 20 and 30 in FIG. 1, each control circuit 24 and 34 is configured as follows.

  FIG. 2 is a block diagram showing the configuration of control circuits 24 and 34. Referring to FIG. In addition, since the configurations of the control circuits 24 and 34 are the same, the case where the inverter unit 23 of one of the inverter devices 20 is controlled is described here.

In FIG. 2, the reference frequency f ₀ of the carrier (carrier used for PWM control of the inverter unit 23) set by the carrier frequency setting unit 1 is set as a cutoff frequency in the high pass filter 3. The output current i _L (= i _L20 ) of the inverter 20 is input to the high pass filter 3. Here, the reference frequency f ₀ is, for example, 2 [kHz].

The reference frequency f ₀ is added to the carrier frequency increase / decrease amount Δf _c, and the addition result (f ₀ + Δf _c ) is input to the PWM processing circuit 6 for PWM control of the inverter unit 23. The PWM processing circuit 6 compares the carrier whose frequency has been adjusted to (f ₀ + Δf _c ) with the voltage command to generate a drive signal for the switching element of the inverter unit 23.

The high frequency ripple component higher than the reference frequency f ₀ of the output current i _L that has passed through the high pass filter 3 is input to the low frequency fluctuation detection unit 4, and the low frequency fluctuation component (beat component) Δi _L is detected.
The low frequency fluctuation component Δi _L is sampled and held by the sample and hold circuit 5 using the clock signal CLK of a predetermined cycle, and is input to the carrier frequency increase / decrease operation unit 7.

Here, when the carrier frequency of the inverter device 20 of FIG. 1 does not match the reference frequency f ₀ and there is a deviation between the two frequencies, the output current i _{L 20} is caused by the above deviation and the reference frequency f _It contains _zero or more high frequency ripple components. Then, a cross current is generated between the inverter devices 20 and 30 by the low frequency fluctuation component Δi _L based on the high frequency ripple component.
Therefore, in this embodiment, the low frequency fluctuation component is detected from the high frequency ripple component of the output current i _L of the inverter device 20, and the carrier frequency of the inverter device 20 is adjusted according to the increasing / decreasing tendency.

Next, the operation of the carrier frequency increment / decrement operation unit 7 will be described.
The carrier frequency increment / decrement operation unit 7 first holds the current value Δi _Ln of the low frequency fluctuation component Δi _L (step S1). Next, it is determined whether the previous value Δf _{cn-1 of the} carrier frequency increase / decrease amount Δf _c output as a command from the carrier frequency increase / decrease calculation unit 7 has increased or decreased from before (step S2).

If the previous value Δf _cn-1 has increased from before (Yes at step S2) or decreases (No at step S2), in any case, the current value Δi _{Ln of the} low frequency fluctuation component Δi _L The previous value .DELTA.i _Ln-1 is compared (steps S3 and S4).

In step S3, if the current value .DELTA.i _Ln is long decreases from the previous value Δi _Ln-1 (step S3 Yes), the variation of the low frequency fluctuation component .DELTA.i _L decreases and there to be going trend carrier frequency increment or decrement Delta] f _c direction since it remains current increases as in the case of the current value Delta] f _cn of Delta] f _c of previous value Δf _cn-1 (step S5). On the contrary, if the current value Δi _Ln is larger than the previous value Δi _Ln-1 (No at step S3), the low frequency fluctuation component Δi _L tends to increase and it is necessary to change the fluctuation direction of Δf _c Since the current value .DELTA.f _cn is decreased, the current value .DELTA.f _cn is decreased as _compared with the previous value .DELTA.f _cn-1 (step S6).

Also in step S4, if the current value Δi _Ln is smaller than the previous value Δi _{Ln-1 in} the same way as in step S3 (Yes in step S4), the current value Δf _cn is If the current value Δi _Ln is increased from the previous value Δi _Ln-1 as in the case of the value Δf _cn-1 (step S6) (No at step S4), the current direction of Δf _c is changed The value Δf _cn is increased contrary to the case of the previous value Δf _cn-1 (step S5).

In this manner, the present value Delta] f _cn which is increased or decreased with output as Delta] f _c, it holds the current value .DELTA.i _Ln as a preceding value Δi _Ln-1 (step S7).
The operation of the carrier frequency increment or decrement calculation unit 7 described above was performed at a constant cycle in accordance with the clock signal CLK, and the carrier frequency by adding the carrier frequency increment or decrement Delta] f _c to the reference frequency f ₀ by the adder 2 (f ₀ Adjust to + Δf _c ). The PWM processing unit 6 performs PWM control of the switching elements of the inverter unit 20 using the carrier after the frequency adjustment.

When the control circuits 24 and 25 of the inverters 20 and 30 connected in parallel execute the above operations, the carrier frequency of the inverters 20 and 30 becomes equal to the reference frequency f ₀ (carrier frequency of the inverters 20 and 30) Changes in the same direction, and the phase difference between carriers disappears.
Thereby, the high frequency ripple component and the low frequency fluctuation component Δi _L included in the output current are reduced due to the difference between the carrier frequency and the reference frequency f ₀ or the phase difference between the carriers, and the cross current between the inverters 20 and 30 is suppressed. Can.
The carrier frequency decrease calculation section 7 may be configured such that the magnitude of the low frequency fluctuation component .DELTA.i _L is for calculating a carrier frequency increment or decrement Delta] f _c when exceeding the predetermined range.

  Next, FIG. 3 is a block diagram of the test circuit for operation confirmation according to the present embodiment, and FIG. 3 (a) is a gate drive circuit of the inverter unit, and FIG. 3 (b) is a gate signal 111 of FIG. , 112, and a half bridge inverter unit 33A including switching elements 221 and 222 driven by gate signals 113 and 114; And the output circuit of FIG. Here, the inverter units 23A and 33A correspond to the inverter units 23 and 33 in FIG. 1, respectively.

In FIG. 3A, 101 is a voltage command signal source, 102 and 103 are carrier generation sources, 104 and 105 are gains, 106 and 107 are comparators, and 108 and 109 are sign inverters. Further, in FIG. 3B, 201 and 202 are DC voltage sources, 213 and 223 are filter reactors, 214 and 224 are resistors, 215 and 225 are filter capacitors, and 216 and 226 are output reactors corresponding to wiring inductance, 230 Is the load resistance.
Here, the output frequency of each of the inverter units 23A and 33A is 1 [kHz]. In addition, the code | symbol V shows a voltage measurement site | part.

FIG. 4 shows voltage / current waveforms of each part when the operation check is performed using the test circuit. The voltage command signal source 101 outputs a 50 [Hz] sine wave as a voltage command.
The waveform (1) in FIG. 4 shows that the carrier frequency generated by the carrier generation sources 102 and 103 is 2 [kHz] at the reference frequency f ₀ and the phase difference is 5 electrical degrees. When one of the carrier frequencies by the generation sources 102 and 103 is 2 [kHz] of the reference frequency f ₀ and the other is 2.01 [kHz], the waveform (3) is a carrier generation source according to the embodiment of the present invention FIG. 10 is a waveform diagram when carrier frequencies according to 102 and 103 are both made equal to the reference frequency f ₀ to eliminate a shift in carrier frequency and a phase difference between carriers.
The bus voltage in the waveforms (1) to (3) indicates the voltage applied to the load 230, the current of the filter reactor indicates, for example, the current of the reactor 213, and the output current i _L indicates, for example, the current of the reactor 216.

In the waveform (1), the output current i _L contains a high frequency ripple component due to the phase difference between the two carriers, and this ripple component constantly fluctuates in a cycle shorter than the output frequency. Further, in the waveform (2), the output current i _L contains a high frequency ripple component caused by the shift of the carrier frequency, and a low frequency fluctuation component due to this ripple component appears notably.
That is, when there is a phase difference between the carriers of the inverter units 23A and 33A, or when the carrier frequency does not match the reference frequency f ₀ , the output current i _L includes a high frequency ripple component other than the fundamental wave component. , This causes the cross flow.
On the other hand, in the waveform (3) according to the present embodiment, since the high-frequency ripple component and the low-frequency fluctuation component are not included in the output current i _L , the cross current between the inverter units 23A and 33A can be suppressed. Recognize.

1: Carrier frequency setting unit 2: Adder 3: High pass filter 4: Low frequency fluctuation detection unit 5: Sample and hold circuit 6: PWM processing circuit 7: Carrier frequency increase / decrease operation unit 10: AC power supply (commercial power supply)
20 and 30: inverters 21 and 31: converters 22 and 32: smoothing capacitors 23, 33, 23A and 33A: inverters 24 and 34: control circuit 40: load 101: voltage command signal source 102, 103: carrier generation source 104, 105: gain 106, 107: comparator 108, 109: sign inverter 201, 202: DC voltage source 211, 212, 221, 222: semiconductor switching element 213, 223: filter reactor 214, 224: resistor 215, 225: Filter capacitor 216, 226: Output reactor 230: Load resistance

Claims (6)

A power converter that converts DC power and outputs AC power;
An output current detection unit that detects an output current of the power conversion unit;
High frequency component extraction means for extracting high frequency components other than the fundamental frequency from the output current at a predetermined cycle;
A carrier frequency adjustment amount calculation unit that calculates the adjustment amount of the carrier frequency for controlling the power conversion unit in the predetermined cycle based on the high frequency component, and holds the adjustment amount until the next calculation;
Equipped with
The power conversion, wherein the carrier frequency adjustment amount calculation unit calculates the current value of the adjustment amount of the carrier frequency based on the previous value and the current value of the extracted high frequency component and the previous value of the adjustment amount. apparatus.   The power conversion device according to claim 1, wherein the extraction unit is a filter that extracts a high frequency component higher than a reference frequency of a carrier from the output current.   The carrier frequency adjustment amount calculation unit calculates an output current fluctuation based on the previous value and the current value of the extracted high frequency component, and the carrier frequency based on the fluctuation of the output current and the previous value of the adjustment amount. The power conversion device according to claim 1, wherein a current value of the adjustment amount of is calculated.   The high frequency component extraction means detects a low frequency fluctuation component which is a component contained in the high frequency component and fluctuates at a frequency lower than the fundamental wave frequency as a fluctuation component of the output current. The power converter device as described in any one of -3.   The power conversion device according to claim 4, wherein the carrier frequency adjustment amount calculation unit calculates the adjustment amount of the carrier frequency when the magnitude of the low frequency fluctuation component exceeds a predetermined range.   A power conversion system comprising: at least two or more power conversion devices according to any one of claims 1 to 5; and an output side connected in parallel to supply an AC power to a load.

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