JP2018061301A - Semiconductor drive device and power conversion device using the same - Google Patents

Abstract

When an overcurrent flowing in a large-capacity power semiconductor element is detected by a method using an inductance, a current for driving a control voltage of the power semiconductor element is further increased, so that a saturation current is controlled at high speed. Is difficult. A semiconductor driving device for driving a semiconductor element having a first and second main terminals and a control terminal for controlling a main current flowing in the first and second main terminals, and driving the semiconductor element to the control terminal. A drive circuit that supplies a signal, an integration circuit that outputs an integral value of an electromotive voltage generated in an inductance connected in series to the second main terminal or a value proportional to the integral value, and an output of the integration circuit is predetermined. And a shunt circuit that shunts a current corresponding to the surplus value from the first connection point between itself and the control terminal to the second connection point between itself and the inductance when the level value of the current is exceeded. . [Selection] Figure 1

Description

  The present invention relates to a semiconductor drive device for driving a power semiconductor, and a power conversion device using the same.

  In power converters such as inverters, assuming that an overcurrent flows due to an unintended event such as an overload or load short-circuit, the overcurrent is appropriately cut off to protect itself from destruction due to overcurrent. Function is required from the viewpoint of high reliability. As such a system, for example, in Patent Document 1 (Japanese Patent Laid-Open No. 08-162929), the overcurrent is made constant by limiting the control voltage when the semiconductor switching element is turned on by the power semiconductor during overcurrent. A method is shown in which the value is limited to a value and then the current is turned off.

  Since the maximum current that flows in the power semiconductor depends on the control voltage, this method can suppress the surge voltage at the time of interruption and safely cut off the current by suppressing the overcurrent to a certain level. There are features that can be done. In this method, the overcurrent is detected from the voltage of the resistor connected in series with the switching element, and the control voltage of the switching element, that is, the gate voltage, is controlled by controlling the input voltage of the output buffer having a push-pull configuration using a bipolar transistor. The level value is set. As a result, the current drive capability is increased, and it is possible to cope with a large-capacity switching element.

  In addition, there are applications such as a large-capacity converter that has a large current capacity and cannot connect a current detection resistor in series to the semiconductor switching element. As a method for detecting an overcurrent state in this application, for example, in Patent Document 2 (Japanese Patent Laid-Open No. 2000-324846), an inductance is provided in series with a semiconductor switching element, and a resistance is obtained by integrating the voltage across the inductance. A scheme is shown that makes it possible to detect an overcurrent without causing losses.

Japanese Patent Laid-Open No. 08-162929 JP 2000-324846 A

  For railway and large-scale industrial applications, when a control voltage is controlled in order to limit overcurrent as described above, it is difficult to detect current using the above-described resistance in a power converter having a large capacity of several hundreds to several thousand A It is. Although it is possible to detect an overcurrent by the above-described method using inductance, the current for driving the control voltage of the power semiconductor element is further increased, so that the saturation current can be controlled at high speed. Have difficulty.

  On the other hand, when using a power MOSFET that has a large current capacity in the control voltage drive circuit to drive a large-capacity power semiconductor device, the control voltage is clamped by a configuration such as a conventional push-pull configuration using a bipolar transistor. It is difficult to do. In power semiconductors, improving current drive capability is effective in reducing conduction loss. At the same time, the current during overcurrent increases, so the breakdown tolerance during overcurrent such as a short circuit is reduced. End use becomes difficult.

  It is an object of the present invention to reduce overcurrent and to safely protect the power semiconductor by adjusting the control voltage of the power semiconductor at high speed and with high accuracy in the event of overcurrent of a large capacity power semiconductor. A semiconductor drive device is provided. In addition, by using this drive device, it is to provide a power converter having higher reliability and higher performance.

  In order to achieve the above object, a semiconductor drive device according to the present invention is connected in series to a drive circuit for supplying a drive signal of a semiconductor element to a control terminal (gate terminal) and a second main terminal (emitter terminal). An integration circuit that outputs an integral value of an electromotive voltage generated in an inductance or a value proportional to the integration value, and when the output of the integration circuit exceeds a predetermined level value, a current corresponding to the exceeded value is A shunt that shunts from a first connection point between itself and the control terminal (gate terminal) to a second connection point between itself and the inductance (a terminal on the semiconductor element side of the inductance or a terminal on the opposite side of the semiconductor element of the inductance) And a circuit.

  According to the present invention, a semiconductor driving device having a simple configuration using an integrating circuit and a shunt circuit realizes high-precision and high-reliability protection of power semiconductor elements, and is also driven by this semiconductor driving device. If the power conversion device is configured using the power semiconductor element, a low-loss power conversion device can be provided.

FIG. 1 is a diagram showing a schematic configuration of a power conversion device using a semiconductor drive device according to the present invention. FIG. 2 is a diagram showing a sequence of operating voltages and currents related to the semiconductor drive device when the main circuit shown in FIG. 1 is short-circuited. FIG. 3 is a diagram showing the configuration of the first embodiment of the semiconductor drive device according to the present invention. FIG. 4 is a diagram illustrating current characteristics of the shunt circuit according to the first embodiment. FIG. 5 is a diagram showing the configuration of a second embodiment of the semiconductor drive device according to the present invention. FIG. 6 is a diagram showing the configuration of a third embodiment of the semiconductor drive device according to the present invention. FIG. 7 is a diagram showing a configuration of a semiconductor driving apparatus according to a fourth embodiment of the present invention. FIG. 8 is a diagram showing a configuration of the semiconductor driving apparatus according to the fifth embodiment of the present invention. FIG. 9 is a diagram showing a configuration of a semiconductor driving apparatus according to the sixth embodiment of the present invention. FIG. 10 is a diagram showing an operation sequence at normal time and abnormal time according to a drive command to the semiconductor drive device according to the present invention, a drive status signal of the power converter, and the like. FIG. 11 is a diagram showing an overall configuration of a power conversion device using the semiconductor drive device according to the present invention.

  Hereinafter, Examples 1 to 6 will be described in detail with reference to the drawings as embodiments of the present invention.

FIG. 1 is a diagram showing a schematic configuration of a power conversion device using a semiconductor drive device according to the present invention.
The power conversion device 101 is a two-level inverter that uses, for example, an insulated gate bipolar transistor (IGBT, hereinafter referred to as “IGBT”) as a power semiconductor element, and drives, for example, a three-phase motor as a load 9. Each phase is composed of a main circuit 102 (U phase), 103 (V phase), and 104 (W phase). Here, since the V-phase main circuit 103 and the W-phase main circuit 104 have the same configuration as the U-phase main circuit 102, the details of the U-phase main circuit 102 are shown in FIG. The details are omitted for. FIG. 11 shows an overall configuration diagram of a two-level inverter that includes all three-phase arms, a logic unit, a DC power supply (Vdc), and a load, including the semiconductor drive device according to the present invention.

  The U-phase main circuit 102 includes power semiconductor IGBTs 1 and 2, inductances 3 and 4 directly connected to these power semiconductors, drive devices 5 and 6 that control a control voltage supplied to a control terminal of the power semiconductor, and a drive device 5 includes a logic unit 7 that outputs a drive command to 5 and 6, a parasitic inductance 8 of the main circuit, and a smoothing capacitor 10.

  The logic unit 7 generates drive commands 1 and 2 for the U-phase main circuit 102, and the drive devices 5 and 6 receiving the drive commands 1 and 2 receive the upper arms of the U phase, which are power semiconductor elements, respectively. The IGBT 2 of the lower arm and the IGBT 1 of the lower arm are controlled to be turned on / off. The V-phase main circuit 103 and the W-phase main circuit 104 function in the same manner, whereby the power conversion device 101 can drive the load 9 (for example, an electric motor).

  The IGBT of each phase constituting the power conversion device 101 is connected to the smoothing capacitor 10 connected to the main power supply in the same configuration as the U phase. The smoothing capacitor 10 is connected to a main power supply Vdc that supplies DC power.

  As an example of the driving device, the driving device 5 of the U-phase lower arm includes a driving circuit 13 connected to a gate terminal G and an emitter terminal E which are control terminals of the IGBT 1, and an inductance 3 connected in series to the emitter side of the IGBT 1. It is composed of an integrating circuit 11 that receives the voltage at both ends and a shunt circuit 12 that receives the output of the integrating circuit 11. Among these, the shunt circuit 12 is connected to the wiring connecting the gate terminal G of the IGBT 1 and the drive circuit 13, and the current from the drive circuit 13 or the gate terminal G of the IGBT 1 is converted into the inductance 3 according to the output voltage of the integration circuit 11. It has a structure that can be branched and flowed to the terminal.

  For example, when the output of the IGBT 1 (U-phase output) is conducting due to malfunction or destruction of the IGBT 2, when the IGBT 1 is turned on, the IGBT 1 is short-circuited via the power supply voltage Vdc and the inductance. The sequence of current and voltage waveforms in this case is shown in FIG. Since IGBT1 is in a short circuit state, its main current I rises. At this time, in the inductance 3, if the inductance is Le, an electromotive voltage Le × dI / dt is generated. The integrating circuit 11 integrates the electromotive voltage as an input, and outputs the integrated value or a voltage proportional to the integrated value. Here, since the integral value is proportional to the main current I as in the integral output shown in FIG. 2, the presence or absence of a short circuit is detected depending on whether or not this value exceeds a predetermined level value. Is possible.

  In the present invention, when the integral value output from the integrating circuit 11 or a value proportional to the value exceeds a predetermined level value by the shunt circuit 12, a current corresponding to the exceeded value is supplied to the control terminal of the IGBT 1. Is shunted from the circuit connected to the main circuit connected to the terminal of the inductance 3. As a result, the control voltage of the IGBT 1, that is, the gate-emitter voltage decreases, and as a result, the main current I decreases. If the main current I decreases, the loss that occurs in the IGBT 1 at the time of a short circuit decreases, so the time until the main switching element (IGBT), which is a power semiconductor, is destroyed increases, and can be safely shut off. Become.

  Whether or not to shut off the main switching element is determined within the increased time until the destruction, and based on the determination result, the switching is performed as shown in FIG. At this time, the control voltage is adjusted by the drive circuit 13 so that the current change rate at the time of interruption is within an appropriate range. As a result, the main current I can be safely cut off, and the power semiconductor and the power converter using the power semiconductor can be protected without erroneous detection due to noise or the like.

  Here, the inductance connected in series to the main switching element is preferably an inductance connected to the emitter side terminal E of the IGBT 1 in the case of FIG. In this case, as shown in FIG. 2, the electromotive voltage Vet of the inductance 3 becomes a positive voltage at the start of the short circuit, but the direction of this voltage increases the voltage applied to the shunt circuit 12. If the short circuit is fast and dI / dt is large, it is necessary to reduce the control voltage earlier for protection. By making this possible, the voltage applied to the shunt circuit 12 increases and the current that branches from the control terminal to the shunt circuit 12 increases, so that the control voltage is reduced faster and the main current I is limited. It becomes possible. That is, more accurate protection can be achieved.

  Further, as shown in FIG. 2, the output voltage of the integrating circuit 11 is desirably maintained at a certain value without decreasing after exceeding a certain value. For this purpose, it is desirable that the integration coefficient is changed according to the polarity of the electromotive voltage. In the case of such a configuration, when the control voltage decreases due to the operation of the shunt circuit 12 at the time of a short circuit, the main current I decreases. At this time, the sign of Vet is reversed, and the voltage of the integrating circuit decreases. Thereby, the current fluctuation of the shunt circuit 12 increases, and there is a concern that the control voltage may be vibrated. By adopting a configuration in which the above-described integration coefficient is changed, such a concern can be avoided and more accurate protection can be achieved.

  In addition, with the configuration of the drive device according to the present invention, even if a power semiconductor having a high saturation current and a lower conduction loss is used, by reducing the saturation current at the time of a short circuit, an effective breakdown resistance can be obtained. Thus, it is possible to safely protect even during an overcurrent such as a short circuit, and it is possible to realize a power converter with lower loss with high reliability.

FIG. 3 is a diagram showing the configuration of the first embodiment of the semiconductor drive device according to the present invention.
The integrating circuit 11 according to the first embodiment is an asymmetrical CR integrating circuit connected to the inductance 3 between the control emitter terminal and the main emitter terminal of the IGBT module 21. The integrating circuit 11 includes resistors 22 and 24, a diode. 23 and a capacitor 25. The output of the integrating circuit 11 defines the voltage of the resistor 28 via the Zener diode 26 and the diode 27 of the shunt circuit 12. The on / off state of the nMOS transistor 31 is controlled by the voltage of the resistor 28. A resistor 29 and a diode 30 are connected to the drain of the nMOS transistor 31 to limit the current value and flow direction of the shunt circuit 12.

  The drive circuit 13 includes an output circuit 33 and a resistor 32 connected to the output circuit 33, and turns on and off the main switching element 1 at an appropriate speed. Here, the inductance 3 connected in series to the main switching element 1 uses the inductance present in the power semiconductor module 21.

  With such a configuration, when the electromotive voltage is integrated, if the electromotive voltage of the inductance 3 is positive, the diode 23 is in the forward direction, current flows through the resistances of the resistors 22 and 24, and electric charge flows into the capacitor 25. Accumulated. As a result, a voltage corresponding to the integral value of the electromotive voltage of the inductance 3 is output. Here, when the main current is reduced and the electromotive voltage of the inductance 3 is reduced, the diode 23 is reverse-biased, and the charge of the capacitor 25 is discharged only through the resistor 22. Change can be reduced. Since the integration coefficient changes depending on the polarity of the electromotive voltage as described above, it is possible to suppress a rapid current fluctuation in the shunt circuit, and it is possible to protect with higher accuracy.

  In the shunt circuit 12, the output of the integrating circuit increases due to a short circuit, and when the breakdown voltage of the Zener diode 26 is exceeded, current flows, the voltage of the resistor 28 increases, the nMOS transistor 31 is turned on, and the control terminal By passing current through the main emitter terminal, the control voltage is reduced. Here, in the case of an overcurrent, the output stage 33 is turned on so as to set the control voltage to a positive control voltage. However, when a current flows through the shunt circuit 12, the voltage drop of the resistor 32 increases and the control voltage is increased. Is reduced. The control voltage value and the rate of change thereof can also be controlled by adjusting the current of the shunt circuit 12 by the resistor 29. Also, the level of the main current to be reduced can be adjusted by the breakdown voltage of the Zener diode 26.

  Furthermore, even if the output of the integration circuit 11 is lowered by the diode 27, the current from the gate of the nMOS transistor 31 does not flow into the integration circuit 11, so that the gate voltage of the nMOS transistor 31 decreases rapidly. Therefore, it is possible to avoid a sudden current fluctuation of the shunt circuit 12 and to perform stable control voltage control.

  Here, it goes without saying that during normal switching other than during an overcurrent such as a short circuit, no current flows through the shunt circuit 12 and the control voltage is not affected. For example, when the main current is cut off, a negative electromotive voltage is generated in the inductance 3 as shown in FIG. 2, but if the absolute value of the negative electromotive voltage is large at this time, the built-in diode of the nMOS transistor 31 is turned on. There is a possibility that a current flows from the inductance 3 to the control terminal via the route and raises the control voltage. In order to prevent such a current, if a diode 30 is provided in series with the nMOS transistor 31 and the diode 30 is provided with a breakdown voltage equal to or greater than the maximum value of the negative electromotive voltage, this causes normal switching. Control voltage fluctuations can be prevented.

  FIG. 4 is a diagram showing current characteristics of the shunt circuit 12 of the semiconductor drive device (Example 1) shown in FIG. As shown in the figure, when the output of the integrating circuit 11 is equal to or greater than a predetermined value, the shunt circuit 12 shunts current from the control terminal. Further, by configuring the shunt circuit 12 to be connected to the inductance 3, when the electromotive voltage Vet of the inductance 3 is large and di / dt is high, the current of the shunt circuit 12 increases. As a result, it is possible to limit the control voltage at high speed and limit the main current with high accuracy.

FIG. 5 is a diagram showing the configuration of a second embodiment of the semiconductor drive device according to the present invention.
The module 111 is a package of a semiconductor and a part of a driving device thereof. The IGBT 1 is mounted by being connected to the wiring inductances 114 and 115, and the module 111 includes an integration circuit 11 and a shunt circuit 12. A configured current limiting circuit 112 is mounted. The current limiting circuit 112 is connected to the gate terminal, the emitter terminal, and the wiring inductance 114 of the IGBT 1. The module 111 is on / off controlled by a drive circuit 13 provided outside.

  By using the power semiconductor drive device with such a configuration, the device is miniaturized, and the current limiting circuit 112 is provided in the immediate vicinity of the gate terminal, so that the delay of control voltage control due to the inductance of the gate wiring hardly occurs. . Therefore, the current can be limited with higher accuracy. Here, the IGBT 1 is shown by a single circuit symbol for simplicity, but there is no problem even if a plurality of chips are connected in parallel. Further, the current limiting circuit 112 does not necessarily have to be mounted inside the package, and may be configured to be mounted outside.

FIG. 6 is a diagram showing the configuration of a third embodiment of the semiconductor drive device according to the present invention.
The difference from the first and second embodiments is that an operational amplifier is used in the integrating circuit. In the integrating circuit 41 of the third embodiment, the terminal voltage of the inductance 3 is divided by the voltage dividing resistors 42 and 43, and the direct current component is removed by the capacitor 44, which is used as one input of the operational amplifier 49. The other input of the operational amplifier 49 is biased with a certain reference voltage 48. These are means for setting the input voltage to the operational amplifier 49 within the allowable input voltage range.

  An integration calculation unit including an operational amplifier 49, a resistor 45, a resistor 46, and a capacitor 47 executes an integration calculation, and the integration value is output to the shunt circuit 12 at the next stage. When the output current of the operational amplifier 49 is insufficient and the control speed of the nMOS transistor 31 is insufficient, an amplifier (not shown) may be provided between the operational amplifier 49 and the shunt circuit 12. By adopting such a configuration, the integrated value of the electromotive voltage can be obtained with higher accuracy, so that the saturation current can be accurately controlled, and a power converter with lower loss and high reliability can be realized.

  Further, the power supply voltage Vcc of the operational amplifier 49 or the amplifier (not shown) is supplied by a power supply circuit 51. The power supply voltage Vcc is generated by charging a capacitor 54 through a current limiting resistor 52 and a power supply discharge preventing diode 53 connected to the power supply 50 of the drive circuit 13, and the voltage value is a Zener diode 55. To adjust to the required value. With such a configuration, a stable power source can be supplied to the operational amplifier 49 whose potential varies with the terminal voltage of the inductance 3, and the drive device can be reduced in size and weight.

FIG. 7 is a diagram showing a configuration of a semiconductor driving apparatus according to a fourth embodiment of the present invention.
Similar to the third embodiment, the fourth embodiment uses an operational amplifier 49 for the integration circuit 41. Unlike the third embodiment, the fourth embodiment includes a circuit for shunting from the control terminal to the emitter terminal of the IGBT by the shunt circuit 12. Features. With such a configuration, it is possible to use the negative power source 57 for driving the gate as the power source of the operational amplifier 49, and the power source can be simplified.

FIG. 8 is a diagram showing a configuration of the semiconductor driving apparatus according to the fifth embodiment of the present invention.
The fifth embodiment is characterized by the configuration of the shunt circuit. The shunt circuit 121 regulates the voltage of the resistor 120 through the Zener diode 122 and the diode 123, thereby controlling the on / off of the nMOS transistor 124. The nMOS transistor 124 drives the switch circuit 139 via a diode 125 and a resistor 126 connected in series to its drain. The switch circuit 139 controls on / off of the active clamp circuit 138.

  When the output of the integration circuit 11 exceeds a certain value during an overcurrent, the nMOS transistor 124 is turned on, and the gate potential of the pMOS transistor 131 of the switch circuit 139 is lowered, so that the pMOS transistor 131 is turned from the off state to the on state. As a result, a voltage is applied to the Zener diode 128 of the active clamp circuit 138, and the nMOS transistor 132 of the active clamp circuit 138 is turned on. Here, the Zener voltage of the Zener diode 128 is set to a value that clamps the gate voltage of the IGBT 1 to a certain value in order to limit the energization current of the IGBT 1. When the nMOS transistor 132 is turned on, the gate-emitter voltage of the IGBT 1 is clamped to a certain value, and the energization current of the IGBT 1 is limited.

  With the above configuration, the gate voltage of the power semiconductor can be clamped to a constant value using an nMOS transistor suitable for increasing the capacity. Therefore, in order to drive a large-capacity power semiconductor, even when a MOS transistor is used as in the output stage 133, a large current can be shunted from the gate terminal. As a result, the gate voltage of the power semiconductor, that is, the control voltage can be controlled at high speed, and a large-capacity power semiconductor can be protected with high reliability.

FIG. 9 is a diagram showing a configuration of a semiconductor driving apparatus according to the sixth embodiment of the present invention.
The sixth embodiment constitutes a shunt circuit different from the fifth embodiment. The shunt circuit 150 includes a series circuit of a switch circuit 155 and an active clamp circuit 156. The active clamp circuit 156 is connected to the wiring side of the gate terminal, and the switch circuit 155 is composed of an nMOS transistor 152. The output of the integration circuit 141 is realized when the output of the integration circuit 141 at the time of overcurrent turns on the nMOS transistor 152, thereby realizing a function similar to that of the fifth embodiment shown in FIG. 8 with a simpler shunt circuit configuration. is there.

Next, an operation sequence from the detection of a short circuit to the adjustment of the control voltage and the subsequent interruption of the main current will be described.
FIG. 10 is a diagram showing an operation sequence at normal time and abnormal time according to a drive command to the semiconductor drive device and a drive status signal of the power conversion device according to the present invention. (2) shows the operation sequence at the time of abnormality. When an abnormality occurs due to the occurrence of a short circuit, the short circuit is detected, the control voltage is adjusted, and then the main current is cut off.

  In the normal state of (1) in FIG. 10, the control voltage to the power semiconductor element is turned on / off according to the drive command, and this state is reflected in the drive status signal after the delay time of the circuit has elapsed. Of course, no short circuit determination occurs during normal operation.

  At the time of abnormality due to the occurrence of a short circuit in (2), the drive command is in an ON state, but if the current at the time of the short circuit exceeds a certain value, the control voltage is limited and lowered by the shunt circuit according to the present invention. The control voltage drop at this time is determined to be in an OFF state, and a short-circuit state is determined if the ON drive command and the drive status determined to be OFF have a certain time (short-circuit determination time shown in the figure). Then, the drive command is changed to an off command to interrupt the current.

  Further, the logic unit 7 shown in FIG. 1 can be implemented by software without providing a circuit for determining a short circuit and holding the determination signal on the driving device side. Thereby, the semiconductor drive device of the power converter can be configured with a simpler configuration. The same function can be realized even if the same short-circuit determination is performed on the drive device side.

  In the above, an inverter using an IGBT has been described as an example of a power conversion device using a semiconductor drive device according to the present invention. However, a power semiconductor is not limited to an IGBT, but includes a power MOSFET. It can be applied to other power semiconductors. Further, the power converter is not limited to an inverter, and can be applied to other power converters such as a DC-DC converter and an AC-DC converter.

1, 2: IGBT 3, 4, 8, 114, 115: Inductance 5, 6: Drive device 7: Logic unit 9: Load 10: Smoothing capacitor 11, 41: Integration circuit 51: Power supply circuit 12, 121, 150: Shunt Circuit 13: Drive circuit 21: IGBT modules 22, 24, 28, 29, 32, 42, 43, 45, 46, 52, 120, 126, 127, 130, 134, 145, 146, 153: Resistors 23, 27, 30, 53, 123, 125: Diodes 25, 44, 47, 54: Capacitors 26, 55, 122, 128, 129, 154: Zener diodes 31, 124, 132, 135, 151, 152: nMOS transistors 33: Output stage 48: Reference power supply 49: Operational amplifier 50, 57: Power supply 101: Power converter 102, 103, 104: U V, W phase main circuit 111: Module 112: current limiting circuit 131: pMOS transistors 138,156: active clamp circuit 139,155: switch circuit

Claims (10)

A semiconductor drive device for driving a semiconductor element having first and second main terminals and a control terminal for controlling a main current flowing in the first and second main terminals,
A drive circuit for supplying a drive signal of the semiconductor element to the control terminal;
An integration circuit that outputs an integral value of an electromotive voltage generated in an inductance connected in series to the second main terminal or a value proportional to the integral value;
When the output of the integration circuit exceeds a predetermined level value, a current corresponding to the exceeded value is supplied from the first connection point connecting itself and the control terminal to the semiconductor of the inductance. A semiconductor drive device comprising: a shunt circuit that shunts to a second connection point that connects a terminal on an element side or connects itself to a terminal on the side opposite to the semiconductor element of the inductance. The semiconductor drive device according to claim 1,
The semiconductor drive device according to claim 1, wherein the inductance is an inductance of a wiring in a package on which the semiconductor element is mounted. The semiconductor drive device according to claim 1 or 2,
The integration circuit is constituted by a resistor and a capacitor, or is constituted by an operational amplifier, a resistor and a capacitor. The semiconductor drive device according to claim 1 or 2,
The semiconductor drive device, wherein the integration circuit changes an integration coefficient according to a polarity of the electromotive voltage. The semiconductor drive device according to claim 4,
The integration circuit includes a resistor circuit and a capacitor in which a first resistor, a second resistor, and a series circuit of diodes are connected in parallel, and a capacitor. It is a semiconductor drive device of any one of Claims 1-5,
The integration circuit and the shunt circuit are built in a package on which the semiconductor element is mounted. It is a semiconductor drive device of any one of Claims 1-6, Comprising:
The shunt circuit connects a drain terminal of a MOS transistor from the first connection point via a resistor and a diode, connects a source terminal of the MOS transistor to the second connection point, and a gate terminal of the MOS transistor. The semiconductor drive device is configured by inputting the output of the integration circuit into the circuit. It is a semiconductor drive device of any one of Claims 1-6, Comprising:
When the second connection point connects the shunt circuit and the terminal on the semiconductor element side of the inductance,
The shunt circuit includes an active clamp circuit that clamps a control voltage applied to the control terminal between the first connection point and the second connection point, and the active circuit that receives the output of the integration circuit. A semiconductor drive device comprising a switch circuit for controlling on / off of a clamp circuit. It is a semiconductor drive device of any one of Claims 1-8, Comprising:
An ON period of the driving signal supplied from the driving circuit to the control terminal is compared with a period in which the output of the integrating circuit exceeds the predetermined level value, and the overlapping of both periods exceeds a certain time. A semiconductor driving device, wherein the semiconductor element is turned off when exceeding. A power conversion device comprising a plurality of the semiconductor elements driven by the semiconductor drive device according to any one of claims 1 to 9,
A power conversion apparatus in which a plurality of upper and lower arms each having two semiconductor elements connected in series to a DC power source are connected in parallel, and the semiconductor driving device is connected to each of the semiconductor elements.

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