JP2017162990A - Electronic component built-in substrate and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic component built-in substrate having a thin and simple structure, and emitting less radio waves.SOLUTION: An electronic component built-in substrate 1 has an insulating substrate 10 including a through hole 10a for housing electronic components, electronic components 2a-2c housed in the through hole 10a, and a sealing member 5 filling the through hole 10a, and coating the electronic components 2a-2c. A first metal film 31 surrounding the through hole 10a is formed on the sidewall of the insulating substrate 10, and the terminals 21a-21c of the electronic components 2a-2c are exposed from the sealing member 5 on one surface 10F of the insulating substrate 10. A second metal film 32 is formed on the other surface 10S of the insulating substrate 10 opposite to the one surface 10F, and the opening of the through hole 10a in the other surface 10S is covered with the second metal film 32.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an electronic component built-in substrate having a metal film surrounding the electronic component, and a method for manufacturing the same.

  Patent Document 1 discloses a high-frequency module having a transmission circuit that generates a high-frequency signal.

International Publication No. 2014/069658

  In the high-frequency module disclosed in Patent Document 1, electronic components such as an integrated circuit device and a transistor that constitute a transmission circuit are mounted on a substrate. These electronic components are covered in a case together with the substrate. Therefore, the thickness of the entire module is considered to be the sum of the thickness of the substrate and the electronic component plus the thickness of the case and an appropriate clearance length between the case and the electronic component.

  An electronic component built-in substrate according to the present invention includes an insulating substrate having a through hole for accommodating an electronic component, an electronic component accommodated in the through hole, a filling in the through hole, and covering the electronic component. And a sealing member. A first metal film surrounding the through hole is formed on a side wall of the insulating substrate, and a terminal of the electronic component is exposed from the sealing member on one surface side of the insulating substrate. A second metal film is formed on the other surface side opposite to the one surface, and the opening on the other surface side of the through hole is covered with the second metal film.

  In the method for manufacturing an electronic component built-in substrate according to the present invention, an insulating substrate having at least a part corresponding to an outer peripheral shape of the electronic component built-in substrate is prepared, and a first metal film is formed on the insulating substrate. Forming a through hole in the insulating substrate; preparing a base member that closes one opening of the through hole; superimposing the base member and the insulating substrate; An electronic component is disposed on the base member directly or via a conductor, a resin material is filled in the through-hole, and an opening on the opposite side of the through-hole to the base member is covered. Forming two metal films in contact with the first metal film, and removing the base member. The first metal film is formed on the outer peripheral end surface of the insulating substrate so as to surround the formation region of the through hole.

  According to the embodiment of the present invention, since the electronic component is accommodated in the through hole surrounded by the metal film on the side wall of the insulating substrate, the electronic component with less leakage of radio waves to the outside and a thin thickness is provided. An embedded substrate is provided. In addition, since it is possible to connect the outside and the terminals of the electronic component through a short path, it is considered that the quality of the input / output signal is less deteriorated and the characteristics of the electronic component built-in substrate are stabilized. Furthermore, since a case or the like is not required, it is considered that the electronic component built-in substrate is easily manufactured at a low manufacturing cost.

Sectional drawing of an example of the electronic component built-in board | substrate of one Embodiment of this invention. The top view of an example of the electronic component built-in substrate of FIG. The bottom view which shows an example of the surface by the side of the 2nd conductor layer of the electronic component built-in board | substrate of FIG. The top view which shows the other example of the shape of the 1st metal film of the electronic component built-in board | substrate of FIG. The top view which shows the other example of the shape of the 1st metal film of the electronic component built-in board | substrate of FIG. The top view which shows the other example of the shape of the 1st metal film of the electronic component built-in board | substrate of FIG. The enlarged view which shows an example of the exposed part of the outer peripheral side surface of the electronic component built-in board | substrate of FIG. The enlarged view which shows the other example of the 2nd conductor layer of the electronic component built-in board | substrate of FIG. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention. The figure which shows an example of the manufacturing method of the electronic component built-in board of one Embodiment of this invention.

  An electronic component built-in substrate according to an embodiment of the present invention will be described with reference to the drawings. As shown in FIGS. 1, 2A and 2B, the electronic component built-in substrate 1 of the embodiment includes an insulating substrate 10 having a through hole 10a, electronic components 2a to 2c accommodated in the through hole 10a, And a sealing member 5 that fills the through hole 10a and covers the electronic components 2a to 2c. A first metal film 31 composed of a lower layer film 31 a and an upper layer film 31 b is formed on the side wall of the insulating substrate 10. The first metal film 31 surrounds the through hole 10 a on the side wall of the insulating substrate 10. As shown in FIG. 1, the terminals 21 a to 21 c of the electronic components 2 a to 2 c are exposed from the sealing member 5 on the one surface 10 </ b> F side of the insulating substrate 10. 1 is a cross-sectional view taken along the line II shown in FIG. 2B. In FIG. 2A, a second metal film 32 and a cover layer 33 described later are omitted so that the first metal film 31 is clearly shown. Further, in FIG. 2B, the bump 73 described later and the third and fourth conductor pads 7b1, 7b2 substantially overlap each other, so the bump 73 is omitted.

  The electronic components 2 a to 2 c are disposed in a hollow portion formed by the through hole 10 a in the insulating substrate 10. Accordingly, it is considered that the thickness of the portion occupied by the insulating substrate 10 and the electronic components 2a to 2c is reduced in the total thickness of the electronic component built-in substrate 1. That is, it is considered that the thickness of the electronic component built-in substrate 1 as a whole is thinner than when the electronic components 2 a to 2 c are mounted on the surface of the insulating substrate 10.

  Further, since the first metal film 31 is formed on the side wall of the insulating substrate 10 so as to surround the through hole 10a, at least laterally (in the thickness direction of the insulating substrate 10) from the electronic components 2a to 2c in the through hole 10a. It is thought that leakage of radio waves in the direction orthogonal to the direction is suppressed. It is considered that the electronic component built-in substrate 1 having good characteristics with less radio waves leaking to the outside can be obtained. It is presumed that there is little adverse effect on the electric circuit around the electronic component built-in substrate 1. In particular, in the electronic component built-in substrate 1, as shown in FIG. 2A, the first metal film 31 is formed on the entire side wall of the insulating substrate 10. 2A and 2B, the broken line shown on the inner peripheral side along the solid line showing the outer periphery of the electronic component built-in substrate 1 indicates the outer periphery of the insulating substrate 10. A portion between the solid line and the broken line is a coating portion formed by the first metal film 31. That is, the first metal film 31 is formed on the entire side wall of the insulating substrate 10, and the periphery of the through hole 10a is surrounded by the first metal film 31 over the entire circumference. It is considered that there is little leakage of radio waves in all directions on the sides of the electronic components 2a to 2c. However, the insulating substrate 10 may have an exposed portion that is not covered with the first metal film 31 on the side wall, that is, the outer peripheral side surface. The first metal film 31 only needs to surround the through hole 10a at least partially. An example in which the first metal film 31 is not formed on a part of the outer peripheral side surface of the insulating substrate 10 will be described later.

  In the present embodiment, the second metal film 32 is formed on the other surface 10S side opposite to the one surface 10F of the insulating substrate 10. The second metal film 32 is mainly formed on the surface of the sealing member 5 on the other surface 10S side of the insulating substrate 10 and covers the entire surface of the sealing member 5. That is, the second metal film 32 covers the opening of the through hole 10 a on the other surface 10 </ b> S side of the insulating substrate 10. Therefore, it is considered that leakage of radio waves from the electronic components 2a to 2c to the other surface 10S side of the insulating substrate 10 is suppressed. In the example shown in FIG. 1, a coating layer 33 is formed on the second metal film 32. The covering layer 33 covers the second metal film 32.

  In the example shown in FIG. 1, the first metal film 31 is formed extending to the other surface 10 </ b> S of the insulating substrate 10. The first metal film 31 on the other surface 10S of the insulating substrate 10 surrounds the periphery of the opening of the through hole 10a. The outer peripheral portion of the second metal film 32 is laminated on the first metal film 31 on the other surface 10S of the insulating substrate 10 and is directly connected to the first metal film 31. The electronic components 2a to 2c are surrounded by the first metal film 31 and the second metal film 32 except for the one surface 10F side of the insulating substrate 10. By connecting the first metal film 31 and the second metal film 32 having conductivity, the shield layer 3 having an electrically integrated structure having a side surface and a ceiling surface is formed. That is, the electronic components 2 a to 2 c are shielded from the outside by the shield layer 3 except for the one surface 10 </ b> F side of the insulating substrate 10. It is considered that the emission of radio waves from the electronic components 2a to 2c to the outside of the electronic component built-in substrate 1 is more effectively suppressed. It is considered that the electrical characteristics of an electronic device using the electronic component built-in substrate 1 are stable. Note that the first metal film 31 may not be extended to the surface of the other surface 10S of the insulating substrate 10. For example, the first metal film 31 may be formed only to reach the other surface 10S. Even in that case, it is considered that the first metal film 31 and the second metal film 32 can come into contact with each other.

  On the other hand, as shown in FIG. 1, the terminals 21 a to 21 c of the electronic components 2 a to 2 c are exposed on the surface 5 F of the sealing member 5 on the one surface 10 </ b> F side of the insulating substrate 10. There is no need to provide wiring or the like for electrical connection with the electronic components 2a to 2c in the through hole 10a. Electrical connection between an external electric circuit and the electronic components 2a to 2c on the one surface 10F side of the insulating substrate 10 is easy. The electronic components 2a to 2c and the external electric circuit can be connected by a short path. It is considered that the characteristics of the electronic component built-in substrate 1 are stable. Further, it is not necessary to provide an opening or the like in the shield layer 3 for connection between the electronic components 2a to 2c and an external electric circuit. The emission of radio waves from such an opening is prevented.

  As shown in FIG. 1, in this embodiment, the electronic component built-in substrate 1 has a solder resist layer 6 and a first conductor layer 7 a on the one surface 10 </ b> F side of the insulating substrate 10. In the example of FIG. 1, the first conductor layer 7a has a three-layer structure including a metal foil 7aa, a seed metal film 7ab, and an electrolytic plating film 7ac. The first conductor layer 7a includes a plurality of first conductor pads 7a1. The first conductor layer 7a includes a second conductor pad 7a2 in addition to the first conductor pad 7a1. The electronic components 2a to 2c are mounted on the first conductor pad 7a1. The terminals 21a to 21c of the electronic component are fixed to the first conductor pad 7a1 by the conductive bonding material 76 and are electrically connected to the first conductor pad 7a1. The first conductor pad 7a1 and the second conductor pad 7a2 are covered with the solder resist layer 6 on the periphery.

  The electronic component built-in substrate 1 further has resin insulating layers 74b and 74a and conductor layers 7c and 7b on one surface 10F of the insulating substrate 10 with the first conductor layer 7a and the solder resist layer 6 interposed therebetween. . In the example of FIG. 1, the second conductor layer 7b, the first resin insulation layer 74a, the third conductor layer 7c, and the second resin insulation layer 74b are laminated in this order from the side far from the insulating substrate 10, and the second resin insulation. A first conductor layer 7a and a solder resist layer 6 are formed on the layer 74b. The second conductor layer 7b is embedded in the first resin insulating layer 74a with one surface exposed from the surface of the first resin insulating layer 74a opposite to the insulating substrate 10. Bumps 73 made of solder or the like are formed on the exposed surface of the second conductor layer 7b from the first resin insulating layer 74a. The second conductor layer 7b includes a plurality of third conductor pads 7b1 and a fourth conductor pad 7b2. The third conductor layer 7c has the same three-layer structure as the first conductor layer 7a. Via conductors 75a and 75b are formed in the first and second resin insulation layers 74a and 74b, respectively, and the conductor layers on both sides of each resin insulation layer are connected by via conductors 75a and 75b, respectively. The third conductor pad 7b1 is electrically connected to any of the electrodes 21a to 21c of the electronic component via the via conductors 75a and 75b and the first conductor pad 7a1. The fourth conductor pad 7b2 is electrically connected to the first metal film 31 via the via conductors 75a and 75b and the second conductor pad 7a2.

  By the second conductor layer 7b and the first resin insulating layer 74a, a surface layer portion on the opposite side to the other surface 10S of the insulating substrate 10 of the electronic component built-in substrate 1 is formed. By forming a wiring pattern (not shown) in an appropriate shape on the first to third conductor layers 7a to 7c, the electronic components 2a to 2c and an external electric circuit can be placed at any position on the second conductor layer 7b. Can be electrically connected. Further, since the second conductor layer 7b is embedded in the first resin insulating layer 74a, a solder short between the plurality of third conductor pads 7b1 and between the third conductor pads 7b1 and the fourth conductor pads 7b2. It is thought that there are few. The mounting yield and reliability of electronic devices using the electronic component built-in substrate 1 are considered to be high. Since the electronic component built-in substrate 1 illustrated in FIG. 1 has three conductor layers, it is considered that a complicated electric circuit can be formed in the electronic component built-in substrate 1. The electronic component built-in substrate of the embodiment may have more conductor layers and resin insulating layers between the first conductor layer 3a and the second conductor layer 3b.

  In the example shown in FIG. 1 and FIG. 2B, the first metal film 31 is formed to extend up to the one surface 10 </ b> F of the insulating substrate 10. The first metal film 31 on the one surface 10F of the insulating substrate 10 surrounds the periphery of the opening of the through hole 10a. The second conductor pad 7a2 is formed in a frame shape so as to be connected to the first metal film 31 on the one surface 10F of the insulating substrate 10, and is connected to the first metal film 31 by the bonding material 76 (in FIG. 2B). A second conductor pad 7a2 having substantially the same shape as the fourth conductor pad 7b2 is formed at a position overlapping the fourth conductor pad 7b2. The first metal film 31 surrounding the periphery of the through hole 10a and the frame-like second conductor pad 7a2 are considered to effectively suppress the propagation of radio waves along the one surface 10F of the insulating substrate 10 from the through hole 10a. It is done. Further, the shield layer 3 can be at a ground potential by connecting the fourth conductor pad 7b2 to the ground pattern of the motherboard. It is considered that the potential of the shield layer 3 is stabilized and an excellent shielding action can be obtained. The first metal film 31 is not necessarily extended to the surface of the one surface 10F of the insulating substrate 10. For example, the first metal film 31 may be formed only to reach the one surface 10F. Even in that case, it is considered that the first metal film 31 and the second conductor pad 7a2 can be connected.

  The positional relationship between the insulating substrate 10 and the electronic components 2a to 2c in the thickness direction of the electronic component built-in substrate 1 can be adjusted by the supply amount of the bonding material 76, the size of the second conductor pads 7a2, and the like. For example, the surface of the portion of the first metal film 31 on the one surface 10F of the insulating substrate 10 (the surface facing the first conductor layer 7a) of the terminals 21a to 21c of the electronic components exposed on the surface 5F of the sealing member 5 The amount of the bonding material 76 or the like may be adjusted so as to be substantially flush with the surface. The bonding material on the first conductor pad 7a1 and the second conductor pad 7a2 is relatively free of stress on the bonding material 76 via the electronic components 2a to 2c and the insulating substrate 10 due to thermal expansion of the sealing member 5 or the like. It is inferred that it is distributed to each of 76.

  The planar shape of the insulating substrate 10 (projected shape onto a plane orthogonal to the thickness direction of the insulating substrate 10, hereinafter, “planar shape” is used in the same meaning) is a substantially square shape shown in FIGS. 2A and 2B. For example, it may be an arbitrary shape such as a rectangle or a circle. Further, the thickness of the insulating substrate 10 occupies most of the thickness of the electronic component built-in substrate 1 and defines the approximate thickness of the electronic component built-in substrate 1. The thickness of the insulating substrate 10 is, for example, not less than 0.5 mm and not more than 1.6 mm. The thickness (height) of the electronic components 2 a to 2 c that can be completely accommodated in the through hole 10 a is determined by the thickness of the insulating substrate 10. In other words, the thickness of the insulating substrate 10 can be appropriately selected depending on the thickness of the electronic component housed in the through hole 10a. The insulating substrate 10 gives moderate rigidity to the electronic component built-in substrate 1 and provides a formation region of the through hole 10 a and a formation region of the first metal film 31. The material of the insulating substrate 10 is not particularly limited as long as it has these functions. For example, the material of the insulating substrate 10 may be an epoxy resin and may contain inorganic particles such as silica. The insulating substrate 10 may include a reinforcing material such as a glass cloth. Preferably, a prepreg is used as the material for the insulating substrate 10.

  The through hole 10a is formed in the insulating substrate 10 by, for example, irradiation with a laser beam or the like. In the example shown in FIG. 2A, the through hole 10 a has a substantially square planar shape, and is located at a substantially central portion of the insulating substrate 10. However, the shape and size of the through hole 10a and the position in the insulating substrate 10 are not limited to the example shown in FIG. 2A. For example, the shape and size of the through hole 10a can be determined according to the electronic component to be accommodated inside. In FIG. 1, the wall surface around the through hole 10 a is substantially parallel to the thickness direction of the insulating substrate 10. However, for example, the wall surface around the through hole 10a may be inclined toward the center side of the through hole 10a toward the one surface 10F side of the insulating substrate 10 or may be inclined in the opposite direction.

  In the through hole 10a, a plurality of electronic components 2a to 2c may be accommodated as illustrated, or only one electronic component may be accommodated. The electronic components 2a to 2c arranged in the through hole 10a may be passive components or active components. Moreover, both a passive component and an active component may be accommodated in one through-hole 10a. Electronic components can be connected with a short wiring. Examples of passive components include surface mount type or other forms of inductors, capacitors, resistors, and the like. Examples of active components include bare chips, WLP, or other forms of integrated circuit devices, transistors, or diodes, and particularly semiconductor devices that operate at high frequencies. However, neither a passive component nor an active component is limited to these.

  The lower layer film 31a constituting the first metal film 31 is, for example, an electroless copper plating film, and the upper layer film 31b is, for example, an electrolytic copper plating film. However, the first metal film 31 is not limited to the structure shown in FIG. 1, and may include only one layer or may include three or more metal films. The first metal film 31 may be a film made of another metal material such as nickel, or may be a sputtering film or a vapor deposition film. The thickness of the first metal film 31 is 3 μm or more and 15 μm or less, preferably 5 μm or more and 10 μm or less. It is considered that a good radio wave blocking action can be obtained and the formation time of the first metal film 31 is short.

  As described above, the first metal film 31 is not necessarily formed to extend to the surfaces of the one surface 10F and the other surface 10S of the insulating substrate 10. The first metal film 31 may be formed so as to reach, for example, the one surface 10F and / or the other surface 10S of the insulating substrate 10 or the thickness direction of the insulating substrate 10 without reaching any surface. It may be formed only partially.

  Further, the first metal film 31 is not necessarily formed on the entire outer peripheral side surface of the insulating substrate 10. Even in such a case, it is considered that leakage of radio waves from at least a portion covered with the first metal film 31 is reduced. The first metal film 31 on the one surface 10F and / or the other surface 10S of the insulating substrate 10 may not necessarily surround the entire through hole 10a as in the example of FIGS. 2A and 2B. An arbitrary pattern of the first metal film 31 can be formed on the one surface 10F and the other surface 10S of the insulating substrate 10. An example in which the first metal film 31 is not formed on the entire outer peripheral side surface of the insulating substrate 10 is shown in FIGS. 2A, the second metal film 32 and the covering layer 33 are omitted in FIGS. 3A to 3C. Further, a portion between the solid line indicating the outer periphery of the electronic component built-in substrate 1 and the broken line shown on the inner peripheral side is a coating portion formed by the first metal film 31.

  FIG. 3A shows an example of the insulating substrate 10 having exposed portions 10c that are not covered with the first metal film 31 at two locations on the outer peripheral side surface. The first metal film 31 on the side wall of the insulating substrate 10 is divided at the exposed portion 10c. If the first metal film 31 is divided in this manner, it is assumed that, for example, stress generated due to the difference in thermal expansion coefficient between the insulating substrate 10 and the first metal film 31 is easily dispersed when the ambient temperature changes. . It is considered that peeling or cracking of the first metal film 31 is unlikely to occur. The length L in the circumferential direction of the exposed portion 10c is preferably shorter from the viewpoint of reducing the risk of radio wave leakage through the exposed portion 10c. For example, a length of 1/4 or less, preferably 1/10 or less of the wavelength of the radio wave generated in the electronic component built-in substrate 1 is preferable.

  In the example of FIG. 3A, a pair of exposed portions 10 c are provided so as to face each other at the center of each of two opposing sides of the square planar shape of the electronic component built-in substrate 1. That is, the insulating substrate 10 has exposed portions 10c at two locations in the circumferential direction. FIG. 3B is an example of the electronic component built-in substrate 1 having an exposed portion 10c at the center of each side of a rectangular planar shape. FIG. 3C is an example of the electronic component built-in substrate 1 having an exposed portion 10c at each corner portion of a square planar shape. Any number of exposed portions 10c may be provided at any position on the outer periphery of the electronic component built-in substrate 1 having any planar shape. Preferably, the exposed portion 10c is provided so that the plurality of first metal films 31 divided by the exposed portion 10c have substantially the same length.

  In the example of FIGS. 3A to 3C, the exposed portion 10 c is substantially flush with the portion adjacent to the exposed portion 10 c on the outer peripheral side surface of the insulating substrate 10. However, as shown in FIG. 4, the adjacent portion of the exposed portion 10 c, that is, the portion covered with the first metal film 31 on the outer peripheral side surface of the insulating substrate 10 is more in the insulating substrate 10 than the exposed portion 10 c. You may be dented in the circumference side. Thereby, for example, when the first metal film 31 is connected to the mother board by solder or the like via the second conductor pad 7a2 (see FIG. 1), the first metal films 31 on both sides of the exposed portion 10c are Bonding with solder can be prevented. It is considered that the above-described stress dispersing action that can be caused by ambient temperature changes is maintained.

  As shown in FIG. 1, the second metal film 32 covers the opening of the through hole 10 a on the other surface 10 </ b> S side of the insulating substrate 10. The second metal film 32 is, for example, an electroless copper plating film. However, the second metal film 32 may be a metal film formed by another film forming method using another metal material such as nickel other than copper. When the second metal film 32 covers the entire opening of the through hole 10a and is connected to the first metal film 31 over the entire outer periphery of the insulating substrate 10, blocking of radio waves leaking to the outside from the through hole 10a. The effect is thought to increase. However, the second metal film 32 may be formed only on a part of the opening of the through hole 10a. Further, the second metal film 32 may be only partially connected to the first metal film 31 on the outer periphery of the insulating substrate 10. This is because if the second metal film 32 is formed on at least a part of the opening of the through hole 10a, it is considered that the emission of radio waves from the through hole 10a is reduced. The thickness of the second metal film 32 is 0.05 μm or more and 1 μm or less, preferably 0.1 μm or more and 0.5 μm or less. It is considered that a radio wave blocking action is obtained, and the formation time of the second metal film 32 is short.

  The sealing member 5 is formed in the through hole 10a and mainly covers the solder resist layer 6 and the electronic components 2a to 2c. The sealing member 5 can also cover the exposed portions of the first conductor layer 7a and the bonding material 76 that are not covered with the solder resist layer 6 and the electronic components 2a to 2c. The sealing member 5 can be formed of any resin composition having insulating properties. An example of the material of the sealing member 5 is an epoxy resin. The epoxy resin may contain an inorganic filler such as silica. The content rate of an inorganic filler is 60 mass% or more and 90 mass% or less, for example, Preferably, they are 70 mass% or more and 90 mass% or less.

  The first conductor pad 7a1 is provided according to the terminals 21a to 21c of the electronic component. The second conductor pads 7a2 are provided according to the pattern of the first metal film 31 on the one surface 10F of the insulating substrate 10, and can be formed in any shape and size. The material of the metal foil 7aa, the seed metal film 7ab, and the electrolytic plating film 7ac constituting the first conductor layer 7a is exemplified by copper. The material of the first conductor layer 7a is not particularly limited to copper as long as it has good conductivity. The material of the second conductor layer 7b is not particularly limited. The second conductor layer 7b is preferably made of an electrolytic copper plating film. The material of the third conductor layer 7c is not particularly limited, and the same material as that of the first conductor layer 7a can be used. The layer structure of the first and third conductor layers 7a and 7c is not limited to the three-layer structure illustrated in FIG. 1, and may be a single layer or a multilayer structure having more or less than three layers.

  In the example of FIG. 1, the one surface exposed from the first resin insulation layer 74a of the second conductor layer 7b is substantially flush with the surface of the first resin insulation layer 74a. However, as shown in FIG. 5, the one surface 7ba of the second conductor layer 7b exposed from the surface 74aa of the first resin insulation layer 74a may be recessed from the surface 74aa of the first resin insulation layer 74a. 5 is an enlarged view of a portion corresponding to a V portion surrounded by a one-dot chain line in FIG. 1 (a bump 73 shown in FIG. 1 is omitted). If the one surface 7ba of the second conductor layer is recessed from the surface 74aa of the first resin insulating layer, it is considered that poor contact between the bumps 73 (see FIG. 1) hardly occurs. The amount of depression from the surface 74aa of the first resin insulation layer of the one surface 7ba of the second conductor layer is, for example, not less than 0.1 μm and not more than 5 μm. The reason why one surface 7ba of the second conductor layer can be recessed will be described later.

  The solder resist layer 6 is formed at least between the patterns of the first conductor layer 7a in the through hole 10a. That is, the solder resist layer 6 is formed at least between the first conductor pads 7a1 and between the first conductor pads 7a1 and the second conductor pads 7a2. Contact between the bonding materials 76 between the respective conductor pads can be prevented. Unlike the example of FIGS. 1 and 2B, the solder resist layer 6 may also be formed in a region around the through hole 10a. For example, when the second conductor pad 7a2 is not formed over the entire circumference of the through hole 10a, the solder resist layer 6 can be formed also in a region where the second conductor pad 7a2 is not formed.

  The solder resist layer 6 has openings on the first and second conductor pads 7a1 and 7a2. The bonding material 76 is supplied into the opening, bonds the electronic components 2a to 2c and the first conductor pad 7a1, and bonds the insulating substrate 10 and the second conductor pad 7a2. The bonding material 76 is not particularly limited as long as it has good conductivity and strong bonding strength. For example, solder or a conductive adhesive is used for the bonding material 76.

  The covering layer 33 covers the entire surface of the second metal film 32. The coating layer 33 protects the second metal film 32 from the external environment exposed during the manufacture and use of the electronic component built-in substrate 1. For example, when the second metal film 32 is made of copper, generation of rust due to oxidation is prevented. The covering layer 33 may be a metal film such as nickel, which is different from the second metal film 32, and may be a resin film made of an epoxy resin, for example. The material of the coating layer 33 is not limited to these.

  In the example of FIG. 1, a plurality of conductor layers including the first conductor layer 7 a are formed on the one surface 10 </ b> F side of the insulating substrate 10. However, only one conductor layer may be formed on the one surface 10F side of the insulating substrate 10.

  A method of manufacturing an electronic component built-in substrate according to one embodiment will be described with reference to FIGS. 6A to 6N, taking the electronic component built-in substrate 1 shown in FIG. 1 and its modification shown in FIG. 3A as examples.

  In the manufacturing method of one embodiment, an insulating substrate having a shape corresponding to the outer peripheral shape of the electronic component built-in substrate 1 is prepared. For example, a single insulating substrate having an outer peripheral shape of the electronic component built-in substrate 1, that is, substantially the same shape as the planar shape in the entire planar shape is prepared.

  When the electronic component built-in substrate 1 shown in FIG. 3A is manufactured, an insulating substrate partially having substantially the same shape as a part of the planar shape of the electronic component built-in substrate 1 may be prepared. For example, as shown in FIG. 6A, a starting substrate 100 including a product region 12 is prepared, and an insulating substrate 10 can be prepared by partially removing the periphery of the product region 12 of the starting substrate 100 (product region 12). And the outline of the insulating substrate 10 substantially overlaps). The product region 12 has substantially the same shape as the planar shape of the electronic component built-in substrate 1 as a whole, and is a region that constitutes the electronic component built-in substrate 1 through the manufacturing method of the embodiment. In the example of FIG. 6A, the starting substrate 100 has a plurality of product regions 12, and an insulating substrate 10 made up of each of the plurality of product regions 12 is prepared. The removed portion around the product region 12 is removed by, for example, drilling or router processing. A slit-shaped void portion 12 a is formed around the product region 12. Thereby, the outer periphery of the insulating substrate 10 is defined, and the end surface of the insulating substrate 10 is exposed. The peripheral portion of the product region 12 is removed so as to leave the connecting portion 12b. Therefore, the void portion 12a formed along the outer periphery of the product region 12 is divided by the connecting portion 12b. That is, the insulating substrate 10 is prepared which has substantially the same shape as a part of the planar shape of the electronic component built-in substrate 1 in a portion other than the connecting portion 12b.

  The connecting portion 12b connects adjacent insulating substrates 10 to each other. In the example of FIG. 6A, one connecting portion 12b is provided at the center of each of the two opposing sides of the substantially rectangular planar insulating substrate 10. However, the connection part 12b is not limited to the example of FIG. 6A, and can be provided in arbitrary positions and numbers. The form of the void portion 12a is not limited to the slit shape. For example, the void portion 12 a may be a series of through-hole groups formed along the outer periphery of the product region 12. In that case, the part between each hole can become a connection part. As shown in FIG. 6A, when the starting substrate 100 includes a plurality of product regions 12, a plurality of electronic component built-in substrates can be manufactured simultaneously. Electronic component built-in substrates can be manufactured inexpensively and in large quantities in a short period of time. However, the starting substrate 100 may include only one product region 12. In that case, the peripheral part of the product region 12 may be removed so as to separate the product region 12 and the blank part other than the product region 12, or the peripheral part of the product region 12 may simply be removed as an unnecessary part. .

  The insulating substrate 10 and the starting substrate 100 are not particularly limited in terms of materials as described above. For example, a glass epoxy board obtained by fully curing a prepreg and a double-sided copper-clad laminate obtained by laminating copper foils on both sides of the prepreg are prepared. FIG. 6A is an example of the starting substrate 100 and the insulating substrate 10 that do not have a copper foil or the like.

  As shown in FIG. 6B and FIG. 6C, the first metal film 31 is formed on the outer peripheral end face of the insulating substrate 10. 6C is a cross-sectional view taken along line VII-VII shown in FIG. 6B (one insulating substrate 10 and void portions 12a on both sides thereof are shown). The first metal film 31 is formed so as to surround the formation region 10aa of the through hole 10a (see FIG. 6G). In the example of FIG. 6C, the first metal film 31 is formed so as to extend to the one surface 10F and the other surface 10S of the insulating substrate 10. For example, the lower layer film 31a of the first metal film 31 is formed on the entire one surface 10F and the other surface 10S of the insulating substrate 10 and the end surface of the insulating substrate 10, that is, the entire wall surface of the void portion 12a. The lower layer film 31a is formed by electroless plating, sputtering, vapor deposition, or the like. Subsequently, the upper layer film 31b is formed on the entire surface of the lower layer film 31a by, for example, electrolytic plating, and the first metal film 31 having a two-layer structure is formed. If necessary, the first metal film 31 on the one surface 10F and the other surface 10S of the insulating substrate 10 is patterned by a tenting method or the like. In the example of FIGS. 6B and 6C, the first metal film 31 on the other surface 10S and the one surface 10F is removed leaving only the periphery of the void portion 12a. The upper layer film 31b may be formed only in a necessary region by a pattern plating method. In that case, after the formation of the upper layer film 31b, the lower layer film 31a exposed from the upper layer film 31b can be removed by etching.

  A region between two two-dot chain lines C shown in FIG. 6C is removed, and a through hole 10a (see FIG. 6G) is formed in the insulating substrate 10. The through-hole 10a can be formed using any appropriate processing method that does not apply excessive stress to the insulating substrate 10, such as laser beam irradiation, cutting with a router, cutting with a drill, or punching with a mold. The formation of the first plating film 31 may be performed after the formation of the through hole 10a. In that case, a metal film is also formed on the inner wall around the through hole 10a. The through hole 10 a is surrounded by a double metal film including the first metal film 31. Such a structure may be preferable from the viewpoint of preventing radio wave leakage. On the other hand, from the viewpoint of preventing the influence of the radio waves reflected by the metal film in the through hole 10a on the electronic components 2a to 2c (see FIG. 1), a structure having no metal film in the through hole 10a is considered preferable. .

  Separately from the process for the insulating substrate 10 shown in FIGS. 6A to 6C, as shown in FIGS. 6D to 6F, the base member 8 is prepared.

  As shown in FIG. 6D, a metal foil 81 is prepared as the base member 8. Preferably, a metal foil 81 bonded to the carrier metal foil 82 is prepared so that a necessary rigidity is obtained when forming the second conductor layer 7b (see FIG. 6E) in a later step, and the carrier metal foil 82 is prepared. Bonded to the base substrate 83 on the side. For example, the metal foil 81 and the carrier metal foil 82 are bonded to each other with a separable adhesive such as a thermoplastic adhesive, or only with a blank portion near the outer periphery. The metal foil 81 and the carrier metal foil 82 are preferably copper foils. Other metal foils such as nickel foil may be used. The carrier metal foil 82 and the base substrate 83 are joined by, for example, thermocompression bonding. An adhesive or the like may be used. For the base substrate 83, for example, a metal plate or prepreg made of copper or the like is used. When a prepreg is used, it can be cured at the time of thermocompression bonding with the carrier metal foil 82.

  As shown in FIG. 6E, a second conductor layer 7b having a plurality of third conductor pads 7b1 and fourth conductor pads 7b2 in a predetermined region is formed on the metal foil 81. The second conductor layer 7b is formed, for example, by electrolytic copper plating using a plating resist having openings in the formation regions of the third and fourth conductor pads 7b1 and 7b2. A metal foil 81 can be used as a seed layer. Since etching is not used, the third and fourth conductor pads 7b1 and 7b2 can be formed with a fine pitch. The second conductor layer 7b may be formed to include any conductor pattern other than the third and fourth conductor pads 7b1 and 7b2.

  As shown in FIG. 6F, the first resin insulating layer 74a, the third conductor layer 7c, the second resin insulating layer 74b, and the first conductor layer 7a are formed on the second conductor layer 7b. The first conductor layer 7a is formed to have a plurality of first conductor pads 7a1 and second conductor pads 7a2. In addition, via conductors 75a and 75b are formed for connecting the first conductor pad 7a1 and the third conductor pad 7b1 and for connecting the second conductor pad 7a2 and the fourth conductor pad 7b2. The first resin insulation layer 74a, the third conductor layer 7c, the second resin insulation layer 74b, the first conductor layer 7a, and the via conductors 75a and 75b are, for example, the same method as a general build-up wiring board manufacturing method. Can be formed. For example, the first resin insulation layer 74a is formed by thermocompression bonding a film-like epoxy resin or the like together with the metal foil on the exposed portions of the second conductor layer 7b and the metal foil 81. Via holes are formed in the first resin insulating layer 74a by laser light irradiation, etc., and the third conductor layer 7c and via conductors are formed by forming a seed metal film by electroless plating or sputtering, and by forming an electrolytic plating film by pattern plating. 75a is formed. Unnecessary portions of the seed metal film and the underlying metal foil are removed by etching or the like. The second resin insulating layer 74b, the first conductor layer 7a, and the via conductor 75b are formed in the same manner as the first resin insulating layer 74a, the third conductor layer 7c, and the via conductor 75a, respectively. A predetermined conductor pattern including the first conductor pad 7a1 and the second conductor pad 7a2 is formed on the first conductor layer 7a. The first and third conductor layers 7a and 7c may be formed by panel plating and patterning by a tenting method.

A solder resist layer 6 having an opening 6b on the first conductor pad 7a1 and the second conductor pad 7a2 is formed on the surface of the first conductor layer 7a and the second resin insulating layer 74b exposed from the first conductor layer 7a. The For example, a layer of a photosensitive epoxy resin material is formed on the first conductor layer 7a and the exposed portion of the second resin insulating layer 74b by printing or spray coating, and the opening 6b is formed by photolithography. As shown in FIG. 6F, a base member 8 made of a metal foil 81 having a first conductor layer 7a and a solder resist layer 6 on the surface opposite to the base substrate 83 is prepared.

  6D to 6F, the metal foil 81 is laminated on only one surface of the base substrate 83 with the carrier metal foil 82 interposed therebetween. However, the metal foil 81 may be further laminated on the other surface of the base substrate 83. In that case, the post-process can be performed on both sides of the base member 8. 6G to 6L and the following description, illustration and description of the other surface side of the base member 8 are omitted.

  As shown in FIG. 6G, the insulating substrate 10 and the base member 8 are overlapped, and the electronic components 2a to 2c are disposed in the through hole 10a. 6G to 6K show only a portion around the insulating substrate 10. The insulating substrate 10 is laminated on the base member 8 via the first conductor layer 7a or the like with the one surface 10F facing the base member 8 side. The opening of the through hole 10a on the one surface 10F side of the insulating substrate 10 is closed by the base member 8 via the first conductor layer 7a and the like. The electronic components 2a to 2c are arranged on the metal foil 81, that is, the base member 8 via conductors (first and third conductor pads 7a1 and 7b1 and via conductors 75a and 75b in the example of FIG. 6G). The terminals 21a to 21c of the electronic components 2a to 2c are electrically connected to the first conductor pad 7a1 through the bonding material 76, respectively. The first metal film 31 on the one surface 10F of the insulating substrate 10 is electrically connected to the second conductor pad 7a2 through the bonding material 76. In FIG. 6G, the first metal film 31 is shown in a simplified manner in one layer (the first metal film 31 is also simplified in FIGS. 6H to 6K). Since the base member 8 includes the base substrate 83, bending or the like is unlikely to occur, and the connection surfaces of the first conductor pads 7a1 and the second conductor pads 7a2 are considered to be flat. The electronic components 2a to 2c and the insulating substrate 10 can be stably connected. An example of the bonding material 76 is solder. However, the bonding material 76 is not limited to solder, and may be, for example, a conductive adhesive containing conductive particles and a resin material.

  When solder is used for the bonding material 76, the electronic components 2a to 2c and the insulating substrate 10 are preferably soldered simultaneously to the first conductor layer 7a by solder reflow. The bonding material 76 can be supplied onto the first conductor layer 7a at a time, and remelting of the solder that can occur when the solder is reflowed separately can be avoided. The highly reliable electronic component built-in substrate 1 can be manufactured efficiently. Even when another bonding material such as a thermosetting conductive adhesive is used for the bonding material 76, the electronic components 2a to 2c and the insulating substrate 10 can be simultaneously connected to the first conductor layer 7a. For example, after the conductive adhesive is applied to the first and second conductor pads 7a1 and 7a2 and the electronic components 2a to 2c and the insulating substrate 10 are disposed, the conductive adhesive on each conductor pad may be simultaneously heated. . However, the electronic components 2a to 2c and the insulating substrate 10 may be separately connected to the first conductor layer 7a. In addition, different types of bonding materials may be used as the bonding material 76 between the electronic components 2 a to 2 c and the insulating substrate 10. For example, solder may be used for connecting the electronic components 2a to 2c, and a conductive adhesive may be used for connecting the insulating substrate 10. First, the insulating substrate 10 and the second conductor pad 7a2 are connected by the bonding material 76 made of a conductive adhesive, and then solder paste or the like is supplied onto the first conductor pad 7a1 by a dispenser or the like, and the electronic components 2a to 2c. May be mounted by solder reflow.

  As shown in FIG. 6H, the through hole 10a is filled with a resin material, and the sealing member 5 that covers the periphery of the electronic components 2a to 2c is formed. For example, an epoxy resin containing an appropriate amount of an inorganic filler or the like is applied or injected above the through hole 10a and / or into the through hole 10a by mask printing or ejection from a nozzle. Or the resin material shape | molded in the film form may be laminated | stacked on the other surface 10S of the insulated substrate 10 so that the through-hole 10a may be covered. In any method, the primary heating may be performed at the softening temperature of the resin material so that the resin material is completely filled in the through hole 10a. Further, the resin material may be filled in a vacuum or a reduced pressure atmosphere so as not to generate voids. The sealing member 5 can be formed by heating the resin material filled in the through-hole 10a at a predetermined curing temperature and performing the main curing.

  The sealing member 5 is preferably formed so as to completely fill the through hole 10a. This is because the electronic components 2a to 2c are sufficiently protected from external stress, and the formation of the second metal film 32 (see FIG. 6J) in the subsequent process is facilitated. Therefore, as shown in FIG. 6H, the sealing member 5 is preferably formed so as to protrude further from the other surface 10S of the insulating substrate 10 or the surface of the first metal film 31 on the other surface 10S. . This is because the inside of the through hole 10a is reliably filled without requiring fine control of the supply amount of the resin material.

  When the sealing member 5 is formed so as to protrude from the other surface 10S of the insulating substrate 10, the protruding portion of the sealing member 5 is polished as shown in FIG. 6I after the sealing member 5 is formed. . The sealing member 5 is polished by polishing with a belt sander, buffing, chemical mechanical polishing, or the like. The sealing member 5 is polished so that the surface 5S on the other surface 10S side of the insulating substrate 10 of the sealing member 5 is substantially flush with the surface of the first metal film 31 on the other surface 10S of the insulating substrate 10. The When the first metal film 31 does not reach the other surface 10S of the insulating substrate 10, the sealing member 5 can be polished so that the other surface 10S of the insulating substrate 10 and the surface 5S are substantially flush with each other. The surface of the first metal film 31 on the other surface 10S of the insulating substrate 10 is a contact surface with the second metal film 32 (see FIG. 6J) that can be formed in a later process. When the first metal film 31 is not formed on the surface of the other surface 10S of the insulating substrate 10, the end surface of the first metal film 31 on the other surface 10S side is “the first metal film 31 on the other surface 10S. Surface ". It is considered that the second metal film 32 having a uniform film thickness and providing a stable shielding effect is formed by polishing the sealing member 5.

  As shown in FIG. 6J, the second metal film 32 is formed on the surface 5S of the sealing member 5. The second metal film 32 is formed by, for example, electroless plating. The second metal film 32 may be formed by sputtering or vapor deposition. In addition to electroless plating, electrolytic plating may be performed. The second metal film 32 covers the opening portion of the through hole 10a on the other surface 10S side of the insulating substrate 10 where the inside is filled with the sealing member 5. In the example of FIG. 6J, the second metal film 32 is formed on the entire other surface 10S side of the insulating substrate 10. The second metal film 32 is also formed on the first metal film 31 on the other surface 10 </ b> S of the insulating substrate 10 so as to be in contact with the first metal film 31. By the first metal film 31 and the second metal film 32, the shield layer 3 surrounding the electronic components 2a to 2c is formed. After the second metal film 32 is formed on the entire surface on the other surface 10S side of the insulating substrate 10, a portion that is not particularly functionally necessary may be removed by etching or the like. For example, when a plurality of electronic component built-in substrates 1 are manufactured using the starting substrate 100 (see FIG. 6A), the second metal film 32 on the connecting portion 12b (see FIG. 6A) may be removed.

  After the formation of the second metal film 32, a coating layer 33 that covers the second metal film 32 is formed. For example, the coating layer 33 made of an electrolytic plating film made of a material different from the second metal film 32 is formed by electrolytic plating using the second metal film 32 as a seed layer. As the material of the coating layer 33 in this case, for example, nickel is used when the second metal film 32 is made of copper. The material of the coating layer 33 made of a plating film is not limited to nickel, and can be appropriately selected according to the material of the second metal film 32.

  The covering layer 33 may be formed of a resin material. For example, a resin molded into a film is laminated on the second metal film 32 and heated. The resin material once melted by heating is in close contact with the second metal film 32. The resin material is finally cured by further heating, whereby the coating layer 33 is formed. The coating layer 33 made of a resin material is preferable in that the second metal film 32 can be insulated from an external conductor. An example of the material of the covering layer 33 in this case is an epoxy resin. A material having a linear expansion coefficient equivalent to the material of the sealing member 5 is preferable as the material of the covering layer 33. This is because it is considered that the thermal stress generated in the second metal film 32 is small.

  In the example shown in FIGS. 6A to 6L, the carrier metal foil 82 is separated from the metal foil 81 together with the base substrate 83 after the coating layer 33 is formed. For example, the thermoplastic adhesive that bonds the metal foil 81 and the carrier metal foil 82 is heated to soften, and in this state, the metal foil 81 and the carrier metal foil 82 are pulled apart. When the metal foil 81 and the carrier metal foil 82 are bonded only at the outer peripheral portion, the bonded portion may be cut off.

  The metal foil 81 exposed by the separation from the carrier metal foil 82, that is, the base member 8, is removed. For example, the metal foil 81 is removed by etching. During this etching, the second metal film 32 is covered with the covering layer 33. Therefore, even if the same material as the metal foil 81 is used for the second metal film 32, the second metal film 32 is not removed.

  When removing the metal foil 81 by etching, the etching can be continued even after the disappearance of the metal foil 81 so that the conductor pads of the second conductor layer 7b are electrically separated from each other. Meanwhile, the surface of the second conductor layer 7b exposed by the disappearance of the metal foil 81 is etched. Thereby, one surface of the second conductor layer 7b can be recessed from the surface of the first resin insulating layer 74a (see FIG. 5).

  Bumps 73 may be formed on the exposed surfaces of the third and fourth conductor pads 7b1 and 7b2, as shown in FIG. 6K. The bump 73 is formed by, for example, printing of solder paste, placement of solder balls, and solder reflow. The material and forming method of the bump 73 are not particularly limited to these. When the electronic component built-in substrate is manufactured from the individual insulating substrates 10, the electronic component built-in substrate 1 shown in FIG. 1 is obtained as described above.

  When the insulating substrate 10 is connected to the adjacent insulating substrate 10 or the blank portion by the connecting portion 12b, the connecting portion 12b is cut. For example, the connecting portion 12b is cut by a router or the like at the boundary with the insulating substrate 10 indicated by a two-dot chain line D in FIG. 6K. When the starting substrate 100 shown in FIG. 6A is used, for example, the connecting portion 12b is cut at the position of the cutting line S shown by the two-dot chain line in FIG. 6L. Thereby, the plurality of electronic component built-in substrates 1 formed in an array are separated into individual electronic component built-in substrates 1 having final shapes. The cut part of the connection part 12b becomes the exposed part 10c of the insulating substrate 10 (see FIG. 3A). Through the above steps, the electronic component built-in substrate 1 having the first metal film 31 shown in FIG. 3A is completed.

  In the cutting of the connecting portion 12b, the first metal film 31 on the outer peripheral side surface of the electronic component built-in substrate 1 may be cut if the position accuracy of the bit such as the router is not sufficient. Therefore, as indicated by a two-dot chain line S1 in FIG. 6M, the connecting portion 12b may be cut at a position slightly outside the boundary with the insulating substrate 10, that is, on the space 12a side. In that case, as shown in FIG. 4, an exposed portion 10 c that protrudes from an adjacent portion is formed.

  When the electronic component built-in substrate 1 shown in FIG. 3B is manufactured, in the step of preparing the insulating substrate 10 shown in FIG. 6A, a connecting portion is provided at the center of each side of the substantially rectangular insulating substrate 10. 12b is provided. In the process shown in FIG. 6L, each connecting portion 12b is cut, whereby the electronic component built-in substrate 1 shown in FIG. 3B is obtained. When the electronic component built-in substrate 1 shown in FIG. 3C is manufactured, as shown in FIG. 6N, a connecting portion is connected to each corner portion of the rectangular insulating substrate 10 in the step of preparing the insulating substrate 10. 12b is provided (FIG. 6N shows a state after the formation of the first metal film 31). By cutting each connecting portion 12b, the electronic component built-in substrate 1 shown in FIG. 3C is obtained.

  6A to 6N, the carrier metal foil 82 is separated from the metal foil 81, that is, the base member 8 after the coating layer 33 is formed. However, if the connection between the second conductor pad 7a2 and the insulating substrate 10 is possible, the carrier metal foil 82 and the metal foil 81 can be separated at any step after the solder resist layer 6 is formed. In that case, the removal of the metal foil 81 may also be performed in an arbitrary step after the carrier metal foil 82 and the metal foil 81 are separated. In that case, from the resin such as polyethylene terephthalate on the exposed surface of the metal foil 81 after the separation of the carrier metal foil 82 and the exposed surfaces of the second conductor layer 7b and the first resin insulating layer 74a after the removal of the metal foil 81. A protective film may be provided.

DESCRIPTION OF SYMBOLS 1 Electronic component built-in board 2a-2c Electronic component 21a-21c Terminal 3 of electronic component Shield layer 31 1st metal film 32 2nd metal film 5 Sealing member 6 Solder resist layer 7a 1st conductor layer 7a1 1st conductor pad 7a2 1st 2 conductor pad 7b 2nd conductor layer 7b1 3rd conductor pad 7b2 4th conductor pad 73 Bump 74a 1st resin insulation layer 74b 2nd resin insulation layer 8 Base member 81 Metal foil 10 Insulation board 10a Through-hole 10c Exposed part 10F Insulation board One side 10S Other side 100 of insulating substrate Starting substrate

Claims (14)

An insulating substrate having a through hole for accommodating an electronic component;
An electronic component housed in the through hole;
A sealing member filled in the through hole and covering the electronic component;
An electronic component built-in substrate having
A first metal film surrounding the through hole is formed on a side wall of the insulating substrate;
The terminal of the electronic component is exposed from the sealing member on the one surface side of the insulating substrate,
A second metal film is formed on the other surface side opposite to the one surface of the insulating substrate;
The opening on the other surface side of the through hole is covered with the second metal film. The electronic component built-in substrate according to claim 1, wherein the first metal film is formed to extend to the other surface of the insulating substrate, and the second metal film is connected to the first metal film, The electronic component is surrounded by the first metal film and the second metal film except for the one surface side of the insulating substrate. 2. The electronic component built-in substrate according to claim 1, wherein the first metal film is formed to extend to the one surface of the insulating substrate and surrounds the opening of the through hole. 2. The electronic component built-in substrate according to claim 1, further comprising: a solder resist layer on the one surface side of the insulating substrate; and a first conductor layer that is covered with the solder resist layer by a first conductor pad. The terminal of the electronic component is electrically connected to the first conductor pad. 5. The electronic component built-in substrate according to claim 4, wherein the first conductor layer further includes a second conductor pad, and the first metal film is formed to extend to the one surface of the insulating substrate, The second conductor pad is connected to the first metal film on the one surface of the insulating substrate. 5. The electronic component built-in substrate according to claim 4, further comprising: a first resin insulating layer and the first resin on the one surface of the insulating substrate through at least the first conductor layer and the solder resist layer. A second conductor layer embedded in the first resin insulating layer with one surface exposed on the surface of the insulating layer opposite to the insulating substrate;
The second conductor layer includes a third conductor pad electrically connected to a terminal of the electronic component, and a fourth conductor pad electrically connected to the first metal film,
The one surface exposed from the first resin insulation layer of the second conductor layer is recessed from the surface of the first resin insulation layer. 2. The electronic component built-in substrate according to claim 1, wherein the insulating substrate has exposed portions not covered by the first metal film on at least two locations in a circumferential direction on an outer peripheral side surface including the side walls. The portion of the outer peripheral side surface covered with the first metal film is recessed from the exposed portion. 2. The electronic component built-in substrate according to claim 1, wherein the first metal film is formed to extend to the one surface of the insulating substrate, and the first metal film on the one surface of the insulating substrate. The surface of the part and the surface of the terminal of the electronic component exposed from the sealing member are substantially flush. 2. The electronic component built-in substrate according to claim 1, wherein the plurality of electronic components are accommodated in the through hole, and the plurality of electronic components include a passive component and an active component. A method of manufacturing an electronic component built-in substrate, the method comprising:
Preparing an insulating substrate having a shape corresponding to the outer peripheral shape of the electronic component built-in substrate;
Forming a first metal film on the insulating substrate;
Forming a through hole in the insulating substrate;
Providing a base member for closing one opening of the through hole;
Superimposing the base member and the insulating substrate;
Arranging an electronic component directly or via a conductor on the base member in the through hole;
Filling the through hole with a resin material;
Forming a second metal film that covers the opening of the through hole on the side opposite to the base member so as to be in contact with the first metal film;
Removing the base member; and
The first metal film is formed on the outer peripheral end face of the insulating substrate so as to surround the through hole formation region. 11. The method for manufacturing an electronic component built-in substrate according to claim 10, wherein the step of preparing the base member includes a predetermined conductor on the metal foil or on the surface of the resin insulating layer formed on the metal foil. Forming a conductor layer having a pattern; and forming a solder resist layer having an opening on the conductor pattern;
The step of superimposing the base member and the insulating substrate includes soldering the insulating substrate onto the conductor layer,
The step of placing the electronic component includes soldering the electronic component to the conductor layer. 12. The method of manufacturing an electronic component built-in substrate according to claim 11, wherein the insulating substrate and the electronic component are simultaneously soldered to the conductor layer by solder reflow. It is a manufacturing method of the electronic component built-in substrate according to claim 10,
A sealing member that covers the electronic component is formed in the through hole by filling the resin material,
Before forming the second metal film, the sealing member is further polished so that the surface of the sealing member is substantially flush with the contact surface of the first metal film with the second metal film. Including that. It is a manufacturing method of the electronic component built-in substrate according to claim 10, wherein the step of preparing the insulating substrate includes:
Preparing a starting substrate including a product region constituting the electronic component built-in substrate;
Removing a peripheral portion of the product area of the starting substrate to at least partially define an outer periphery of the insulating substrate and exposing the end face.

Images