JP2016046455A - Photoelectric conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photoelectric conversion device capable of reducing a decrease in photoelectric conversion efficiency and maintaining a high photoelectric conversion efficiency over a long period of time. A photoelectric conversion device includes a substrate, an electrode layer mainly including a metal located on the substrate, a semiconductor layer capable of photoelectric conversion located on the electrode layer, and an upper electrode located on the semiconductor layer. The electrode layer has a plurality of voids inside. [Selection] Figure 3

Description

  The present invention relates to a photoelectric conversion device having an electrode layer made of metal.

  As a photoelectric conversion device used for solar power generation or the like, there is one in which cells corresponding to a plurality of photoelectric conversion bodies are provided on one substrate. In this cell, for example, a lower electrode layer, a semiconductor film containing a compound semiconductor, and an upper electrode are stacked in this order. The lower electrode layer is known to be produced by sputtering a metal thin film such as molybdenum (Mo). (For example, Patent Document 1 and Patent Document 2)

JP 2006-80371 A Japanese Patent Laid-Open No. 2006-210424

  By the way, a temperature change arises at the time of the heating process at the time of manufacture of a photoelectric conversion apparatus, or use of a photoelectric conversion apparatus. When the lower electrode layer of the photoelectric conversion device is made of a thin film such as metal, when such temperature conversion occurs, stress is generated due to the difference in thermal expansion coefficient between the substrate and the lower electrode layer, and the lower electrode layer Cracks may occur. Due to the progress of cracks in the lower electrode layer, the series resistance component of the photoelectric conversion device may increase and the photoelectric conversion efficiency may decrease.

  One object of the present invention is to provide a photoelectric conversion device capable of reducing a decrease in photoelectric conversion efficiency and maintaining high photoelectric conversion efficiency over a long period of time.

  A photoelectric conversion device according to one embodiment of the present invention includes a substrate, an electrode layer mainly including a metal located on the substrate, a semiconductor layer capable of photoelectric conversion located on the electrode layer, and a position on the semiconductor layer. The electrode layer has a plurality of voids inside.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to reduce the fall of photoelectric conversion efficiency and to maintain high photoelectric conversion efficiency over a long period of time.

It is a perspective view which shows an example of a photoelectric conversion apparatus. It is sectional drawing of the photoelectric conversion apparatus of FIG. It is a principal part expanded sectional view of the photoelectric conversion apparatus of FIG. It is a principal part expanded sectional view of the other example of a photoelectric conversion apparatus. It is the schematic of the manufacturing process of a photoelectric conversion apparatus. It is sectional drawing which shows the mode in the middle of manufacture of a photoelectric conversion apparatus. It is sectional drawing which shows the mode in the middle of manufacture of a photoelectric conversion apparatus. It is sectional drawing which shows the mode in the middle of manufacture of a photoelectric conversion apparatus.

<Configuration of photoelectric conversion device>
FIG. 1 is a perspective view illustrating an example of a photoelectric conversion device. 2 is an XZ sectional view of the photoelectric conversion device of FIG. FIG. 3 is an enlarged cross-sectional view of a main part in which the XZ cross section of the photoelectric conversion device of FIG. 2 is further enlarged. 1 to 3 are provided with a right-handed XYZ coordinate system in which the arrangement direction of photoelectric conversion cells 10 (the horizontal direction in the drawing in FIG. 1) is the X-axis direction.

  The photoelectric conversion device 11 has a configuration in which a plurality of photoelectric conversion cells 10 are arranged in parallel on a substrate 1. In FIG. 1, only two photoelectric conversion cells 10 are shown for convenience of illustration, but an actual photoelectric conversion device 11 has a large number of photoelectric conversion cells in the X-axis direction of the drawing or further in the Y-axis direction of the drawing. The conversion cells 10 are arranged two-dimensionally (two-dimensionally).

  Each photoelectric conversion cell 10 mainly includes a lower electrode layer 2, semiconductor layers capable of photoelectric conversion (first semiconductor layer 3 and second semiconductor layer 4), an upper electrode layer 5 and a collecting electrode 7. In the photoelectric conversion device 11, the main surface on the side where the upper electrode layer 5 and the collecting electrode 7 are provided is a light receiving surface.

  The substrate 1 supports the plurality of photoelectric conversion cells 10 and is made of, for example, a material such as glass, ceramics, resin, or metal. In the present embodiment, an example is shown in which blue plate glass (soda lime glass) having a thickness of about 1 to 3 mm is used as the substrate 1.

  The lower electrode layer 2 is a conductive layer provided on one main surface of the substrate 1 and mainly contains a metal such as molybdenum (Mo). In addition, that the lower electrode layer 2 mainly contains a metal means that the metal contains 70 mol% or more. The lower electrode layer 2 has a thickness of about 0.1 to 1 μm.

  The lower electrode layer 2 has a plurality of gaps 2a inside as shown in FIG. With such a configuration, a decrease in photoelectric conversion efficiency of the photoelectric conversion device 11 can be reduced, and the photoelectric conversion efficiency can be maintained high over a long period of time. That is, when a temperature change occurs in the heating process at the time of manufacturing the photoelectric conversion device 11, or when a temperature change occurs during the use of the photoelectric conversion device 11, the difference in thermal expansion coefficient between the substrate 1 and the lower electrode layer 2 is caused. Although stress is generated and cracks are likely to occur in the lower electrode layer 2, the voids 2a in the lower electrode layer 2 absorb the stress well, and the occurrence of cracks in the lower electrode layer 2 can be effectively reduced. Further, even if a crack occurs in the lower electrode layer 2, the progress of the crack can be stopped by the gap 2a. As a result, an increase in the series resistance component of the photoelectric conversion device due to cracks can be suppressed, and the photoelectric conversion efficiency can be maintained high.

  Such voids 2a may have an average value of the maximum diameter of each void 2a in a cross section (XZ cross section) cut in a direction perpendicular to the lower electrode layer 2 in a range of about 1 to 30 nm. The gaps 2a may be connected. Further, the occupied area of the plurality of gaps 2a in the XZ section of the lower electrode layer 2 may be about 0.5 to 5%.

  The semiconductor layer P capable of photoelectric conversion is a semiconductor layer that absorbs light and performs photoelectric conversion. In the present embodiment, an example in which the photoelectrically convertible semiconductor layer P is a stacked body of a first semiconductor layer 3 that functions as a light absorption layer and a second semiconductor layer 4 that functions as a buffer layer is shown. .

  The first semiconductor layer 3 has the first conductivity type (here, p-type conductivity type), and is, for example, about 1 to 3 μm on the + Z side main surface 2a of the lower electrode layer 2. Thickness is provided. The first semiconductor layer 3 may be a compound semiconductor such as metal chalcogenide or a semiconductor such as silicon. From the viewpoint of obtaining a high photoelectric conversion efficiency even with a thin film of about several μm, the first semiconductor layer 3 may be a metal chalcogenide.

  A metal chalcogenide is a compound of a metal element and a chalcogen element. The chalcogen element refers to sulfur (S), selenium (Se), and tellurium (Te) among group 16 elements (also referred to as group VI-B elements). Metal chalcogenides include group 11 elements (also referred to as group IB elements), group 13 elements (also referred to as group III-B elements) and group 16 elements, group III-VI compounds, group 11 elements. I-II-IV-VI group compounds and 12-group elements and 16-group elements (also referred to as II-B group elements), 14-group elements (also referred to as IV-B group elements) and 16-group elements II-VI group compounds that are compounds with group elements can be employed.

Examples of the I-III-VI group compound include CuInSe ₂ (indium diselenide,
CIS), Cu (In, Ga) Se ₂ (also called copper indium gallium selenide, CIGS), Cu (In, Ga) (Se, S) ₂ (diselen copper indium gallium indium gallium, CIGSS). Alternatively, the first semiconductor layer 4 may be formed of a multi-component compound semiconductor thin film such as copper indium selenide / gallium having a thin film of selenite / copper indium sulfide / gallium as a surface layer.

Examples of the I-II-IV-VI group compound include Cu ₂ ZnSnS ₄ (also referred to as CZTS), Cu ₂ ZnSn (S, Se) ₄ (also referred to as CZTSSe), and Cu ₂ ZnSnSe ₄ (also referred to as CZTSe). Can be mentioned. Moreover, as a II-VI group compound, CdTe etc. are mentioned, for example.

  The first semiconductor layer 3 can be formed by a so-called vacuum process such as a sputtering method or an evaporation method, or can be formed by a process called a coating method or a printing method. A process referred to as a coating method or a printing method is a process in which a complex solution of constituent elements of the first semiconductor layer 3 is applied on the lower electrode layer 2, and then drying and heat treatment are performed.

  The second semiconductor layer 4 is a semiconductor layer having a second conductivity type (here, n-type conductivity type) different from that of the first conductivity type first semiconductor layer 3, and the first semiconductor layer 3 And are electrically connected. The first conductivity type and the second conductivity type refer to one and the other of p-type and n-type. If the first conductivity type is p-type, the second conductivity type is n-type. If the first conductivity type is n-type, the second conductivity type is p-type. Charge separation of positive and negative carriers generated by light irradiation in the first semiconductor layer 3 and the second semiconductor layer 4 can be favorably performed.

  From the viewpoint of reducing the leakage current, the second semiconductor layer 4 may have an electrical resistivity of 1 Ω · cm or more. The second semiconductor layer 4 has a thickness in the normal direction of one main surface of the first semiconductor layer 3. This thickness is set to, for example, 5 to 200 nm. The second semiconductor layer 4 may be a plurality of layers.

Examples of the second semiconductor layer 4 include CdS, ZnS, ZnO, In ₂ Se ₃ , In (OH, S), (Zn, In) (Se, OH), and (Zn, Mg) O. The second semiconductor layer 4 is formed by, for example, a chemical bath deposition (CBD) method. Note that In (OH, S) refers to a compound containing In, OH, and S as main components. (Zn, In) (Se, OH) refers to a compound containing Zn, In, Se, and OH as main components. (Zn, Mg) O refers to a compound containing Zn, Mg, and O as main components. In order to increase the absorption efficiency of the first semiconductor layer 3, the second semiconductor layer 4 may have a high light transmittance with respect to the wavelength region of light absorbed by the first semiconductor layer 3. The thickness of the second semiconductor layer 4 is, for example, 5 to 200 nm.

The upper electrode layer 5 is a transparent conductive film provided on the second semiconductor layer 4, and is an electrode that extracts charges generated in the light absorption layer 3. The upper electrode layer 5 is made of a material having a lower resistivity than the second semiconductor layer 4. The upper electrode layer 5 includes what is called a window layer, and when a transparent conductive film is further provided in addition to the window layer, these may be regarded as an integrated upper electrode layer 5.

The upper electrode layer 5 mainly includes a material having a wide forbidden band, transparent, and low resistance. As such a material, for example, a metal oxide semiconductor such as ZnO, In ₂ O ₃ and SnO ₂ can be adopted. These metal oxide semiconductors may contain any element of Al, B, Ga, In, F, and the like. Specific examples of the metal oxide semiconductor containing such an element include, for example, AZO (Aluminum Zinc Oxide), BZO (Boron Zinc Oxide) GZ.
O (Gallium Zinc Oxide), IZO (Indium Zinc Oxide), ITO (Indium Tin Oxide)
) And FTO (Fluorine tin Oxide).

  The upper electrode layer 5 is formed to have a thickness of 0.05 to 3 μm, for example. Here, from the viewpoint of good charge extraction from the first semiconductor layer 3, the upper electrode layer 5 has a resistivity of less than 1 Ω · cm and a sheet resistance of 50Ω / □ or less. Can do.

  The upper electrode layer 5 can be formed by a sputtering method, a vapor deposition method, a chemical vapor deposition (CVD) method, or the like.

  In addition, the collecting electrode 7 may be provided on the upper electrode layer 5. The collecting electrodes 7 are spaced apart in the Y-axis direction, and each extend in the X-axis direction. The current collecting electrode 7 is a conductive electrode, and includes, for example, a metal such as silver (Ag).

  The collecting electrode 7 plays a role of collecting charges generated in the first semiconductor layer 4 and taken out in the upper electrode layer 5. If the current collecting electrode 7 is provided, the upper electrode layer 5 can be thinned.

  The electric charges collected by the collector electrode 7 and the upper electrode layer 5 are adjacent to each other through the connection conductor 6 provided in the groove portion P2 that divides the first semiconductor layer 3, the second semiconductor layer 4, and the upper electrode layer 5. Is transmitted to the photoelectric conversion cell 10. For example, the connection conductor 6 is constituted by a portion extending in the Y-axis direction of the current collecting electrode 7 as shown in FIG. Thereby, in the photoelectric conversion apparatus 11, one lower electrode layer 2 of the adjacent photoelectric conversion cell 10 and the other collector electrode 7 are electrically connected in series via the connection conductor 6 provided in the groove portion P2. It is connected to the. In addition, the connection conductor 6 is not limited to this, You may be comprised by the extension part of the upper electrode layer 5. FIG.

  The current collecting electrode 7 has a width of 50 to 400 μm so that good conductivity is ensured and a decrease in the light receiving area that affects the amount of light incident on the first semiconductor layer 4 is minimized. Can be.

<Modification of photoelectric conversion device>
The present invention is not limited to the above-described embodiment, and various changes and improvements can be made without departing from the scope of the present invention.

  For example, as another example of the photoelectric conversion device, a configuration illustrated in FIG. 4 may be used. In the photoelectric conversion device 111 of FIG. 4, the lower electrode layer 12 is formed of a stacked body of a plurality of metal layers 12-1 to 12-3, and the plurality of gaps 12 a are formed of the plurality of metal layers 12-1 to 12-. 3 is different from the photoelectric conversion device 11 in that it is located between three layers. In addition, in the photoelectric conversion apparatus 111 of FIG. 4, the same code | symbol is attached | subjected to the thing of the same structure as the photoelectric conversion apparatus 11 of FIG. 3, and detailed description is abbreviate | omitted.

  Thus, when the plurality of voids 12a are positioned between the plurality of metal layers 12-1 to 12-3, even if cracks occur in the lower electrode layer 12 due to stress, the cracks are metal. It becomes easy to advance along the interface between layers, and it can reduce effectively that a crack reaches the 1st semiconductor layer 3 or substrate 1.

  Further, as shown in FIG. 4, each of the plurality of metal layers 12-1 to 12-3 is composed of a plurality of crystal grains, and each of the plurality of crystal grains is in the thickness direction of the lower electrode layer 12 (Z It may be composed of a columnar body extending in a curved direction.

  With such a configuration, it is possible to more effectively reduce the cracks generated in the lower electrode layer 12 from reaching the first semiconductor layer 3 and the substrate 1. That is, even if a crack generated in the lower electrode layer 12 tends to progress in the thickness direction of the lower electrode layer 12, the progress of the crack is likely to stop in the curved crystal grains.

  The shape of the crystal grain in the XY section is, for example, a substantially elliptical shape. At this time, the major axis of the crystal grains is about 10 to 50 nm, and the minor axis is about 3 to 20 nm. The length of the crystal grains in the + Z direction is about 0.2 to 1 μm. In addition, the shape of the XY cross section of the crystal grain 2p is not limited to an elliptical shape, and may be an elongated shape having an outer shape with straight lines and curves. Further, if the crystal grain boundary forms an angle of about 120 to 170 degrees with respect to the X axis when viewed in a cross section (XZ cross section in FIG. 4) where the curvature of the crystal grain can be confirmed, the progress of cracks Tends to stop.

<Manufacturing method of lower electrode layer>
Here, an example of a method for manufacturing the lower electrode layer of the photoelectric conversion device having the above-described structure will be described with reference to FIGS.

  In forming the lower electrode layer on the substrate 1, for example, a sputtering apparatus 200 shown in FIG. 5 is used. The sputtering apparatus 200 includes a load lock chamber 21, a film formation chamber 22, and an unload lock chamber 23. In these chambers, a transport mechanism 24 (24a to 24c), a gate valve 25 (25a to 25d), a supply line 26 (26a to 26c), and a vacuum pump 27 (27a to 27c) are provided.

  The load lock chamber 21 has a function of blocking the film formation chamber 22 from the external atmosphere. As a result, it is possible to secure a vacuum in the film forming chamber 22 and reduce the occurrence of contamination, and the efficiency of the film forming process is improved. The load lock chamber 21 accommodates the substrate 1 transferred from the outside of the sputtering apparatus 200 into the load lock chamber 21 by the transfer mechanism 24a. In the load lock chamber 21, the temperature of the substrate 1 can be raised by a heater 28 provided in the chamber.

  The film forming chamber 22 has a function of forming the lower electrode layer 12 on the substrate 1 by sputtering. A sputtering target 29 made of metal constituting the lower electrode layer 12 is disposed inside the film forming chamber 22. The sputtering target 29 is disposed at a substantially central portion in the film forming chamber 22. A DC power supply 30 is provided outside the film forming chamber 22. The film forming chamber 22 is provided with a transport mechanism 24b for transporting the substrate 1 from the one end to the other end within the film forming chamber 22 at a predetermined speed. The transport mechanism 24b can change the speed, stop, reverse run, etc. during the film forming process. The power source is not limited to the DC power source, but may be an RF power source or an AC power source.

The unload lock chamber 23 has a function of blocking the film formation chamber 22 from the external atmosphere. As a result, it is possible to secure a vacuum in the film forming chamber 22 and reduce the occurrence of contamination, and the efficiency of the film forming process is improved. The unload lock chamber 23 accommodates the substrate 1 transferred from the film formation chamber 22 into the unload lock chamber 23. The substrate 1 is transferred to the outside of the sputtering apparatus 200 by the transfer mechanism 24c.

  The transport mechanism 24 (24a to 24c) has a mechanism for transporting the substrate 1 by, for example, a chain driven by a servo motor. Further, each transport mechanism 24 has a mechanism that can transfer the substrate 1 between the transport mechanisms.

  Next, the operation of the sputtering apparatus 200 will be described. First, the substrate 1 is set in the transport mechanism 24a so that the film formation surface is facing down. Next, nitrogen gas is supplied through the supply line 26 a in the load lock chamber 21 to return the load lock chamber 21 to atmospheric pressure. Next, the gate valve 25a is opened, and the substrate 1 is transferred into the rod lock chamber 21 by the transfer mechanism 24a. Next, the supply of nitrogen gas is stopped, the gate valve 25a is closed, and the inside of the load lock chamber 21 is reduced to a predetermined pressure by the vacuum pump 27a. Next, the temperature of the substrate 1 is raised to about 50 to 250 ° C. by the heater 28.

  Next, the gate valve 25 b is opened and closed, and the substrate 1 is transferred to the film formation chamber 22. Next, after the film formation chamber 22 is depressurized to a predetermined pressure by the vacuum pump 27b, the flow rate of argon (Ar) gas is controlled by a mass flow controller or the like, and introduced into the film formation chamber 22. Next, a voltage is applied between the sputtering target 29 and the substrate 1 by the DC power source 30 to start sputtering. At this time, the pressure inside the film forming chamber 22 may be about 0.1 to 10 Pa.

  During sputtering, the substrate 1 is transferred from the gate valve 25b side to the gate valve 25c side by the transfer mechanism 24. As a result, the direction in which the sputtered particles fly toward the substrate 1 gradually changes. For example, as shown in FIG. 5, the direction in which the particles fly to the substrate 1 varies depending on the positions A1 to A3 of the substrate 1. First, when the substrate 1 is at the position A1, the direction is the reverse of the traveling direction. Further, when the substrate 1 is at a position A2 in the vicinity immediately above the sputtering target 29, the direction is perpendicular to the traveling direction. Moreover, when the board | substrate 1 exists in position A3, it becomes the same direction as the advancing direction. The speed at which the substrate 1 passes through the position A2 immediately above the sputtering target 29 is faster than the speed at which the substrate 1 passes through the position A1 and the position A3 of the substrate 1. Thus, by changing the particle flying direction with respect to the substrate 1 during sputtering, the crystal growth direction of the lower electrode layer 12 can also be changed along with the flying direction. As shown, a metal layer 12-1 made of curved crystal grains can be formed. At this time, by adjusting the moving speed of the substrate 1, the applied voltage of sputtering, or the flow rate of a gas such as argon used for plasma discharge, the surface of the concavo-convex shape in which the tip of each crystal grain protrudes beyond the grain boundary part. It can be set as the metal layer 12-1 which consists of. Specifically, the protrusion height at the tip of the crystal grain increases as the moving speed of the substrate 1 decreases. Alternatively, the lower the applied voltage, the higher the protruding height of the crystal grain tip. Or the protrusion height of the front-end | tip of a crystal grain becomes high, so that the flow volume of gas, such as argon used for plasma discharge, is increased.

  Next, when the substrate 1 moves to the end of the film formation chamber 22, the sputtering is stopped and the inside of the unload lock chamber 23 is reduced to a predetermined pressure by the vacuum pump 27c. Next, the substrate 1 is moved into the unload lock chamber 23 by opening and closing the gate valve 25c. Next, the vacuum pump 27c is stopped, nitrogen gas is supplied through the supply line 26c, and the unload lock chamber 23 is returned to atmospheric pressure. Next, the gate valve 25d is opened, and the substrate 1 is transferred out of the unload lock chamber 23 by the transfer mechanism 24c.

Next, on this metal layer 12-1, a metal layer 1 made of crystal grains curved in the same manner as described above.
2-2 is formed. Here, since the surface of the metal layer 12-1 has a concavo-convex shape in which the tip of each crystal grain protrudes, it becomes a shadow of the tip of the adjacent crystal grain protruding at the position A1 of the substrate 1. The particles to be sputtered hardly fly near the crystal grain boundary. Therefore, a gap 12a as shown in FIG. 7 is formed.

  Similarly, a metal layer 12-3 made of curved crystal grains is formed on the metal layer 12-2 in the same manner as described above, thereby forming an interface between the metal layer 12-2 and the metal layer 12-3. Can also form the gap 12a. As described above, the lower electrode layer 12 having a plurality of voids 12a can be formed.

  In the above description, the sputtering apparatus has been described as an example, but a method of changing the direction in which particles to be deposited fly may be applied to the evaporation method.

1: Substrate 2, 12: Lower electrode layer 2a, 12a: Gaps 12-1, 12-2, 12-3: Metal layer P: Semiconductor layer capable of photoelectric conversion
4: First semiconductor layer 5: Second semiconductor layer 6: Upper electrode layer 10: Photoelectric conversion cell 11, 111: Photoelectric conversion device

Claims (5)

A substrate,
An electrode layer mainly containing a metal located on the substrate;
A semiconductor layer capable of photoelectric conversion located on the electrode layer;
An upper electrode layer located on the semiconductor layer,
The said electrode layer is a photoelectric conversion apparatus which has several space | gap inside.   2. The photoelectric conversion device according to claim 1, wherein the electrode layer includes a stacked body of a plurality of metal layers, and the plurality of voids are located between the plurality of metal layers.   3. The photoelectric conversion device according to claim 2, wherein each of the plurality of metal layers includes a plurality of crystal grains, and each of the plurality of crystal grains includes a columnar body extending in a curved shape in the thickness direction of the electrode layer.   The photoelectric conversion device according to claim 1, wherein the substrate is made of glass.   The photoelectric conversion device according to claim 1, wherein the electrode layer mainly contains molybdenum.

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