JP2015080335A - Gate drive circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a gate drive circuit capable of preventing element breakage due to a malfunction of an inverter and overcurrent.SOLUTION: A gate drive circuit is connected to a MOS type field effect transistor using silicon carbide. In a driver, the gate terminal of the MOS type field effect transistor is connected to a second gate resistance which has a resistance value smaller than a first gate resistance, and the gate terminal is connected to the anode. The second gate resistance is connected in serial with a diode for gate OFF which is connected the cathode via a path to which the first gate resistance connected in parallel to output a signal to set the MOS type field effect transistor in ON state or OFF state. An overcurrent detection circuit connected to the drain terminal and the source terminal of the MOS type field effect transistor thereacross to detect an overcurrent between the drain and the source.

Description

  Embodiments described herein relate generally to a gate drive circuit.

  Conventionally, in an inverter for a motor variable speed drive of a hybrid electric vehicle or an inverter connected to a power system for photovoltaic power generation, an IGBT (insulated gate bipolar transistor) or MOSFET (MOS type field effect transistor) using Si (silicon) as a switching device ) Is used.

  On the other hand, in recent years, since a high voltage can be applied even with the same thickness as material characteristics, it can be made thinner than Si when used as a switching device for the same voltage, and as a result, SiC with low conduction loss. Normally-off transistors using (silicon carbide) are being put into practical use.

  According to such a transistor, it is possible to drastically reduce the heat generation loss of the inverter in terms of both low conduction loss and high speed low loss switching characteristics. For this reason, it is expected to be applied to energy-saving and environment-friendly inverters such as hybrid electric vehicles, electric vehicles, and inverters for photovoltaic power generation that require high power density.

  As a general gate drive circuit, it is known to perform gate on / off by applying positive and negative bias voltages to the gate of a semiconductor switch.

JP-A-10-304650

  However, as described above, when a normally-off type transistor using SiC is actually operated by an inverter, if a negative bias of the same level as the positive bias at the time of turning on the gate is applied at the time of turning off the gate, the threshold value between on and off is shifted. As a result, the performance as a switch deteriorates.

  Further, the threshold voltage for turning on and off the transistor using SiC is positive but close to 0. For example, when using the upper and lower arms, the drain of the lower switch is turned on when the upper element is turned on in the off state of the lower element. The source voltage rises rapidly from 0V, and the gate-source voltage is increased via the gate-drain floating capacitor. For this reason, the lower and upper thresholds may be exceeded and the lower element may be erroneously turned on.

  In addition, when a short circuit or the like occurs in the upper and lower elements of the inverter, the transistor may break down due to overcurrent.

  Therefore, the problem to be solved by the present invention is to provide a gate drive circuit capable of preventing element malfunction due to malfunction and overcurrent of an inverter.

  According to the embodiment, a gate drive circuit connected to a MOS field effect transistor using silicon carbide is provided.

  The gate drive circuit according to the embodiment includes a driver and an overcurrent detection circuit.

  The driver has a gate terminal of the MOS field effect transistor connected to a second gate resistor having a resistance value lower than that of the first gate resistor, an anode connected to the gate terminal, and a cathode connected to the second gate resistor. The first gate resistor is connected in series with the gate-off diode connected in parallel, and a signal for turning the MOS field effect transistor on or off is output.

  The overcurrent detection circuit is connected between a drain terminal and a source terminal of the MOS field effect transistor and detects an overcurrent between the drain and source.

The figure for demonstrating the gate drive circuit which concerns on 1st Embodiment. The figure for demonstrating the gate drive circuit which concerns on 2nd Embodiment. The figure for demonstrating the gate drive circuit which concerns on 3rd Embodiment. The figure for demonstrating the gate drive circuit which concerns on 4th Embodiment. The figure for demonstrating the gate drive circuit which concerns on 5th Embodiment.

  Hereinafter, each embodiment will be described with reference to the drawings.

(First embodiment)
First, the gate drive circuit according to the first embodiment will be described with reference to FIG. As shown in FIG. 1, the gate drive circuit 10 according to the present embodiment is connected to a MOS field effect transistor (MOSFET) 20a using silicon carbide (SiC).

  The gate drive circuit 10 and the MOSFET 20a constitute an inverter. Although omitted in FIG. 1, for example, in the case of a three-phase inverter, each UVW phase of the inverter is configured by two switching elements connected in series like MOSFETs 20 a and 20 b shown in FIG. 1. MOSFETs 20a and 20b shown in FIG. 1 constitute a main circuit in the inverter. The MOSFETs 20a and 20b connected in series are alternately turned on and off in the inverter.

  Although omitted in FIG. 1, a gate drive circuit similar to the gate drive circuit 10 is connected to the upper MOSFET 20b in the same manner as the MOSFET 20a.

  A gate drive circuit 10 shown in FIG. 1 includes a driver (photocoupler) 11, a gate resistor (first gate resistor) 12 for a MOSFET 20a, a gate-off gate resistor (second gate resistor) 13, a diode 14, and a positive bias. A voltage source 15, a capacitor (capacitor) 16, and an overcurrent detection circuit 17 are provided.

  The driver 11 receives a gate control signal from an inverter control circuit (not shown) connected to the gate drive circuit 10 and outputs a gate on / off signal (a signal for turning on or off the MOSFET 20a). . The driver 11 has a path in which the gate resistor 12 is connected to the gate terminal of the MOSFET 20a in parallel with the series connection of the gate resistor 13 and the diode 14 (that is, the series connection of the gate resistor 12, the gate resistor 13 and the diode 14). Connected through a path including a parallel circuit).

  The gate-off gate resistor 13 has a lower resistance value than the gate resistor 12 for the MOSFET 20a connected in parallel. The diode 14 has an anode connected to the gate terminal of the MOSFET 20 a and a cathode connected to the gate resistor 13.

  A path on the gate resistor 12 side is used when the gate is on, and a path on the side where the gate resistor 13 and the diode 14 are connected in series is used when the gate is off.

  The positive bias voltage source 15 supplies a positive bias voltage when the MOSFET 20a is turned on. When the MOSFET 20a is turned off, no positive bias voltage is supplied (that is, 0V).

  The capacitor 16 is connected between the gate terminal and the source terminal of the MOSFET 20a (that is, between the gate and the source).

  The overcurrent detection circuit 17 is connected between the drain terminal and the source terminal of the MOSFET 20a, and is a circuit for detecting an overcurrent between the drain and source. As shown in FIG. 1, the overcurrent detection circuit 17 includes bipolar transistors 17a to 17c, diodes 17d to 17f, resistors 17g to 17k, capacitors 17l and 17m, and a photocoupler 17n.

  The resistors 17g and 17h are resistors used for determining (adjusting) a voltage value (hereinafter referred to as an overcurrent detection threshold value) that serves as a threshold for detecting an overcurrent described later. The resistor 17i is a base resistor for the bipolar transistor 17b. The resistor 17j is a base resistor for the bipolar transistor 17c. The resistor 17k is a current limiting resistor for the photocoupler 17n. The capacitors 17l and 17m are filter capacitors for removing noise and the like, for example.

  The overcurrent detection circuit 17 detects an overcurrent between the drain and the source by detecting an increase in the drain-source voltage (drain-source voltage) of the MOSFET 20a based on the current flowing in such a circuit. Can do.

  In the gate drive circuit 10 according to the present embodiment, for example, the MOSFET 20b connected in the upper stage in FIG. 1 is turned from the OFF state to the ON state at high speed, and the main circuit DC voltage is applied to both ends of the MOSFET 20a connected in the lower stage in the series. In this case, the series connection of the gate resistor 13 having a lower resistance value than that of the gate resistor 12 and the diode 14 as described above is connected in parallel to the gate resistor 12, so that the drain-gate between the MOSFET 20a is connected. An increase in voltage between the gate and the source via the floating capacitor is suppressed.

  Furthermore, in the gate drive circuit 10 according to the present embodiment, the MOSFET 20b connected in the upper stage in the series is quickly turned from the OFF state to the ON state as described above, and the main circuit DC voltage is applied to both ends of the MOSFET 20a connected in the lower stage in the series. Is applied, the capacitor 17 connected between the gate and source of the MOSFET 20a suppresses the rise in voltage between the gate and source via the floating capacitor between the drain and gate of the MOSFET 20a.

  That is, according to such a gate drive circuit 10, the current flows and the voltage rises because the size of both the floating capacitor between the gate and the drain of the MOSFET 20 a and the floating capacitor between the gate and the source are different. This is suppressed by an increase in capacitance between the gate and the source due to the capacitor 17.

  In the gate drive circuit 10 according to the present embodiment, the overcurrent detection threshold (voltage value) described above is connected to the diode 14 when no short circuit occurs in the MOSFETs 20a and 20b connected in series. The resistors 17g and 17h are set so that no current flows in the path to which the diode 14 is connected when a current flows through the existing path and the short circuit occurs.

  That is, when a short circuit does not occur in the MOSFETs 20a and 20b connected in series, a current flows through a path to which the diode 14 is connected. At this time, the transistors 17a and 17c are turned on, and the transistor 17b is turned off. It becomes. In this state, since no current flows through the photocoupler 17n, no increase in the drain-source voltage (Vds) of the MOSFET 20a is detected in the photocoupler 17n.

  On the other hand, when a short circuit occurs in the MOSFETs 20a and 20b connected in series, no current flows through the path to which the diode 14 is connected. At this time, the transistors 17a and 17c are turned off and the transistor 17b is turned on. . In this state, since a current flows through the photocoupler 17n, the photocoupler 17n detects an increase in the voltage (Vds) between the drain and source of the MOSFET 20a.

  When the overcurrent detection circuit 17 detects an increase in the drain-source voltage (Vds) of the MOSFET 20a (an increase in drain-source voltage due to an overcurrent), the overcurrent detection circuit 17 is provided. The photocoupler 17n outputs a signal indicating that a voltage increase due to overcurrent has been detected (hereinafter referred to as an overcurrent signal) to, for example, an external computer. In this case, the external computer takes a countermeasure such as outputting a gate-off signal (a signal for turning off the MOSFET 20a) to the MOSFET 20a.

  As described above, in this embodiment, the gate terminal of the MOSFET (MOS field effect transistor) 20a using silicon carbide (SiC) 20a and the driver 11 are connected to the gate resistance 13 for gate-off having a resistance value lower than that of the gate resistance 12. A configuration in which an anode is connected to the gate terminal and a gate 14 is connected in series with a diode 14 having a cathode connected to the gate resistor 13 through a path in which the gate resistor 12 is connected in parallel, for example, noise, disturbance, etc. As a result, it is possible to suppress an increase in the voltage between the gate and the source due to the current flowing through the gate resistor 12, so that the MOSFET 20a in the off state is prevented from being erroneously turned on by the increase in the voltage between the gate and the source. be able to. Therefore, according to the present embodiment, it is possible to prevent malfunction of the inverter composed of the MOSFET 20a.

  Further, in the present embodiment, a configuration in which an overcurrent detection circuit is connected between the drain terminal and the source terminal of the MOSFET 20a can detect an increase in voltage between the drain and source of the MOSFET 20a (that is, an overcurrent). Thus, when such an overcurrent is detected, it is possible to prevent element destruction due to overcurrent (that is, protection) by taking a countermeasure such as outputting a gate-off signal to the MOSFET 20a.

  Furthermore, in this embodiment, the configuration in which the capacitor 16 is connected between the gate terminal and the source terminal of the MOSFET 20a can suppress an increase in the voltage between the gate and the source due to the increase in the capacitance between the gate and the source. Since it is possible to prevent the MOSFET 20a in the off state from being erroneously turned on due to the rise in the voltage between the gate and the source, it is possible to prevent the malfunction of the inverter composed of the MOSFET 20a.

(Second Embodiment)
Next, a gate drive circuit according to the second embodiment will be described with reference to FIG. The same parts as those in FIG. 1 described above are denoted by the same reference numerals, and detailed description thereof is omitted. Here, parts different from FIG. 1 will be mainly described.

  As shown in FIG. 2, the gate drive circuit 30 according to the present embodiment is connected to a MOSFET 20a using SiC. The gate drive circuit 30 and the MOSFET 20a constitute an inverter.

  Although omitted in FIG. 2, a gate drive circuit similar to the gate drive circuit 30 is connected to the upper MOSFET 20b in the same manner as the MOSFET 20a.

  The gate drive circuit 30 according to the present embodiment includes a negative bias voltage source 31 as shown in FIG. The negative bias voltage source 31 is connected between the source terminal of the MOSFET 20 a and the driver 11. The negative bias voltage source 31 has a smaller absolute value than the positive bias voltage (value) supplied by the positive bias voltage source 15 described in the first embodiment, and a negative bias voltage (value) greater than zero. ).

  In the gate drive circuit 30 according to the present embodiment, a positive bias voltage is supplied from the positive bias voltage source 15 when the MOSFET 20a is turned on. On the other hand, when the MOSFET 20a is turned off, a negative bias voltage is supplied by the negative bias voltage source 31.

  As described above, in the present embodiment, the absolute value is small with respect to the positive bias voltage between the source terminal of the MOSFET (MOS field effect transistor) 20a using silicon carbide (SiC) 20a and the driver 11, and By connecting a negative bias voltage greater than 0, for example, even if the gate-source voltage rises due to the influence of noise, disturbance, etc., the negative bias voltage prevents the off-on threshold from being exceeded. Can do.

  Note that when SiC is applied with a negative bias voltage at the same level as the positive bias voltage, the oxide film deteriorates and the performance of the switch is lowered. For this reason, in order to maintain the characteristics of SiC, the negative bias voltage (value) supplied by the negative bias voltage source 31 preferably has an absolute value of 1/5 or less with respect to the positive bias voltage. According to this, compared with the case where the negative bias voltage is supplied at the same level as the positive bias voltage, it is possible to prevent the deterioration of the SiC characteristics due to the deterioration of the oxide film.

(Third embodiment)
Next, a gate driving circuit according to the third embodiment will be described with reference to FIG. The same parts as those in FIG. 1 described above are denoted by the same reference numerals, and detailed description thereof is omitted. Here, parts different from FIG. 1 will be mainly described.

  As shown in FIG. 3, the gate drive circuit 40 according to the present embodiment is connected to a MOSFET 20a using SiC. The gate drive circuit 40 and the MOSFET 20a constitute an inverter.

  Although omitted in FIG. 3, a gate drive circuit similar to the gate drive circuit 40 is connected to the upper MOSFET 20b in the same manner as the MOSFET 20a.

  As shown in FIG. 3, the gate drive circuit 40 according to the present embodiment includes a step-up / high voltage chopper circuit 41.

  The ascending high voltage chopper circuit 41 generates (generates) a negative bias voltage from the positive bias voltage supplied by the positive bias voltage source 15. The negative bias voltage generated by the ascending high voltage chopper circuit 41 is supplied when the MOSFET 20a is turned off.

  Further, the voltage value of the negative bias voltage generated by the ascending high voltage chopper circuit 41 is smaller in absolute value than the positive bias voltage and larger than 0 as described in the first embodiment. Preferably, the absolute value is 1/5 or less with respect to the positive bias voltage.

  As described above, in the present embodiment, the negative high voltage chopper circuit 31 that generates the negative bias voltage from the positive bias voltage supplied by the positive bias voltage source 15 is used, and thus the negative voltage described in the second embodiment is used. Without using the bias voltage source 31, even if the voltage between the gate and the source rises due to the influence of noise, disturbance, etc., it is possible to prevent the negative and bias voltages from exceeding the threshold of off and on. Further, it is possible to prevent the SiC characteristics from being deteriorated due to the deterioration of the oxide film.

(Fourth embodiment)
Next, a gate drive circuit according to a fourth embodiment will be described with reference to FIG. The same parts as those in FIG. 1 described above are denoted by the same reference numerals, and detailed description thereof is omitted. Here, parts different from FIG. 1 will be mainly described.

  As shown in FIG. 4, the gate drive circuit 50 according to the present embodiment is connected to a MOSFET 20a using SiC. The gate drive circuit 50 and the MOSFET 20a constitute an inverter.

  Further, although omitted in FIG. 4, a gate drive circuit similar to the gate drive circuit 50 is connected to the upper MOSFET 20b in the same manner as the MOSFET 20a.

  The gate drive circuit 50 according to the present embodiment includes an overcurrent detection circuit 51 as shown in FIG. The overcurrent detection circuit 51 detects the overcurrent between the drain and source of the MOSFET 20a, similarly to the overcurrent detection circuit 17 in the first to third embodiments described above. In the present embodiment, the overcurrent detection circuit 51 includes a Zener diode 51a and a capacitor 51b.

  The Zener diode 51a is an element used to obtain a constant voltage, and reduces the gate voltage (voltage applied between the gate and source of the MOSFET 20a). As shown in FIG. 4, the Zener diode 51 a includes a path in which a gate resistor 12 (first gate resistor) is connected in parallel to a series connection of a gate resistor (second gate resistor) 13 and a diode 14. It is connected to the path between the driver 11.

  The capacitor 51 is a filter capacitor similar to the capacitors 17l and 17m described above.

  In the gate drive circuit 50 according to the present embodiment, the gate voltage can be appropriately reduced by the Zener diode 51a immediately after the overcurrent detection (that is, immediately after the overcurrent detection circuit 51 detects the overcurrent). .

  As described above, in the present embodiment, the Zener diode 51a connected to the path between the driver 11 and the path where the gate resistor 12 is connected in parallel to the series connection of the gate resistor 13 and the diode 14 is connected to the overcurrent. With the configuration provided in the detection circuit 51, the gate voltage is reduced immediately after overcurrent detection, thereby enabling protection in a state where the overcurrent flowing between the drain and source of the MOSFET 20a is reduced (that is, preventing element breakdown). Become.

(Fifth embodiment)
Next, a gate drive circuit according to a fifth embodiment will be described with reference to FIG. The same parts as those in FIG. 1 described above are denoted by the same reference numerals, and detailed description thereof is omitted. Here, parts different from FIG. 1 will be mainly described.

  As shown in FIG. 5, the gate drive circuit 60 according to the present embodiment is connected to a MOSFET 20a using SiC. The gate drive circuit 60 and the MOSFET 20a constitute an inverter.

  Although not shown in FIG. 5, a gate drive circuit similar to the gate drive circuit 60 is connected to the upper MOSFET 20b in the same manner as the MOSFET 20a.

  The gate drive circuit 60 according to the present embodiment includes a booster circuit. The booster circuit is a circuit used to increase the current capacity of the gate drive circuit 60 (driver 11). The booster circuit includes the bipolar transistors 51 and 52 (first and second bipolar transistors) and the resistor 18 shown in FIG. Have.

  In the present embodiment, each of the emitter terminals of the bipolar transistors 51 and 52 included in the booster circuit has a path in which the gate resistor 12 is connected in parallel to the gate terminal of the MOSFET 20a and the gate resistor 13 and the diode 14 are connected in series. Connected through. The base terminals of the transistors 51 and 52 included in the booster circuit are connected to the driver 11. The resistor 18 is a base resistor for the bipolar transistors 51 and 52.

  As described above, in the present embodiment, the configuration including the booster circuit prevents the malfunction of the inverter and the element breakdown due to the overcurrent as described in the first embodiment, and the gate drive circuit 60 ( It becomes possible to increase the current capacity of the driver 11).

  According to each embodiment described above, it is possible to provide a gate drive circuit capable of preventing element breakdown due to malfunction and overcurrent of the inverter.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and the equivalents thereof.

  DESCRIPTION OF SYMBOLS 10, 30, 40, 50, 60 ... Gate drive circuit, 11 ... Driver, 12 ... Gate resistance (1st gate resistance), 13 ... Gate resistance (2nd gate resistance), 14 ... Diode, 15 ... Positive bias Voltage source, 16 ... capacitor, 17, 51 ... overcurrent detection circuit, 17a, 17b, 17c ... bipolar transistor, 17d, 17e, 17f ... diode, 17g, 17h, 17i, 17j, 17k ... resistor, 17l, 17m ... capacitor , 17n, photocoupler, 20a, 20b, MOSFET (MOS type field effect transistor), 31, negative bias voltage source, 41, step-up high voltage chopper circuit, 51a, Zener diode, 52b, capacitor, 61, 62, bipolar transistor, 63 …resistance.

Claims (7)

In a gate drive circuit connected to a MOS field effect transistor using silicon carbide,
The gate terminal of the MOS field effect transistor is connected to a second gate resistor having a resistance value lower than that of the first gate resistor, an anode connected to the gate terminal, and a cathode connected to the second gate resistor. A driver connected to a series connection with a diode via a path in which the first gate resistor is connected in parallel, and outputting a signal for turning on or off the MOS field effect transistor;
An overcurrent detection circuit which is connected between a drain terminal and a source terminal of the MOS field effect transistor and detects an overcurrent between the drain and source.   2. The gate driving circuit according to claim 1, further comprising a capacitor connected between a gate terminal and a source terminal of the MOS field effect transistor.   Connected between the source terminal of the MOS field effect transistor and the driver, the absolute value is smaller than the positive bias voltage supplied when the MOS field effect transistor is turned on, and from 0 3. The gate driving circuit according to claim 2, further comprising a negative bias voltage source for supplying a large negative bias voltage when the MOS field effect transistor is turned off.   4. The gate driving circuit according to claim 3, wherein an absolute value of the negative bias voltage value supplied by the negative bias voltage source is 1/5 or less of the positive bias voltage value.   4. The gate drive circuit according to claim 3, wherein the negative bias voltage source includes a rising high voltage chopper circuit that generates the negative bias voltage from the positive bias voltage.   The overcurrent detection circuit is connected to a path between the driver and the first gate resistor connected in series to the series connection of the second gate resistor and the diode, and a path between the drivers, and the MOS type electric field 2. The gate drive circuit according to claim 1, further comprising a Zener diode for reducing a voltage between a gate and a source of the effect transistor. A booster circuit having first and second bipolar transistors for increasing the current capacity of the driver;
The emitter terminals of the first and second bipolar transistors included in the booster circuit are connected to the gate terminal of the MOS field effect transistor, and the first gate is connected in series with the second gate resistor and the diode. Connected through a path in which resistors are connected in parallel,
The gate drive circuit according to claim 1, wherein base terminals of each of the first and second bipolar transistors included in the booster circuit are connected to the driver.