JP2014146766A - Method for manufacturing solar cell and solar cell - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solar cell with a high FF value by preventing series resistance from being increased due to a rear face point contact electrode when the rear face structure of a solar cell is replaced by a PERT structure.SOLUTION: The impurity doping amount in a diffusion junction type single crystal silicon solar cell is varied right under an electrode and around there. In forming a diffusion source layer, an optimum drive-in temperature is selected by controlling a BH/SiHgas ratio in an atmospheric pressure CVD method at 12% or less in a low concentration diffusion source layer (low concentration diffusion layer 7) and at 35% or more in a high concentration diffusion source layer (high concentration diffusion layer 8). Accordingly, a rear face impurity diffusion layer structure where a sheet resistance can be decreased right under an electrode and recombination can be suppressed can be obtained.

Description

  The present invention relates to a method for manufacturing a solar cell and a solar cell, and more particularly to a reduction in electrode resistance while suppressing recombination in a solar cell back surface structure.

  At present, a crystalline silicon solar cell using a crystalline silicon substrate is mainly used as a solar cell element. In particular, in solar cells using single crystal silicon, development of higher efficiency is progressing, and reduction of sheet resistance directly under an electrode for taking out carriers generated by light irradiation is required (for example, Patent Document 1). As a method to achieve low resistance directly under the electrode and high resistance in the surrounding area, cover the substrate with a protective film such as an oxide film, open only the area where the resistance is reduced using a laser, and then use a diffusion furnace or atmospheric pressure CVD A technique for doping impurities using the above is disclosed (for example, Patent Document 2). In addition, a technique for forming an appropriate concavo-convex structure for the purpose of maintaining the mechanical strength of the substrate while simultaneously realizing the low resistance of the wiring resistance and the contact resistance is disclosed for the impurity diffusion layer and the electrode structure on the back surface (for example, patents) Reference 3).

Special table 2011-512041 gazette Special table 2012-514849 gazette Japanese Patent Laid-Open No. 11-274538

  However, according to the above conventional technique, an Al-BSF structure in which an aluminum (Al) layer is formed on the back surface and Al is diffused in the substrate to form a BSF (Back Surface Field) layer is the current mainstream. However, with this structure, recombination on the back surface cannot be suppressed, which is an impediment to improving the efficiency of solar cells. Therefore, instead of the Al-BSF structure, a PERT structure in which a diffusion layer having the same conductivity type as that of the substrate is formed on the back surface has been proposed (Patent Document 3). The PERT structure is an abbreviation of Passive Emitter and Rear Totally-diffused, and refers to a solar cell in which a BSF layer is formed with a boron diffusion layer instead of the current mainstream aluminum diffusion layer. In the PERT structure, since a BSF layer is formed with a boron diffusion layer, a passivation film such as an oxide film is generally formed on the surface of the boron diffusion layer in order to suppress recombination on the surface of the boron diffusion layer.

  However, since the PERT structure has a back surface point contact structure, the series resistance value is likely to increase, and there is a structural problem that FF (fill factor) decreases. FF is a numerical value representing the ratio of the maximum output to the theoretical output, and is regarded as one of the standard of the quality of the solar cell module. The theoretical output corresponds to the product of open circuit voltage and short circuit current. FF represents the case where the maximum output is the same as the theoretical output, with the maximum value being 1, and the closer the value is to 1, the higher the power generation efficiency.

  The present invention has been made in view of the above, and an object of the present invention is to obtain a solar cell having an optimal back surface PERT structure that suppresses an increase in series resistance and increases the FF value to be equal to or higher than that of conventional Al-BSF. And

  A method of manufacturing a back surface structure of a solar cell, comprising: forming a low concentration diffusion source layer containing impurities of the same conductivity type as a semiconductor substrate on a second surface of the semiconductor substrate; and on the low concentration diffusion source layer A step of forming a protective film having an opening, a step of selectively etching a semiconductor substrate from the opening to form a groove, and a high concentration diffusion source layer containing a higher concentration of impurities than the low concentration diffusion source layer. A step of forming, a diffusion step of diffusing impurities from the low concentration and high concentration diffusion source layers along the second surface of the semiconductor substrate to form a low concentration diffusion layer and a high concentration diffusion layer, and a low concentration diffusion A step of forming a passivation film so as to cover the layer, a step of forming a back electrode so as to contact the high concentration diffusion layer, a pn junction on the first surface of the semiconductor substrate, and a light receiving surface side electrode Craft to form Including the door.

  According to the present invention, since a solar cell having a PERT structure having an optimum diffusion layer and electrode structure on the back surface can be formed, an increase in series resistance value is suppressed, and high efficiency of the solar cell is achieved. I can do it.

FIG. 1-1 is a cross-sectional view schematically showing the solar cell of the first embodiment. 1-2 is a back view schematically showing the solar cell of the first embodiment. FIG. 1-3 is a light-receiving surface view schematically showing the solar cell of the first embodiment. FIGS. 2-1 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-2 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-3 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-4 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-5 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-6 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-7 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-8 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-9 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-10 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIGS. 2-11 is process sectional drawing which shows the process flow of the manufacturing process of the solar cell of Embodiment 1. FIGS. FIG. 3 is a diagram showing a boron depth profile by SIMS analysis. FIG. 4 is a diagram showing a measurement result of bulk lifetime after boron diffusion. FIG. 5 is a diagram showing a correlation diagram between the gas flow rate ratio and the sheet resistance. FIG. 6 is a diagram illustrating a sample structure for sheet resistance measurement. FIG. 7 is a cross-sectional view schematically showing the solar cell of the second embodiment. FIG. 8A is an enlarged cross-sectional view of a main part of the trapezoidal groove according to the second embodiment. FIG. 8-2 is an enlarged cross-sectional view of a main part of the V-shaped groove of the first embodiment.

  Embodiments of a solar cell and a method for manufacturing the solar cell according to the present invention will be described below in detail with reference to the drawings. In addition, this invention is not limited by this embodiment, In the range which does not deviate from the summary of this invention, it can change suitably. In the drawings shown below, the scale of each member may be different from the actual scale for easy understanding.

Embodiment 1 FIG.
FIGS. 1-1 to 1-3 are diagrams schematically showing the solar cell of the present embodiment, in which FIG. 1-1 is a sectional view, FIG. 1-2 is a back view, and FIG. 1-3 is a light receiving surface. It is a figure which shows (surface). FIG. 1-1 corresponds to a cross-sectional view taken along the line CC in FIGS. 1-2 and 1-3. FIGS. 2-1 to 2-11 are process cross-sectional views illustrating the process flow of the manufacturing process of the solar cell.

  In the solar cell of the first embodiment, a cross section formed so as to form a dot-spotted pattern formed by opening a pattern along the <100> axis direction on the back surface (second surface) side of the semiconductor substrate 1 A high-concentration diffusion layer 8 is formed along the V-shaped V-shaped groove 1T, and the other portion is a low-concentration diffusion layer 7 to constitute a second impurity diffusion layer. The low concentration diffusion layer 7 is covered with a passivation film 9 made of a two-layer structure film of a silicon oxide film and a silicon nitride film. With this configuration, it is possible to suppress recombination of the back surface while ensuring a reduction in minority carrier extraction resistance.

  In the solar cell according to the first embodiment, an n-type diffusion layer 11 (first impurity diffusion layer having a conductivity type different from that of the substrate) is formed by phosphorous diffusion on the light-receiving surface 1A side of the semiconductor substrate 1 made of a p-type single crystal silicon substrate. ) To form a pn junction. An antireflection film 12 made of a silicon nitride film (SiN film) is formed on the n-type diffusion layer 11. The semiconductor substrate 1 is not limited to a p-type single crystal silicon substrate, and a p-type polycrystalline silicon substrate, an n-type polycrystalline silicon substrate, or an n-type single crystal silicon substrate may be used.

  Further, on the surface of the semiconductor substrate 1 on the light receiving surface (first surface) 1A side, a fine unevenness (texture) structure composed of an inverted pyramid-shaped V-shaped groove 1T is formed as a texture structure. The inverted pyramid-shaped micro unevenness increases the area of the light receiving surface 1A that absorbs light from the outside, suppresses the reflectance on the light receiving surface 1A, and efficiently confines light in the solar cells.

The antireflection film 12 is made of a silicon nitride film (SiN film) that is an insulating film. The antireflection film 12 is not limited to the silicon nitride film (SiN film), and may be formed of an insulating film such as a silicon oxide film (SiO ₂ film) or a titanium oxide film (TiO ₂ ) film.

  Further, as shown in FIG. 1-3, a plurality of long and thin surface silver grid electrodes 13G are provided side by side on the light receiving surface 1A side of the semiconductor substrate 1, and a surface silver bus electrode that is electrically connected to the surface silver grid electrode 13G. 13B is provided so as to be substantially orthogonal to the surface silver grid electrode 13G to constitute the light-receiving surface side electrode 13. Each of the bottom portions is electrically connected to the n-type diffusion layer 11. The front silver grid electrode 13G and the front silver bus electrode 13B are made of a silver material.

  The front silver grid electrode 13G has a width of, for example, about 30 μm to 200 μm and is arranged substantially in parallel at intervals of about 2 mm, and collects electricity generated inside the semiconductor substrate 1. Further, the front silver bus electrode 13B has a width of, for example, about 1 mm to 3 mm and is arranged in a number of 2 to 4 per solar cell, and takes out the electricity collected by the front silver grid electrode 13G to the outside. And the light-receiving surface side electrode 13 which is a 1st electrode is comprised by the surface silver grid electrode 13G and the surface silver bus electrode 13B. Since the light receiving surface side electrode 13 blocks sunlight incident on the semiconductor substrate 1, it is desirable to reduce the area as much as possible from the viewpoint of improving the power generation efficiency.

  As the electrode material of the light receiving surface side electrode of the silicon solar battery cell, a silver paste is usually used, for example, lead boron glass is added. This glass has a frit shape and is composed of, for example, a composition of 5-30 wt% lead (Pb), 5-10 wt% boron (B), 5-15 wt% silicon (Si), and 30-60 wt% oxygen (O). Furthermore, zinc (Zn), cadmium (Cd), etc. may be mixed by several wt%. Such lead boron glass has a property of melting by heating at several hundred degrees C. (for example, 800.degree. C.) and eroding silicon at that time. In general, in a method for manufacturing a crystalline silicon solar battery cell, a method of obtaining electrical contact between a silicon substrate and a silver paste by using the characteristics of the glass frit is used.

  On the other hand, the back surface 1B (second surface: the surface opposite to the light receiving surface) of the semiconductor substrate 1 is provided with a back aluminum electrode made of an aluminum material over the entire surface except for a part of the outer edge region. A back silver electrode (not shown) made of a silver material is provided so as to extend in substantially the same direction as the electrode 13B. The back aluminum electrode and the back silver electrode constitute the back electrode 14 as the second electrode. Further, the back aluminum electrode is also expected to have a BSR (Back Surface Reflection) effect in which long-wavelength light passing through the semiconductor substrate 1 is reflected and reused for power generation.

  Further, on the back surface 1B side of the semiconductor substrate 1, as described above, a V-shaped groove 1T having a V-shaped cross section formed by opening a pattern along the <100> axis direction so as to form a dot-spotted pattern. Is forming. A high concentration diffusion layer 8 (p + layer) is formed along the surface layer portion of the V-shaped groove 1T. This high-concentration diffusion layer 8 is provided in order to obtain the BSF effect, and the electron concentration in the p-type layer (semiconductor substrate 1) is generated by an electric field having a band structure so that electrons in the p-type layer (semiconductor substrate 1) do not disappear. To increase. The high-concentration diffusion layer 8 is formed on the back side of the semiconductor substrate 1 and the other portion is a low-concentration diffusion layer 7. On the low-concentration diffusion layer 7, a two-layer structure of a silicon oxide film and a silicon nitride film is formed. The film is covered with a passivation film 9 made of a film to form a recombination suppressing structure.

  In the solar battery configured as described above, when sunlight is irradiated onto the semiconductor substrate 1 from the light receiving surface side of the solar battery cell, holes and electrons are generated. The generated electrons move toward the n-type diffusion layer 11 by the electric field of the pn junction (the junction surface between the semiconductor substrate 1 made of p-type single crystal silicon and the n-type diffusion layer 11), and the holes are formed in the semiconductor substrate 1. Move towards. As a result, electrons are excessive in the n-type diffusion layer 11 and holes are excessive in the semiconductor substrate 1. As a result, a photovoltaic force is generated. This photoelectromotive force is generated in the direction in which the pn junction is biased in the forward direction, the light receiving surface side electrode 13 connected to the n-type diffusion layer 11 becomes a negative electrode, and the back surface electrode including the back aluminum electrode connected to the high concentration diffusion layer 8 14 becomes a positive pole, and a current flows in an external circuit (not shown).

  Next, a method for manufacturing the solar cell according to the first embodiment will be described with reference to FIGS. 2-1 to 2-11. FIGS. 2-1 to 2-11 are main-portion cross-sectional views for explaining an example of the manufacturing process of the solar battery cell according to the first embodiment.

  First, as the semiconductor substrate 1, for example, a p-type single crystal silicon substrate having a thickness of several hundred μm is prepared (FIG. 2-1). Since the p-type single crystal silicon substrate is manufactured by slicing an ingot formed by cooling and solidifying molten silicon with a wire saw, damage at the time of slicing remains on the surface. Therefore, the p-type single crystal silicon substrate is etched near the surface of the p-type single crystal silicon substrate by etching the surface by immersing the surface in an acid or heated alkaline solution, for example, an aqueous sodium hydroxide solution. Remove the damage area that exists in the. For example, the surface is removed by a thickness of 10 μm to 20 μm with several to 20 wt% caustic soda or carbonated caustic soda.

Next, a low-concentration BSG (Boron Silicate Glass) film (low-concentration diffusion source layer) 2 is formed on the back surface 1B side of the semiconductor substrate 1 made of this p-type single crystal silicon substrate by atmospheric pressure CVD. A mixed gas of B ₂ H ₆ (diborane) and SiH ₄ (silane) is used as the source gas, and the mixing ratio will be described later. The temperature of the semiconductor substrate surface during film formation is preferably in the range of 400 ° C. to 500 ° C., and the film thickness is preferably 50 nm or less. When the film thickness exceeds 50 nm, diffusion into the oxide film containing boron also occurs, so that uniform diffusion cannot be performed within the silicon substrate surface, resulting in unevenness in sheet resistance, causing a reduction in efficiency. Further, as a cap film for the low-concentration BSG film 2, an SiO ₂ film may be formed by atmospheric pressure CVD immediately after the low-concentration BSG film is formed. This cap film has a role of preventing detachment from the surface when boron diffusion is performed, and is necessary for aiming at uniform diffusion.

  A protective film 3 is formed on the film formed by the atmospheric pressure CVD method. At this time, the protective film 3 is preferably an insulating film having alkali resistance such as a nitride film. Here, when a nitride film is used as the protective film 3, the refractive index is desirably 2.5 or more. A nitride film having a refractive index of less than 2.5 has a small amount of hydrogen contained in the film, so that patterning using a laser is difficult. As a method for forming the nitride film, a plasma CVD method or the like can be given. Thus, a structure as shown in FIG. 2-2 is obtained.

  Thereafter, the back surface is processed into an electrode pattern to expose the underlying semiconductor substrate 1 (FIGS. 2-3). As a processing method, physical etching using a laser or RIE or chemical etching using an etching paste is used. The back surface opening 4 is formed along the <100> axis direction of the silicon substrate.

  Thereafter, etching is performed with an alkaline solution using the pattern of the protective film 3 as a mask to form a V-shaped groove 1T as shown in FIG. 2-4. At this time, depending on the thickness of the semiconductor substrate 1, a trapezoidal groove (described later) may be formed by stopping etching with an alkaline solution in order to maintain mechanical strength.

  This V-shaped groove 1T has a processing diameter of 5 μm to 100 μm by a laser and opens a pattern in the <100> axial direction with respect to a single crystal silicon substrate, and is etched with an alkaline solution to form a V-shaped groove 1T having a depth of 10 to 70 μm. Form. Although the processing diameter by the laser is preferably small, it is preferably 5 μm or more from the viewpoint of processing accuracy. On the other hand, when the processing diameter exceeds 100 μm, it becomes difficult to suppress recombination, and the efficiency is lowered. On the other hand, if the depth of the V-shaped groove 1T is less than 10 μm, the contact area between the high-concentration diffusion layer 8 to be formed later and the back electrode 14 cannot be taken sufficiently, and the series resistance value is reduced. It becomes difficult. On the other hand, when the thickness exceeds 70 μm, it is difficult to sufficiently secure the substrate strength of the semiconductor substrate 1.

  The V-shaped groove 1T formed on the back surface may be either a dot pattern or a line pattern. Depending on the state of the solar cell to be used, priority can be given to whether to give priority to the minority carrier extraction area or to suppress recombination on the back surface.

Next, as shown in FIG. 2-5, a high-concentration BSG film (high-concentration diffusion source layer) 6 is formed at a location where the base of the semiconductor substrate 1 is exposed. After the low-concentration BSG film 2 and the high-concentration BSG film 6 are formed on the back surface in this way, drive-in is performed in an N ₂ atmosphere at 900 ° C. or higher, and then the low-concentration and high-concentration BSG layers 2, 6 is removed. In this way, the low concentration diffusion layer 7 and the high concentration diffusion layer 8 are formed as shown in FIG. 2-6.

  Thus, after forming the low concentration diffusion layer 7 and the high concentration diffusion layer 8 on the back surface 1B of the semiconductor substrate 1, the passivation film 9 is formed on the upper layer (FIG. 2-7). The passivation film 9 is formed using an oxidation furnace with an oxide film having a thickness of 200 nm or less, or an atmospheric pressure CVD method is used to form an oxide film such as a silicon oxide film with a thickness of 200 nm or less. Heat treatment is desirable. The thickness of the oxide film is desirably 5 nm or more. Alternatively, it is more effective to form the passivation film 9 by forming a nitride film using the plasma CVD method on the oxide film as described above on the oxide film.

  After this passivation film 9 is formed, a V-shaped groove 1T is formed by anisotropic etching using an alkaline solution as shown in FIGS. 2-8. The texture is not limited to the V-shaped groove 1 </ b> T, such as a minute unevenness such as a random structure or an inverted pyramid structure.

Then, as shown in FIG. 2-9, phosphorous diffusion is performed on the light receiving surface 1 </ b> A of the semiconductor substrate 1 to form an emitter layer composed of the n-type diffusion layer 11. That is, an n-type diffusion layer 11 having a thickness of several hundreds of nanometers is formed by diffusing a group V element such as phosphorus (P) in the semiconductor substrate 1. Here, phosphorus oxychloride (POCl ₃ ) is diffused for several tens of minutes at a high temperature of 800 ° C. to 900 ° C. by thermal diffusion on a p-type single crystal silicon substrate having an inverted pyramid texture structure formed on the light receiving surface side. To form a pn junction. Thereby, the n-type diffusion layer 11 is formed on the entire surface of the p-type single crystal silicon substrate.

In this diffusion step, the p-type single crystal silicon substrate is several tens of minutes at a high temperature of, for example, 800 ° C. to 900 ° C. by a vapor phase diffusion method in a mixed gas atmosphere of, for example, phosphorus oxychloride (POCl ₃ ) gas, nitrogen gas, and oxygen gas. In the meantime, the n-type diffusion layer 11 in which phosphorus (P) is diffused is uniformly formed on the surface layer of the p-type single crystal silicon substrate by thermal diffusion. Good electrical characteristics of the solar cell can be obtained when the sheet resistance range of the n-type diffusion layer 11 formed on the surface of the semiconductor substrate 1 is about 30Ω / □ to 150Ω / □. This emitter layer may also be a selective emitter layer that changes the sheet resistance value immediately below and around the electrode. When forming the selective emitter layer, similarly to the back electrode side, when using the atmospheric pressure CVD method, a high concentration diffusion source and a PSG film serving as a low concentration diffusion source are formed, and a single drive-in diffusion is performed. Can be easily formed. Moreover, it is possible to reduce the thermal process by performing drive-in diffusion simultaneously with the formation of the low concentration diffusion layer 7 and the high concentration diffusion layer 8 on the back electrode side.

Then, as shown in FIG. 2-10, after the n-type diffusion layer 11 is formed, the antireflection film 12 is formed by a plasma CVD method or the like. The film thickness and refractive index of the antireflection film 12 are set to values that most suppress light reflection. The antireflection film 12 is formed by forming a silicon nitride film under a reduced pressure at a temperature of 300 ° C. or higher using a mixed gas of silane (SiH ₄ ) gas and ammonia (NH ₃ ) gas as a raw material. The The refractive index is, for example, about 1.9 to 2.4, and the optimum antireflection film thickness is, for example, 70 nm to 90 nm. As the antireflection film 12, two or more films having different refractive indexes may be laminated. In addition to the plasma CVD method, the antireflection film 12 may be formed by vapor deposition, thermal CVD, or the like. It should be noted that the antireflection film 12 formed in this way is an insulator, and merely forming the light receiving surface side electrode 13 on the surface does not act as a solar battery cell.

  Then, as shown in FIG. 2-11, an opening h2 is formed in the passivation film 9 on the back surface by photolithography. And the electrode pattern of the light-receiving surface side electrode 13 and the back surface electrode 14 is formed by thick film printing. That is, an electrode material paste containing glass frit in the shape of the surface silver grid electrode 13G and the surface silver bus electrode 13B (see FIG. 1-3) on the antireflection film 12 which is the light receiving surface of the p-type single crystal silicon substrate. After the silver paste is applied by screen printing, the silver paste is dried.

  Next, an aluminum paste as an electrode material paste is applied to the shape of the back electrode 14 by screen printing on the back side of the p-type single crystal silicon substrate, and a silver paste as an electrode material paste is applied to the shape of the back silver electrode. And dry. In the figure, only the aluminum paste is shown, and the description of the silver paste is omitted.

  Finally, the electrode patterns of the light receiving surface side electrode 13 and the back surface electrode 14 are baked. As described above, the electrode paste on the light-receiving surface side and the back surface side of the semiconductor substrate 1 is simultaneously fired at, for example, 600 ° C. to 900 ° C., so that the glass frit contained in the silver paste on the front side of the semiconductor substrate 1 prevents reflection. While the film 12 is melting, the silver material contacts the silicon and re-solidifies. Thereby, the surface silver grid electrode 13G and the surface silver bus electrode 13B as the light-receiving surface side electrode 13 are obtained, and conduction between the light-receiving surface side electrode 13 and the silicon of the semiconductor substrate 1 is ensured. This process is called the fire-through method. In this way, the light-receiving surface side electrode 13 breaks through the antireflection film 12 on the surface and contacts the n-type diffusion layer 11 through the contact hole h1, and the solar cell shown in FIGS. 1-1 to 1-3 is formed. Is done.

  In the above embodiment, the fire-through method is used when forming the electrode on the back surface. However, the electrode may be formed after pattern opening using physical etching such as laser or chemical etching method such as etching paste. good.

  In this way, a solar cell having a high efficiency and a high FF value can be formed very easily. Since the low-concentration and high-concentration diffusion layers are formed prior to the step of forming the pn junction and the light-receiving surface side electrode on the first surface, a more efficient solar cell can be obtained. . The reason why the diffusion layer having the same conductivity type as that of the substrate is formed before the diffusion layer having a different conductivity type is that the influence of the thermal process applied in the series of solar cell element forming processes is small.

FIG. 3 shows the SIMS depth profile analysis results of the low-concentration diffusion layer 7 (curve a) composed of a low-concentration boron layer and the high-concentration diffusion layer 8 (curve b) composed of a high-concentration boron layer. This low-concentration boron layer can be obtained by setting the ratio of B ₂ H ₆ / SiH ₄ to 12% or less when forming a low-concentration diffusion source layer (BSG) by atmospheric pressure CVD. Further, the high concentration diffusion layer 8 can be obtained by setting the ratio of B ₂ H ₆ / SiH ₄ to 35% or more when forming the high concentration diffusion source layer (BSG) by the atmospheric pressure CVD method. In the present embodiment, when the low-concentration diffusion layer 7 and the high-concentration diffusion layer 8 are converted into boron, they are defined as follows.
High-concentration boron layer: The peak concentration from the outermost surface to a depth of 100 nm is 1.0E21 / cm ³ or more.
Low-concentration boron layer: The peak concentration from the outermost surface to a depth of 100 nm is less than 1.0E21 / cm ³ .

When a B ₂ H ₆ / SiH ₄ ratio is formed at a rate of 12 to 25%, boron diffusion into the p-type single crystal silicon substrate is greatly promoted, thereby inducing defects in the p-type single crystal silicon substrate. This facilitates recombination because the high-concentration boron concentration layer expands in the depth direction. As a guideline, the peak concentration from the outermost surface of the low concentration diffusion layer 7 to the depth of 100 nm is preferably a low concentration from the viewpoint of suppressing recombination, and the order of 1E + 18 to 1E + 20 is ideal. In the atmospheric pressure CVD method, by using the above B ₂ H ₆ / SiH ₄ flow rate, the concentration ratio at the outermost surface of the low concentration diffusion layer 7 and the high concentration diffusion layer 8 is from 1/10 to 1/1000. A degree of concentration gradient can be applied. The impurity concentration in the depth direction is less than 1.0E18 / cm ³ in the region from 300 nm to 600 nm in depth, and the concentration is attenuated in the depth direction in the region from 300 nm to 600 nm to 1.0E17. / cm ³ or less is desirable.

FIG. 4 is a result of making a sample having a structure as shown in FIG. 6 and measuring a bulk life time. In this sample, the phosphorus diffusion layer 18 and the passivation film 19 are formed under the same conditions as the n-type diffusion layer 11 and the antireflection film 12 in the above embodiment, and the process flow shown in FIGS. A prototype was made by removing texture formation and electrode formation. This is performed in order to make only the back-surface boron diffusion layer 20 an evaluation target, and the result obtained here can reflect the actual characteristics of the solar cell. Only the boron diffusion layer 20 on the back surface was subjected to an experiment in which the B ₂ H ₆ / SiH ₄ ratio described above was set to 3 levels and the drive-in temperature was set to 4 levels. On each condition in the figure, the temperature increases from left to right.

From the result of FIG. 4, when the B ₂ H ₆ / SiH ₄ ratio is set to around 24%, as shown by the curve a 2, the bulk lifetime is lowered for the above-mentioned reason, and the low concentration layer and the high concentration layer It can be seen that by reducing the B ₂ H ₆ / SiH ₄ ratio of the concentration layer to 12% and 35%, respectively, the decrease in bulk lifetime is suppressed as shown by the curve a3.

FIG. 5 shows the results of measuring the relationship between the sheet resistance value and the B ₂ H ₆ / SiH ₄ ratio. As shown in FIG. 5, the sheet resistance value is lowest when the B ₂ H ₆ / SiH ₄ ratio is around 12 to 25% when measured for each B ₂ H ₆ / SiH ₄ ratio. The sheet resistance value also serves as an index of the ease of impurity diffusion into the silicon substrate, and provides information on the formation of the diffusion layer. It shows that the lower the sheet resistance, the more boron diffusion is promoted. From the result of FIG. 5, it is judged that the diffusion method has changed based on the B ₂ H ₆ / SiH ₄ ratio of 12 to 25%. it can. When the B ₂ H ₆ / SiH ₄ ratio is less than 20%, the sheet resistance increases rapidly as the B ₂ H ₆ / SiH ₄ ratio decreases. When the B ₂ H ₆ / SiH ₄ ratio is 12% or less, the boron concentration contained in the BSG film is low, so that a low-concentration boron diffusion layer is formed. For this reason, the diffusion layer is formed in the semiconductor substrate 1 in a state where it is difficult to induce defects, so that a diffusion layer that hardly causes recombination is formed.

On the other hand, the B ₂ H ₆ / SiH ₄ ratio is higher than 20% area, B ₂ H ₆ / SiH ₄ be increased ratio not observed reduction in sheet resistance, diffusing into the silicon substrate interior is suppressed The result is as follows. This correlates with the SIMS analysis results in FIG. 3 and corresponds to the fact that boron diffusion in the depth direction is suppressed simultaneously with the formation of high surface concentration, and the surface high concentration boron layer is a barrier. Is guessed. That is, when the B ₂ H ₆ / SiH ₄ ratio is 35% or more, since the surface high-concentration boron layer suppresses diffusion, no significant change in the sheet resistance value can be confirmed regardless of the high boron concentration in the BSG film. From the above, the film formation at the B ₂ H ₆ / SiH ₄ ratio of 12 to 25% described above cannot obtain a favorable result for improving the efficiency of the solar cell. A film having a large bulk lifetime can be obtained.

  As described above, according to the solar cell of the first embodiment, the low concentration diffusion source layer 2 having the same conductivity type as the substrate is formed on the back surface of the solar cell, and it is covered with the protective film 3 having alkali resistance, After forming a V-shaped groove or a trapezoidal groove in the electrode pattern, the high-concentration diffusion source layer 6 is formed, and heat treatment is performed, so that different types of impurity diffusion layers (low-concentration diffusion layer 7, high-concentration diffusion layer) are formed. 8) is formed, and a passivation film 9 is formed immediately above the impurity diffusion layer, and then an electrode is formed. Through this process, the sheet resistance just below the back electrode 14 is lowered to lower the contact resistance and effectively take out the carrier. In addition, by increasing the sheet resistance around it, the impurity concentration is lowered to suppress hole-electron recombination. Therefore, an increase in series resistance can be prevented and a solar cell having an excellent FF value can be provided.

Embodiment 2. FIG.
FIG. 7 is a cross-sectional view schematically showing the solar cell of the second embodiment. Since the back view and the front view are the same as those described in Embodiment Mode 1, description thereof is omitted here. 7 corresponds to a cross-sectional view taken along the line CC in FIGS. 1-2 and 1-3.

  In the solar cell of the first embodiment, a V-shaped V-shaped cross section formed so as to form a dot-dispersed pattern formed by opening a pattern along the <100> axis direction on the back surface side of the semiconductor substrate 1. A high concentration diffusion layer 8 is formed along the trench 1T, and the other portion is a low concentration diffusion layer 7. The low concentration diffusion layer 7 is formed of a two-layer structure film of a silicon oxide film and a silicon nitride film. Covered with a passivation film 9. On the other hand, in the present embodiment, as shown in the cross-sectional view in FIG. 7 and the enlarged view of the main part in FIG. 8-1, the groove 1D having a trapezoidal cross section is formed instead of the V-shaped groove. Features.

  8-1 has shown the principal part enlarged view of the trapezoid groove | channel 1D part of the solar cell of this Embodiment. When the protective film 3 is opened and then placed in an alkaline solution, etching proceeds while leaving the Si (111) surface, and a V-shaped groove is spontaneously formed. However, when the thickness of the substrate is less than 180 μm, as shown in FIG. 8-2 from the viewpoint of mechanical strength, the V-shaped groove 1T as in the first embodiment has a problem of strength, and cracks occur in the process. Therefore, it is desirable to have a trapezoidal groove 1D structure with high mechanical strength. In this case, the trapezoidal groove 1D can be easily formed by removing the etching from the alkaline solution before forming the V-shaped groove, and can be used separately depending on the application.

  By forming the embedded electrode having the above-described configuration on the back surface, a thin linear electrode or a small-diameter point electrode can be formed, and at the same time, the contact area with the high concentration diffusion layer 8 can be increased. Thus, the series resistance value can be lowered. Moreover, according to said method, a structure with a low series resistance value can be manufactured easily.

  The shape of the groove for embedding the back surface electrode may be either a linear groove or a small-diameter point-shaped recess, and the cross-sectional shape can be appropriately changed to a V-shaped cross section, a trapezoidal shape, a hemispherical shape, or the like.

  Furthermore, grooves such as V-shaped grooves or trapezoidal grooves formed on the back surface of the solar cell are patterned with a laser with a processing diameter of 5 μm to 100 μm in the <100> axial direction and etched with an alkaline solution. Thus, it is desirable to form a V-shaped or trapezoidal groove having a depth of 10 to 70 μm. The machining diameter is preferably small, but is preferably 5 μm or more from the viewpoint of machining accuracy. On the other hand, if it exceeds 100 μm, it becomes difficult to suppress recombination and the efficiency is lowered. On the other hand, if the depth is less than 10 μm, a sufficient contact area between the high-concentration diffusion layer 8 and the back electrode 14 cannot be obtained, and it is difficult to reduce the series resistance value. On the other hand, if it exceeds 70 μm, it becomes difficult to sufficiently secure the substrate strength of the semiconductor substrate.

  As described above, the solar cell according to the present invention is useful for reducing the series resistance and improving the FF, and is particularly suitable for increasing the efficiency of the solar cell.

  DESCRIPTION OF SYMBOLS 1 Semiconductor substrate, 1A light-receiving surface, 1B back surface, 1D trapezoidal groove, 1T V-shaped groove, 2 low concentration BSG layer, 3 protective film, 4 back surface opening, 6 high concentration BSG layer, 7 low concentration diffusion layer, 8 high concentration diffusion Layer, 9 passivation film, 11 n-type diffusion layer, 12 antireflection film, 13 light receiving surface side electrode, 13G surface silver grid electrode, 13B surface silver bus electrode, 14 back electrode, a depth profile of low-concentration boron diffusion layer, b Depth profile of high-concentration boron diffusion layer, 18 phosphorous diffusion layer, 19 passivation film, 20 backside boron diffusion layer, h1 contact hole, h2 opening, 1T V-shaped groove.

Claims (7)

On the second surface facing the first surface, which is the light receiving surface of the one-conductivity-type semiconductor substrate,
Forming a low concentration diffusion source layer containing impurities of the same conductivity type as the semiconductor substrate;
Forming a protective film having an opening on the low-concentration diffusion source layer;
Selectively etching the semiconductor substrate from the opening to form a groove;
Forming a high concentration diffusion source layer containing impurities at a higher concentration than the low concentration diffusion source layer;
A diffusion step of diffusing impurities from the low concentration and high concentration diffusion source layers along the second surface of the semiconductor substrate to form a low concentration diffusion layer and a high concentration diffusion layer;
Forming a passivation film so as to cover the low-concentration diffusion layer;
Forming a back electrode so as to contact the high concentration diffusion layer;
Forming a pn junction on the first surface and forming a light receiving surface side electrode;
The manufacturing method of the solar cell characterized by including. The semiconductor substrate is a p-type single crystal silicon substrate;
The impurity is boron;
The diffusion step is a step of performing a heat treatment so that a peak concentration of boron from the second surface of the semiconductor substrate to a depth of 100 nm is 1.0E21 / cm ³ or more. Solar cell manufacturing method. Forming the low concentration diffusion source layer and the high concentration diffusion source layer,
Both are atmospheric pressure CVD processes using a mixed gas of B ₂ H ₆ (diborane) and SiH ₄ (silane) as source gases,
The step of forming the low-concentration diffusion source layer has a B ₂ H ₆ / SiH ₄ ratio of 12% or less,
3. The method for manufacturing a solar cell according to claim 1, wherein the step of forming the high concentration diffusion source layer is a step of setting a B ₂ H ₆ / SiH ₄ ratio to 35% or more. Prior to the step of forming a pn junction and a light receiving surface side electrode on the first surface,
The method for manufacturing a solar cell according to claim 1, wherein a step of forming the low concentration and high concentration diffusion layers is performed. A semiconductor substrate having one conductivity type;
A first impurity diffusion layer formed on a first surface of the semiconductor substrate and having a conductivity type different from that of the semiconductor substrate;
A second impurity diffusion layer formed on the second surface of the semiconductor substrate and having the same conductivity type as the semiconductor substrate;
A light-receiving surface side electrode formed on the first impurity diffusion layer;
A back electrode formed through a passivation film having an opening on the second impurity diffusion layer,
The second surface has a groove in a region corresponding to the opening,
The second impurity diffusion layer includes a high concentration impurity layer formed along the groove,
A solar cell, comprising: a low concentration impurity layer formed along the passivation film surrounding the groove and having a lower concentration than the high concentration impurity layer. The semiconductor substrate is a p-type single crystal silicon substrate;
The solar cell according to claim 5, wherein the high concentration impurity layer has a boron peak concentration of 1.0E21 / cm ³ or more from the second surface of the semiconductor substrate to a depth of 100 nm.   The solar cell according to claim 5 or 6, wherein the groove is a groove having a V-shaped cross section or a trapezoidal cross section.

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