JP2014013797A - One-chip igniter, and internal combustion engine ignition device - Google Patents

Abstract

Provided is a one-chip igniter capable of realizing low operating voltage, high noise immunity, miniaturization and low cost.
A one-chip igniter is provided by lowering a gate threshold voltage Vtgh of a MOS transistor and lowering operating voltages of a current limiting circuit, an overheat detection circuit, a timer circuit, an overvoltage protection circuit, an input hysteresis circuit, and the like. The operating voltage can be lowered. The effective gate threshold voltage of the MOS transistor is 1 V or more, and the channel length of the IGBT is 4 μm or less. Further, the thickness of the gate oxide film of the MOS transistor is 5 nm or more and less than 25 nm.
[Selection] Figure 1

Description

  The present invention relates to a low-voltage driven one-chip igniter and an internal combustion engine ignition device having the one-chip igniter.

FIG. 8 is a configuration diagram of a main part of an internal combustion engine ignition device 500 on which a conventional one-chip igniter 501 is mounted.
The internal combustion engine ignition device 500 mainly includes a one-chip igniter 501, an ignition coil 502, a spark plug 503, a battery 504, an ECU 505 (engine control unit), and the like. Reference numerals 75, 76, and 77 in the figure denote a collector terminal, a gate terminal, and an emitter terminal of the one-chip igniter 501. Further, 51 is an IGBT including a sense IGBT, and 56 is a sense resistor.

FIG. 9 is a circuit diagram of a main part of a conventional one-chip igniter 501 mounted on the internal combustion engine ignition apparatus 500 shown in FIG. The one-chip igniter 501 shown here is an example.
The one-chip igniter 501 includes an IGBT 51, a first MOSFET 63, a second MOSFET 66, a current limiting circuit 57, an overheat detection circuit 60, a Zener diode 69, a resistor 72, a collector terminal 75, a gate terminal 76, and an emitter terminal 77. The collector 52 of the IGBT 51 is connected to the collector terminal 75, and the emitter 54 is connected to the emitter terminal 77. The sense emitter 55 of the IGBT 51 is connected to one end of a sense resistor 56, the other end of the sense resistor 56 is connected to a ground wiring 74, and the ground wiring 74 is connected to an emitter terminal 77 having a ground potential 78. The gate 53 of the IGBT 51 is connected to the gate terminal 76 by a gate wiring 73. The current limiting circuit 57, the overheat detection circuit 60, the first MOSFET 63, the second MOSFET 66, the Zener diode 69, and the resistor 72 are connected between the gate wiring 73 and the ground wiring 74, respectively. The overheat detection circuit 60 includes a MOSFET (A), a diode (A), and an inverter circuit (C) as shown in the figure. In addition to the above components, as indicated by a dotted line, a speed-up diode (D) for speeding up the turn-off of the IGBT 51 is connected between the cathode of the Zener diode 69 and the source of the second MOSFET 66, and between the collector 52 and the gate 53. A Zener diode (f) is connected for surge protection. Further, a resistor (O) is inserted in the gate wiring 73 between the resistor 72 and the Zener diode 69 or between the high potential side of the current limiting circuit 57 and the drain of the second MOSFET 66 for surge suppression. Each of the above parts is formed on the same semiconductor substrate 81.

  One end of the sense resistor 56 and the gate 64 of the first MOSFET 63 are connected to the current limiting circuit 57, and the gate 67 of the second MOSFET 66 is connected to the overheat detection circuit 60. The output voltage of the ECU 505 is input to the gate terminal 76 as the gate voltage of the IGBT 51. This gate voltage is supplied to the current limiting circuit 57 and the overheat detection circuit 60 through the gate wiring 73, and becomes a power supply voltage for driving these circuits 57 and 60.

  The IGBT 51, the first and second MOSFETs 63 and 66, the current limiting circuit 57, the overheat detection circuit 60, the resistor 72, the Zener diode 69, the collector terminal 75, the emitter terminal 77, and the gate terminal 76 are formed on the same semiconductor substrate 81. The chip igniter 501 is configured. The current limiting circuit 57 is composed of an operational amplifier composed of three stages of nMOS. The Zener diode 69 and the resistor 72 are surge protection elements that suppress a surge voltage entering from the gate terminal 76.

  The minimum operating voltage of the conventional one-chip igniter 501 is 3.5V, and the minimum operating voltages of the IGBT 51, the current limiting circuit 57, and the overheat detection circuit 60 that constitute the one-chip igniter 501 are 3.5V or less. . Here, the minimum operating voltage of the IGBT 51 indicates the gate threshold voltage of the IGBT 51. The voltage value of “3.5 V” is the lowest voltage value of the ECU signal that gives an operation command to the one-chip igniter.

  FIG. 10 is an external view of the one-chip igniter 501 shown in FIG. A chip (semiconductor substrate 81) mounted on a die 80 (connected to a collector terminal (C) which is one of the external lead terminals 82) and an external lead terminal 82 (gate terminal (G), emitter terminal ( E)) are connected by bonding wires 83 and packaged by mold resin 84.

Next, the operation of the internal combustion engine ignition device 500 shown in FIG. 8 will be described.
When an output signal from the ECU 505 is input as an input signal (IGBT gate signal) to the gate terminal 76 of the one-chip igniter 501, the input signal is transmitted to the gate wiring 73 and input to the gate of the IGBT 51, and the IGBT 51 Turn on. When the IGBT 51 is turned on, a current flows from the positive electrode of the battery 504 to the emitter terminal 77 at the ground potential via the ignition coil 502 and the IGBT 51.

  On the other hand, when the output signal from EUC 505 stops, IGBT 51 is turned off. At the moment when the IGBT 51 is turned off, the energy stored in the ignition coil 502 is released, a high voltage is generated in the ignition coil 502, and the spark plug 503 is ignited. Thereafter, when the energy stored in the ignition coil 503 disappears, the spark plug 503 extinguishes. By repeating this operation, the internal combustion engine ignition device 500 continues to operate. Next, a description will be given with reference to FIG.

  When an overcurrent flows through the IGBT 51, a voltage is generated in the sense resistor 56 due to a sense current flowing through the sense emitter 55 and the sense resistor 56. The voltage is transmitted to the current limiting circuit 57 and the current limiting circuit 57 operates. A gate signal is supplied from the current limiting circuit 57 to the first MOSFET 63, and the first MOSFET 63 is turned on. When the first MOSFET 63 is turned on, the gate voltage of the IGBT 51 is reduced and lowered. When the gate voltage of the IGBT 51 decreases and becomes equal to or lower than the gate threshold voltage of the IGBT 51, the IGBT 51 is turned off, the overcurrent is cut off, and the IGBT 51 is protected.

  On the other hand, when the IGBT 51 is overheated, the overheat detection circuit 60 operates and the IGBT 51 is turned off in the same manner as in the case of the overcurrent. When the IGBT 51 is turned off, the main current flowing through the IGBT 51 is interrupted and the IGBT 51 is protected. When the IGBT 51 is overheated, the forward voltage drop value of a pn diode (not shown) for temperature detection formed in the IGBT 51 is lowered. The forward voltage drop value (voltage) is input to the overheat detection circuit 60. When the forward voltage drop value (voltage) falls below the limit value, an ON signal is given from the overheat detection circuit 60 to the gate of the second MOSFET 66, and the second MOSFET 66 is turned on. The subsequent operation is the same as that of the current limiting circuit 57. Both the overheat detection circuit 60 and the current limiting circuit 57 function as a control circuit that controls the gate voltage of the IGBT 51.

Since the above-described one-chip igniter 501 is used in the internal combustion engine ignition device 500, the usage environment is extremely severe. More specifically, the IGBT 51 does not break even when a surge voltage of 30 kV is applied between the collector terminal 75 and the emitter terminal 77, and the IGBT 51 operates normally in a temperature range of −55 ° C. to 205 ° C., for example. (This means that the parasitic element does not operate). In order for the one-chip igniter 501 to operate normally even under such severe conditions, the current limiting circuit 57 and the overheat detection circuit 60 are all composed only of nMOS. When pMOS and nMOS are mixed, the process becomes complicated and the cost increases. Further, when a pMOS / nMOS hybrid circuit (complementary circuit or the like) is used, a parasitic element is formed between the two and a parasitic operation (malfunction) is likely to occur.

  In Patent Document 1, a switching element that controls energization / cutoff of a primary current flowing through an ignition coil in response to an ignition control signal output from an electronic control device for an internal combustion engine, and a current limiting circuit that limits a current flowing through the switching element; An ignition device for an internal combustion engine in which the switching element is constituted by an insulated gate bipolar transistor, wherein the current limiting circuit is constituted by a self-separating N-MOS transistor, and the insulated gate bipolar transistor and the self-separating type are provided. A one-chip igniter is disclosed in which an N-MOS transistor is formed on a common semiconductor substrate and formed into one chip. That is, a one-chip igniter is disclosed in which the current limiting circuit is configured by a self-isolating N-MOS transistor (nMOS) and formed on the same semiconductor substrate as the IGBT.

  Further, in Patent Document 2, an internal combustion engine that includes a first IGBT, controls the energization and shut-off of the primary current flowing through the primary coil according to the ignition control signal, and generates a voltage on the secondary side of the primary IGBT. The engine ignition device includes a second IGBT provided in parallel with the first IGBT, and a current detection circuit that detects a current of the second IGBT, and a current value detected by the current detection circuit A current limiting circuit that controls the gate voltage of the first and second IGBTs to limit the primary current to a set value, and a thermal shut-off circuit that forcibly cuts off the current flowing through the primary coil in the event of an abnormality. There is disclosed a one-chip igniter characterized in that these circuits are integrated into one chip.

  Further, in Patent Literature 3, in an ignition device for an internal combustion engine, an IGBT that interrupts a low-voltage current flowing in a primary coil, a constant voltage circuit between an external gate terminal and an external collector terminal, and a protective Zener diode are provided. I have. The constant voltage circuit supplies a constant gate voltage to the IGBT such that the saturation current value of the IGBT becomes a predetermined limit current value. The IGBT has a saturation current value in the range of the limiting current value of the semiconductor device. In the constant voltage circuit, a plurality of depletion type MOSFETs connected in parallel and a Zener diode are connected in series. A selection switch is connected to each depletion type MOSFET, and all the selection switches are connected to a selector circuit. At the time of shipment from the factory, the selector switch is opened and closed by a selector circuit, thereby adjusting the voltage fluctuation caused by the electrical characteristics in manufacturing the semiconductor device. This suppresses the vibration of the current waveform flowing through the IGBT. It is disclosed to reduce the cost by reducing the size of the entire semiconductor device. As the semiconductor device used here, a trench gate type IGBT and a planar gate type IGBT are described.

Japanese Patent No. 3192074 Japanese Patent No. 3216972 JP 2010-45141 A

  The collector terminal 75 of the one-chip igniter 501 is connected to the battery 504 through the internal resistance of the ignition coil 502, and the emitter terminal 77 is connected to a ground potential 78, for example, a chassis in the engine room. Therefore, the potentials of these terminals 75 and 77 are relatively stable.

  On the other hand, the potential of the gate terminal 76 is a low potential determined by the low output voltage (5 V) of the ECU 505 and the small gate capacity of the IGBT 51. In addition, since an ignition pulse (several tens of kV) is generated in the immediate vicinity of the one-chip igniter 501, the one-chip igniter 501 may malfunction due to noise, and the output voltage of the ECU 505 may decrease due to noise. Further, when the IGBT 51 is energized, a voltage is generated by the product of the ground wiring resistance of the harness or the like and the energized current, and the ground potential 78 of the one-chip igniter 501 is raised (GND floating) by the voltage. Specifically, for example, when the rated energization current of the IGBT is 10A and the ground wiring resistance of the harnesses between the IGBT and the ECU ground is about 0.1Ω, the product of this resistance and the energization current is 1V is reached, and this 1V is the ground potential rise (GND floating). When the GND float occurs, the voltage (gate signal voltage) between the gate terminal 76 of the one-chip igniter 501 and the emitter terminal 77 at the ground potential 78 may be 3.5 V or less, and the operation of the one-chip igniter 501 Becomes unstable.

Next, the prior art corresponding to the voltage drop will be described below.
FIG. 11 is a configuration diagram of a main part of a hybrid type igniter 600. The hybrid igniter 600 includes an IGBT 51a and an IGBT drive circuit 90, and the IGBT drive circuit 90 includes a current limiting circuit, an overheat detection circuit, a sense resistor 56a, and the like. Each of these components is fixed to a printed board 91, a ceramic board, or the like.

  There are cases where the output voltage from the ECU 505 decreases to less than 3.5V due to noise or the like, or GND floating occurs and the voltage between the gate and the emitter of the IGBT 51a decreases to less than 3.5V. At this time, it is necessary to compensate for this voltage drop and to keep the voltage between the gate and the emitter of the IGBT 51a at 3.5V or higher at all times. The IGBT drive circuit 90 compensates for a drop noise superimposed on an input voltage (gate voltage) input from the ECU 505 or a GND float and transmits a normal gate voltage to the gate of the IGBT 51a. It has a function.

  In the configuration of the hybrid igniter 600 shown in FIG. 11, it is necessary to mount a large number of individual parts on the printed circuit board 91 and the like, and the number of parts increases. As a result, the outer dimensions increase and the manufacturing cost increases.

  Moreover, in the said patent documents 1-3, the description which suggests about the policy for reducing the operating voltage of the one-chip igniter used for the internal combustion engine ignition device used as the point of this invention is not found.

  SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, and to realize a one-chip igniter capable of realizing a low operating voltage, high noise immunity, high surge immunity, downsizing and cost reduction, and an internal combustion engine having the one-chip igniter It is to provide an ignition device.

  In order to achieve the above object, according to the first aspect of the present invention, a MOS transistor, a gate terminal electrically connected to the gate of the MOS transistor, and a gate voltage of the MOS transistor are provided. In a one-chip igniter arranged on the same semiconductor substrate with a control circuit for limiting the input voltage, an input voltage input to the gate terminal of the one-chip igniter becomes a power supply voltage for the control circuit and a control signal for the MOS transistor, The minimum voltage of the input voltage is less than 3.5V, the minimum operating voltage of the control circuit is 1.5V or less, and the control circuit is composed of two inverter circuits composed of two-stage MOSFETs connected in series. It is good to have a configuration in series.

According to the second aspect of the present invention, the minimum voltage of the input voltage is preferably less than 2.5V in the first aspect of the invention.
According to the invention described in claim 3, it is preferable that the minimum voltage of the input voltage is less than 2.0V in the invention described in claim 1.

According to the invention as set forth in claim 4, the effective gate threshold voltage of the MOS transistor constituting the one-chip igniter according to any one of claims 1 to 3. Is 1 V or more, and the amount of impurities per unit volume of the channel region of the IGBT is preferably 1 × 10 ¹⁷ / cm ³ or less.

  According to the invention described in claim 5, the effective gate threshold voltage of the MOS transistor constituting the one-chip igniter according to any one of claims 1 to 4. Is 1 V or more, and the channel length of the IGBT is preferably 4 μm or less.

According to the invention described in claim 6, the channel length of the MOS transistor constituting the one-chip igniter is set to L in the invention described in any one of claims 1 to 5. (Cm), and the impurity concentration per unit volume of the channel region of the IGBT is N (cm ⁻³ ), L ≦ 4 × 10 ⁻⁴ × (10 ⁻¹⁷ ) ^1/3 × N ^1/3 There should be.

  According to the invention described in claim 7, the effective gate threshold value of the MOS transistor constituting the one-chip igniter in the invention described in any one of claims 1-6. The voltage is preferably 1 V or more, and the thickness of the gate oxide film of the MOS transistor is preferably 5 nm or more and less than 25 nm.

According to the invention as set forth in claim 8, the effective gate threshold value of the MOS transistor constituting the one-chip igniter according to the invention as set forth in any one of claims 1 to 7. When the voltage is 1 V or more and the cells of the MOS transistor are striped, the number of cells per 1 cm (cell density) in the direction perpendicular to the longitudinal direction of the striped cells may be 5 × 10 ² or more. .

  According to the invention described in claim 9, the MOS transistor constituting the one-chip igniter has a planar gate structure or a trench in the invention described in any one of claims 1-8. The structure should be good.

  According to the invention described in claim 10 of the claims, in the invention described in any one of claims 1 to 9, a minimum operating voltage of the overheat detection circuit is 1 V or more, and the overheat is detected. The detection circuit may be composed of a two-stage inverter circuit.

  According to the invention described in claim 11 of the claims, in the invention described in any one of claims 1 to 10, the control circuit includes a current limiting circuit, an overheat detection circuit, a timer circuit, It may be one or more circuits selected from an overvoltage protection circuit and an input hysteresis circuit.

  According to the invention described in claim 12 of the claims, in the invention described in any one of claims 1 to 11, the MOS transistor may be an insulated gate bipolar transistor.

    Further, according to the invention described in claim 13, the internal combustion engine ignition device using the one-chip igniter described in any one of claims 1 to 12 may be used.

  According to the present invention, the gate threshold voltage of the MOS transistor is set to a low voltage (1.5 V or less), and the operating voltage of the current limiting circuit and the overheat detection circuit is set to a low voltage (1 V or more). The operating voltage of the one-chip igniter used in the apparatus can be lowered (1V to less than 3.5V).

Also, noise resistance and surge resistance can be increased by inserting a capacitor between the gate wiring connecting the gate terminal and the gate of the MOS transistor and the ground wiring.
Further, by configuring the current limiting circuit and the overheat detection circuit with two-stage inverter circuits, the operating voltages of these circuits can be lowered.

  Further, as compared with the hybrid igniter, since the voltage conversion circuit is not provided, the package can be downsized and the cost can be reduced.

1 is a configuration diagram of a one-chip igniter 100 used in an internal combustion engine ignition device according to a first embodiment of the present invention, where (a) is an overall circuit configuration diagram, and (b) is an essential part of an IGBT 1 formed on a semiconductor substrate 31. FIG. 1 is a cross-sectional view of a main part of an IGBT 1 formed on a semiconductor substrate 31 for a one-chip igniter 100 used in an internal combustion engine ignition device according to a first embodiment of the present invention. It is a figure which shows the code | symbol attached | subjected to each site | part of the channel region 32 vicinity of IGBT1. FIG. 6 is a diagram showing the relationship between gate threshold voltage Vgth, impurity concentration N of channel region 32, channel resistance R, and channel length L. It is a principal part block diagram of the one-chip igniter 100 used for the internal combustion engine ignition device which concerns on 2nd Example of this invention. The configuration (a) of the conventional example regarding the control circuit and the configuration (b) of the present invention. It is a principal part block diagram of the one-chip igniter 100 used for the internal combustion engine ignition device which concerns on 3rd Example of this invention. It is a principal part block diagram of the internal combustion engine ignition device 500 by which the conventional one-chip igniter 501 is mounted. FIG. 9 is a circuit diagram of a main part of a conventional one-chip igniter 501 mounted on the internal combustion engine ignition device 500 shown in FIG. 8. FIG. 10 is an external view of the one-chip igniter 501 in FIG. 9. 2 is a configuration diagram of a main part of a hybrid igniter 600. FIG.

  The present invention relates to an input voltage (gate voltage: 1 V to less than 3.5 V) lower than an input voltage (gate voltage: 3.5 V to 5 V) input from a conventional gate terminal in a one-chip inductor constituting an internal combustion engine ignition device. ).

The measures are: 1) lowering the gate threshold of the MOS transistor, 2) lowering the operating voltage of the current limiting circuit and the overheat detection circuit, and 3) becoming more susceptible to the decrease in operating voltage. Three items for taking measures against noise are included. In the present invention, the minimum operating voltage of the one-chip igniter is set to 1 V and in the vicinity thereof (1 V to less than 3.5 V). Therefore, it is necessary to set the gate threshold voltage Vgth of the MOS transistor, the minimum operating voltage of the current limiting circuit, and the minimum operating voltage of the heating detection circuit to 1V. That is, the operating voltage of the one-chip igniter of the present invention is set to a voltage range of 1V to 5V. Next, each of the above items will be sequentially described in the following examples.
<Example 1> (IGBT)
FIG. 1 is a block diagram of a one-chip igniter 100 used in an internal combustion engine ignition device according to a first embodiment of the present invention. FIG. 1 (a) is an overall circuit configuration diagram, and FIG. 2 (a) is a semiconductor substrate. 3 is a cross-sectional view of the main part of the IGBT 1 formed in FIG. FIG. 2A shows a cross-sectional view of the main part of one cell. The gate structure of the IGBT 1 is shown here as a planar type, but may be a trench type (not shown). Moreover, although IGBT1 was mentioned as an example in FIG. 1 as a power device, it may be power MOSFET. As the power MOSFET, a power MOSFET in which a sense source corresponding to the sense emitter 4 is formed may be used.

  In this figure, this one-chip igniter 100 includes an IGBT 1 having a sense emitter 5, a sense resistor 6, a current limiting circuit 7, an overheat detection circuit 10, a surge protection Zener diode 19 and a resistor 22, a first MOSFET 13, a second MOSFET 16, and a collector. A terminal 25, a gate terminal 26, and an emitter terminal 27 are included. Although not shown here, the circuit configuration of the overheat detection circuit 10 is the same as that of the conventional overheat detection circuit 60.

  The collector 2 of the IGBT 1 is connected to the collector terminal 25 of the one-chip igniter 100, the gate 3 is connected to the gate terminal 26, and the emitter 4 is connected to the emitter terminal 27. The sense emitter 5 is connected to the sense resistor 6, and the gate 3 of the IGBT 1 and the gate terminal 26 are connected by a gate wiring 23. The gate line 23 is connected to the high potential side 8 of the current limiting circuit 7 and serves as a power source for the current limiting circuit 7. Further, the high potential side 11 of the overheat detection circuit 10 is connected to the gate wiring 23 and serves as a power source for the overheat detection circuit 10. The low potential side 9 of the current limiting circuit 7 and the low potential side 12 of the overheat detection circuit 10 are connected to the ground wiring 24. Further, the drain 15 of the first MOSFET 13 and the drain 18 of the second MOSFET 16 are connected to the gate wiring 23, and the respective sources are connected to the ground wiring 24. Further, the cathode wiring 20 of the surge countermeasure Zener diode 19 is connected to the gate wiring 23, and the anode 21 is connected to the ground wiring 24. Furthermore, a surge countermeasure resistor 22 is connected between the gate wiring 23 and the ground wiring 24. In addition, the ground wiring 24 becomes the ground potential 28 through the emitter terminal 27. The voltage generated at the sense resistor 6 is input to the current limiting circuit 7. The output signal of the current limiting circuit 7 is input to the gate 14 of the first MOSFET 13. Each of the above parts is formed on the same semiconductor substrate 31. A plurality of the Zener diodes 19 may be connected in series.

  In addition to the components described above, the circuit of FIG. 1 has a diode connected for surge protection between the cathode of the Zener diode 19 and the source of the second MOSFET 16, as shown in FIG. A Zener diode is connected between the gates 3 for surge protection. Further, a resistor is inserted in the gate wiring 23 between the resistor 22 and the Zener diode 19 or between the high potential side of the current limiting circuit 17 and the drain of the second MOSFET 16 for surge protection.

  2A shows an example in which a striped channel region 32 (= well region) is disposed on one main surface of the semiconductor substrate 31 and a striped emitter region 33 is disposed on the surface layer of the channel region 32. FIG. 2 (b) and FIG. 2 (c).

A collector region 38 is disposed on the other main surface of the semiconductor substrate 31, and a collector electrode 39 is disposed on the collector region 38.
The gate electrode 35 becomes the gate 3 of the IGBT 1 in FIG. 1 and is connected to the gate terminal 26 through the gate wiring 23. The collector electrode 39 becomes the collector 2 and is connected to the collector terminal 25. The emitter electrode 37 becomes the emitter 4 and is connected to the emitter terminal 27. Further, the sense emitter 5 shown in FIG. 1 is omitted in FIG.

FIG. 3 is a diagram showing the reference numerals assigned to the respective portions near the channel region 32 of the IGBT 1. This figure is the same as FIG.
The thickness of the gate oxide film 34 is denoted by t, the channel length, which is the length of the channel formed in the channel region 32, is denoted by L, the diffusion depth of the channel region 32 is denoted by T, and the cell width is denoted by W. In the figure, the sign of the impurity concentration in the channel region 32 is N, the sign of the gate threshold voltage of the IGBT 1 is Vgth, the sign of the channel resistance is R, and the voltage drop generated in the channel resistance R is shown in parentheses. It was. Here, the gate threshold voltage will be described. As for the gate threshold voltage in the present application, for example, when the gate voltage is increased from 0 V while applying a voltage of several volts to the collector-emitter voltage, the current flowing through the emitter 4 becomes 1/1000 of the rated current. When the gate voltage. In addition, in a known DMOS structure, a gate voltage at which an inversion layer channel of electrons is formed at a position in contact with the MOS gate of the p base layer is also called a gate threshold. This known gate threshold voltage is determined by the concentration of the p base layer and the thickness of the gate oxide film. For the purpose of distinguishing the meaning in this application, this known gate threshold voltage is set to an effective gate threshold. It will be called a value voltage.

  A measure for reducing the threshold voltage Vgth of the IGBT 1 will be described with reference to FIG. As described above, the required minimum operating voltage of the one-chip igniter 100 is 1V. Therefore, the gate threshold voltage Vgth of the IGBT 1 needs to be at most 1V.

According to the simulation, when the thickness t of the gate oxide film is 50 nm, the impurity concentration N of the channel region 32 is set to 1 × 10 ¹⁷ / cm ³ in order to set the gate threshold voltage Vgth of the IGBT 1 to 1V. There is a need to. The thickness t of the gate oxide film 34 is set to a thickness that does not cause dielectric breakdown with respect to the voltage applied to the gate 3 when a surge voltage is applied to the gate terminal 26. Therefore, if the surge voltage applied to the gate terminal 26 can be suppressed by reducing the operating resistance of the surge protection Zener diode 19, the thickness t of the gate oxide film 34 can be reduced and the gate threshold voltage can be reduced. Vgth can be reduced.

  The thickness t of the gate oxide film 34 is preferably in the range of 5 nm to less than 25 nm. If the thickness is less than 5 nm, the rate at which the gate oxide film 34 is destroyed by the surge voltage increases, which is not preferable. The thickness t of the gate oxide film 34 is preferably 10 nm or more since the ratio of the gate oxide film 34 being destroyed by a surge voltage is small. On the other hand, if it exceeds 25 nm, it is difficult to lower the gate threshold Vgth to 1 V even if the impurity concentration N of the channel region 32 is controlled.

  Further, by increasing the junction area of the zener diode 19 for surge protection by, for example, 10% and reducing the operating resistance by 10%, the voltage applied to the gate 3 when the surge voltage is applied to the gate terminal 26 is reduced. It can be reduced by several percent from the conventional level. As a result, the thickness t of the gate oxide film 34 can be reduced by several percent as compared with the prior art. Since the gate threshold voltage Vgth is proportional to the thickness t of the gate oxide film 34, the thickness t of the gate oxide film 34 is reduced by several percent. The gate threshold voltage Vgth can be reduced by several percent. For example, the thickness t of the gate oxide film 34 can be reduced by 5 to 15% as compared with the conventional case, whereby the gate threshold voltage Vgth can be reduced by about 25 to 75%.

Next, the relationship between the channel length L and the impurity concentration of the channel region 32 will be described.
When the impurity concentration N (≦ 10 ¹⁷ cm ⁻³ ) of the channel region 32 is lowered, the channel resistance R increases and the voltage drop E generated at the channel resistance R increases. When this voltage drop E becomes large, there is a problem that the on-voltage of the IGBT increases. This is particularly the case when the IGBT is operated near the gate threshold voltage Vgth. Therefore, it is necessary to prevent the voltage drop E generated by the channel resistance R from changing even if the impurity concentration N of the channel region 32 is decreased.

  When the voltage drop E generated in the channel resistance R is constant (= when the channel resistance R is constant), the impurity concentration N and the channel length L of the channel region 32 for setting the gate threshold voltage Vtgh to 1 V Next, the relationship will be described.

  When the impurity concentration N of the channel region 32 is reduced to reduce the gate threshold voltage Vtgh, the channel resistance R increases as described above. In order to suppress the increase in the channel resistance R, it is necessary to shorten the channel length L. That is, it is necessary to optimize the impurity concentration N and the channel length L of the channel regions that are dependent on each other.

  FIG. 4 is a diagram showing the relationship between the gate threshold voltage Vgth, the impurity concentration N of the channel region 32, the channel resistance R, and the channel length L. In the figure, a, b,... Indicate procedures for optimizing the impurity concentration N and the channel length L of the channel region 32.

  FIG. 4A is a diagram showing the relationship between the gate threshold voltage Vgth and the impurity concentration N of the channel region 32. The decrease in the gate threshold voltage Vgth (procedure A) decreases in proportion to the square root of the impurity concentration N of the channel region 32 (procedure B). FIG. 4B is a diagram showing the relationship between the impurity concentration N of the channel region 32 and the channel resistance R. When the channel resistance R decreases the impurity concentration of the channel region 32 (procedure B), the electron concentration in the channel decreases. However, the mobility increases. These are intertwined. The channel resistance increases in inverse proportion to the third root of the impurity concentration (procedure c). This is a case where the IGBT is operated in the vicinity of the gate threshold voltage Vgth which is the lowest operating voltage. FIG. 3C shows the relationship between the channel length L and the channel resistance R, and the channel length L increases in proportion to the decrease in the channel resistance R. In order to reduce the channel resistance R to the original value (procedure d), it is necessary to shorten the channel length L (procedure e). FIG. 4D shows the relationship between the impurity concentration N of the channel region 32 and the gate length L when the voltage drop E generated by the channel resistance R is constant. The channel length L decreases in proportion to the third root of the impurity concentration N of the channel region 32. By reducing the impurity concentration N of the channel region 32, the channel length L is reduced. By reducing the channel length L, the increased channel resistance R (step C) can be returned to the original value (step F). That is, by reducing the impurity concentration N of the channel region 34 and the channel length L, the gate threshold voltage Vgth can be reduced to 1 V and the channel resistance R can be made constant.

  However, since the channel length L depends on the fine processing accuracy, it is difficult in the process to make it extremely short. Further, when the impurity concentration N of the channel region 32 is lowered, the depletion layer extending in the channel region 32 is elongated, and when the channel length L is too short, it is difficult to ensure the breakdown voltage of the IGBT 1. For this reason, the channel length L cannot be extremely shortened by extremely reducing the impurity concentration N of the channel region 32.

In addition, the mutual relationship of each specification shown in FIG. 4 is estimated based on the knowledge acquired from literature and experiment.
Next, the above content is expressed as follows.
Vtgh∝√N × t
R∝1 / N ^1/3 (N ≦ 10 ¹⁷ cm ⁻³ ), E∝R, R∝L (N ≦ 10 ¹⁷ cm ⁻³ )
L / N ^1/3 ∝L ・ R∝R ² ∝E ²
That is, L / N ^1/3 is constant. Therefore, the relational expression of L = G × N ^1/3 is established. However, G is a proportionality constant and is in the range of N ≦ 10 ¹⁷ cm ⁻³ .

When the channel length L and the impurity concentration N of the channel region 32 with the same channel resistance R as the conventional element and the gate threshold voltage Vgth of 1 V are obtained by simulation, the channel length L is 4 μm and the impurity concentration N of the channel region 32 is 1. × 10 ¹⁷ cm ^-3

Using this numerical value, in order to set the gate threshold voltage Vgth to 1 V or less and the voltage drop E generated in the channel resistance R to be less than the conventional voltage drop, the impurity concentration N ≦ 10 ^{17 in the} channel region 32. Under the conditions of cm ⁻³ and channel length L ≦ 4 × 10 ⁻⁴ cm (= 4 μm), the impurity concentration N of the channel region 32 is decreased, and the channel length L (cm) ≦ 4 × 10 ⁻⁴ × (10 ⁻¹⁷ ) ^1/3 × (impurity concentration N (cm ⁻³ ) of channel region 32) The channel length L may be determined so as to fall within the range of ^1/3 .

  Actually, when manufacturing a one-chip igniter, the channel length L and the impurity concentration N of the channel region 32 are optimized while satisfying the above equation. However, since the channel length L requires fine processing with high accuracy, the channel length L may be fixed to a predetermined length within the above conditions to reduce the impurity concentration N of the channel region 32. Absent.

  However, in this case, the voltage drop E generated at the channel resistance R increases as the impurity concentration N of the channel region 32 is lowered. However, since the ratio of the voltage drop E generated by the channel resistance R in the on-voltage of the IGBT is small, the rise of the on-voltage is small.

  The impurity concentration N of the channel region 32 shown here is an average impurity concentration with respect to the diffusion depth of the channel region 32. This is a value obtained by dividing the impurity dose of the channel region 32 by the diffusion depth T.

  If the impurity concentration N of the channel region 32 is decreased to reduce the gate threshold voltage Vtgh and the channel length L is shortened, the cell size can be reduced (the cell width W can be reduced). As a result, the cell density is increased and the current carrying capacity of the IGBT 1 can be increased.

  The cell density is the number of stripe-shaped channel regions 32 (well regions) having a length of 1 cm perpendicular to the longitudinal direction of the cells when the cells are stripe-shaped cells.

Further, when the cell density increases, the operating resistance decreases due to the IV characteristics of the IGBT. For this reason, the on-voltage at a predetermined current is lowered, and apparently the operation is the same as when the gate threshold voltage Vgth is lowered. In other words, the gate threshold voltage Vgth can be apparently decreased by increasing the cell density. For this reason, the cell density is increased as compared with the prior art. Specifically, in the case of a striped cell, the effect is obtained when the cell density is 1 × 10 ³ cells / cm or more.

Further, by using a material having a dielectric constant higher than that of the oxide film as the material of the gate insulating film, the gate capacitance can be increased and the gate threshold voltage Vtgh can be lowered.
<Example 2> (Circuit)
FIG. 5 is a block diagram of a main part of a one-chip igniter 100 used in the internal combustion engine ignition device according to the second embodiment of the present invention. This figure is a principal circuit diagram of the current limiting circuit 7 constituting the one-chip igniter 100.

  In order to reduce the operating voltage of the current limiting circuit 7 and the overheat detection circuit 10 (not shown), it is necessary to reduce the gate threshold value of the MOSFET (nMOS) constituting these circuits 7 and 10. The policy is the same as the policy adopted in the IGBT 1 described above.

Further, the operating voltage can be reduced by devising the circuit configuration. An example of this will be described using the current limiting circuit 7.
The conventional current limiting circuit 57 shown in FIG. 9 is formed by using an operational amplifier constituted by an nMOS circuit having a three-stage configuration in series as shown in FIG. More specifically, the voltage amplification stage 600 is a circuit composed of the three-stage nMOS circuit. Here, VH indicates the high voltage side of the power supply, and VL indicates the low voltage side of the power supply. Vin is an input voltage terminal, and Vref is a reference voltage input terminal. A device described with “MD” and a number is a depletion type MOSFET, and a device described with only “M” and a number is an enhancement type MOSFET. By changing this to an inverter circuit 41 having a two-stage configuration like a current limiting circuit 7 shown in FIG. 5, the minimum operating voltage of the current limiting circuit 7 can be reduced to 1 V or less. This is because each inverter in the inverter circuit 41 is configured by an nMOS having a two-stage configuration in series (the upper nMOS is used as a resistor by short-circuiting the gate and the source). A specific circuit in which this nMOS has a two-stage configuration is shown in FIG. The inverter circuit can also be formed by connecting a resistor and an nMOS in series. Here, nMOS is an n-channel MOSFET, and the operating voltage of nMOS can be reduced to about 0.7 V or less per element by lowering the gate threshold voltage. When the power supply voltage is 2V, the threshold value of the MOSFET is preferably as close to 0.7V as possible between 2V and 0.7V.

In the case of the overheat detection circuit 10 as well, the lowest operating voltage can be reduced to 1 V or less as in the current limiting circuit 7 by applying the two-stage inverter circuit 41 as shown in FIG.
An example of a method for manufacturing the one-chip igniter 100 in FIG. 5 will be described.

  First, a plurality of sets of two-stage inverter circuits 41 constituting the current limiting circuit 7 and the overheat detection circuit 10 are formed in the respective circuits 7 and 10 on the semiconductor substrate 31 that forms the IGBT 1 and the like.

  Next, in the wafer tester, a voltage (sense signal) generated at the sense resistor 5 or a detection voltage (diode forward voltage drop) generated by detecting overheating, a plurality of sets in the current limit circuit 7 and the overheat detection circuit 10 The characteristics of the formed two-stage inverter circuits 41 are compared, and the two-stage inverter circuits 41 are selected in an optimum combination. For this selection method, a two-stage inverter circuit 41, more specifically, a circuit as shown in FIG. 6B constituting this inverter circuit is formed in parallel, for example, without connecting the ground side wiring. In addition, this can be achieved by selecting one having a suitable characteristic from the large number and performing ground wiring for the selected circuit. A large number of circuits formed in a state where the ground side wiring is not connected may be configured such that the ground side is wired in advance and the power source side is not connected.

As a result, the current limiting circuit 7 and the overheat detection circuit 10 having a minimum operating voltage of 1 V or less can be formed with high accuracy.
<Example 3> (Measures against noise and surge protection)
FIG. 7 is a block diagram showing a main part of a one-chip igniter 100 used in the internal combustion engine ignition apparatus according to the third embodiment of the present invention.

  In FIG. 7, a capacitor 42 is connected between the gate wiring 23 and the ground wiring 24. By installing this capacitor 42, even if a negative polarity noise is superimposed in a state where the gate voltage input to the gate terminal 26 is lowered to the minimum operating voltage of 1.5V, the gate voltage is reduced by the capacitor voltage. Depression is prevented. As a result, the current limiting circuit 7, the overheat detection circuit 10, and the IGBT 1 can be stably operated. That is, the noise immunity of the one-chip igniter 100 can be increased by installing the capacitor 42.

  The same effect can be obtained by providing capacitors 43 and 44 in the current limiting circuit 7 and the overheat detection circuit 10, respectively. These capacitors are provided in the immediate vicinity of the nMOS circuit so as to improve noise immunity of, for example, a two-stage MOSFET circuit that detects current and heat in the current limiting circuit 7 and the overheat detection circuit 10. Specifically, for example, in FIG. 6B, a capacitor is installed between the power source and ground, between Vin and ground, and between the gate and ground of M11. By installing the capacitor in this way, there is an effect of increasing the junction capacitance of the MOSFET, and the noise tolerance can be improved.

  When a surge voltage is applied to the gate terminal 26, a resistor 29 is inserted in the A portion in order to suppress this surge voltage. The surge voltage is divided by the inserted resistor 29 and the Zener diode 19, and the divided voltage is applied to the gate of the IGBT 1. Therefore, the surge voltage can be suppressed by installing the resistor 29. However, since the resistor 29 is inserted in series with the gate wiring 23, the gate voltage input to the gate terminal 26 becomes a low voltage when it reaches the gate of the IGBT 1. Therefore, it is necessary to reduce the resistance 29 as much as possible to suppress the attenuation of the gate voltage input to the gate terminal 26.

  The capacitor 42 functions in the same manner as a snubber capacitor and has an effect of suppressing a surge voltage. Therefore, by installing the capacitor 42, it is possible to reduce the resistance 29 installed in the portion A. In FIG. 7, the bidirectional diode inserted between the IGBT collector 2 and the gate wiring 23 is not shown even if a plurality of diodes are connected in series.

  By combining the first to third embodiments, the one-chip igniter 100 can operate stably even when the gate voltage input to the gate terminal 26 is lowered, and the noise tolerance can be improved. Even in the operation with the gate voltage, the current-carrying capacity of the IGBT 1 is sufficiently secured.

  Furthermore, the package can be reduced in size and cost as compared with the hybrid igniter.

1 IGBT
2 collector 3 gate 4 emitter 5 sense emitter 6 sense resistor 7 current limiting circuit 8, 11 high potential side 9, 12 low potential side 10 overheat detection circuit 13 first MOSFET
14, 17 Gate 15, 18 Drain 16 Second MOSFET
19 Zener diode 20 Cathode 21 Anode 22, 29 Resistance 23 Gate wiring 24 Ground wiring 25 Collector terminal 26 Gate terminal 27 Emitter terminal 28 Ground potential 31 Semiconductor substrate 32 Channel region (well region)
33 Emitter region 34 Gate oxide film 35 Gate electrode 36 Interlayer insulating film 37 Emitter electrode 38 Collector region 39 Collector electrode 42, 43, 44 Capacitor 100 One-chip igniter

Claims (13)

In a one-chip igniter in which a MOS transistor, a gate terminal electrically connected to the gate of the MOS transistor, and a control circuit for limiting the gate voltage of the MOS transistor are arranged on the same semiconductor substrate,
The input voltage input to the gate terminal of the one-chip igniter becomes the power supply voltage of the control circuit and the control signal of the MOS transistor, and the minimum voltage of the input voltage is less than 3.5V,
The minimum operating voltage of the control circuit is 1.5 V or less, and the control circuit is configured by connecting two inverter circuits including two-stage MOSFETs connected in series. Chip igniter.   The one-chip igniter according to claim 1, wherein a minimum voltage of the input voltage is less than 2.5V.   The one-chip igniter according to claim 1, wherein the minimum voltage of the input voltage is less than 2.0V. The gate threshold voltage of the MOS transistor constituting the one-chip igniter is 1 V or more, and the impurity amount per unit volume of the channel region of the MOS transistor is 1 × 10 ¹⁷ / cm ³ or less. The one-chip igniter according to any one of claims 1 to 3.   The gate threshold voltage of the MOS transistor constituting the one-chip igniter is 1 V or more, and the channel length of the MOS transistor is 4 μm or less. One-chip igniter described. When the channel length of the MOS transistor constituting the one-chip igniter is L (cm) and the impurity concentration per unit volume of the channel region of the MOS transistor is N (cm ⁻³ ), L ≦ 4 × 10 The one-chip igniter according to claim 1, wherein the one-chip igniter is ⁻⁴ × (10 ⁻¹⁷ ) ^1/3 × N ^1/3 .   The gate threshold voltage of the MOS transistor constituting the one-chip igniter is 1.5 V or less, and the thickness of the gate oxide film of the MOS transistor is 5 nm or more and less than 25 nm. Item 7. A one-chip igniter according to items 1 to 6. When the gate threshold voltage of the MOS transistor constituting the one-chip igniter is 1 V or more and the cells of the MOS transistor are striped, the number of cells per 1 cm perpendicular to the longitudinal direction of the striped cells is The one-chip igniter according to claim 1, wherein the number is 5 × 10 ² or more.   9. The one-chip igniter according to claim 1, wherein the MOS transistor constituting the one-chip igniter has a planar gate structure or a trench structure.   The one-chip igniter according to any one of claims 1 to 9, wherein a minimum operating voltage of the overheat detection circuit is 1 V or more, and the overheat detection circuit is configured by a two-stage inverter circuit.   11. The control circuit according to claim 1, wherein the control circuit is one or more circuits selected from a current limiting circuit, an overheat detection circuit, a timer circuit, an overvoltage protection circuit, and an input hysteresis circuit. One-chip igniter as described in 1.   The one-chip igniter according to claim 1, wherein the MOS transistor is an insulated gate bipolar transistor.   An internal combustion engine ignition device using the one-chip igniter according to claim 1.

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