JP2014003562A - Switch circuit and power transmission device having switch circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switch circuit using a semiconductor, having high resistance to voltage in a simple configuration, and a power transmission device having the switch circuit.SOLUTION: The switch circuit has a pair of transistors, both emitters or collectors of which are interconnected, connected between a first input/output terminal and a second input/output terminal. If both emitters are connected, first diodes and second, reversed polarity diodes are connected between the collectors and the first input/output terminal and second input/output terminal and between the emitters and the first input/output terminal and second input/output terminal, respectively. If both collectors are connected, third diodes and fourth, reversed polarity diodes are connected between the emitters and the first input/output terminal and second input/output terminal and between the collectors and the first input/output terminal and second input/output terminal, respectively.

Description

  The present invention relates to a switch circuit and a power transmission device of an electric field coupling type power transmission system including the switch circuit.

  In recent years, many electronic devices that transmit power without contact have been developed. As a system for transmitting power in a non-contact manner, there is an increased opportunity for adopting a capacitively coupled power transmission system from the viewpoint of miniaturization of a power transmission unit and a power reception unit.

  For example, in Patent Document 1, power transmission electrodes are arranged in a grid pattern on the power transmission unit side, and switching is performed using a switch circuit so as to supply power to the power transmission electrode at a position facing the power reception electrode provided in the power reception unit. An electric power transmission system (capacitively coupled charger) that can be used is disclosed. FIG. 16 is a schematic diagram showing a configuration of a conventional capacitively coupled charger.

  In FIG. 16, of the rectangular coupling electrodes 4 arranged in a grid pattern on the surface on which the portable terminal (power receiving device) 2 of the power transmission stand (power transmitting device) 1 is placed, the region where the power receiving device 2 is placed is shown. The connection state with the power supply circuit 100 is switched by the switch circuit 104 so that the coupling electrode 4 is energized. Thereby, the energized coupling electrode 4 functions as a power transmission electrode. Patent Document 2 discloses an AC switch circuit using a semiconductor element. FIG. 17 is an exemplary diagram showing a configuration of a conventional AC switch circuit.

  FIG. 17A is an exemplary diagram of a conventional AC switch circuit using an antiparallel thyristor. The phase of the alternating current applied between the terminal U and the terminal X is controlled by a gate signal applied to the thyristors SCR1 and SCR2. However, the response of the AC switch circuit shown in FIG. FIG. 17B is an exemplary diagram of a conventional AC switch circuit using a transistor and a diode.

  In the switch circuits SW1 and SW2 shown in FIG. 17B, the transistor Tr1 and the diode D11 are connected in series, and the transistor Tr1 and the diode D12 are connected in antiparallel. Similarly, the transistor Tr2 and the diode D21 are connected in series, and the transistor Tr2 and the diode D22 are connected in antiparallel. The current flowing from the terminal U to the terminal X controls on / off of the transistor Tr1, and the current flowing from the terminal X to the terminal U controls on / off of the transistor Tr2, thereby controlling conduction.

European Patent Application No. 1689062 JP 61-234620 A

  However, in the capacitively coupled power transmission system, the switch circuit 104 that switches the connection state with the power supply circuit 100 is required to have resistance to a high voltage of about several hundred volts to several kV. When dealing with a semiconductor switch, there are problems that a special process is required, the size is increased, and it is difficult to construct an inexpensive and downsized switch circuit.

  Further, when the AC switch circuits SW1 and SW2 are configured using semiconductor elements, for example, the stray capacitance between the terminals of the transistors Tr1 and Tr2 constituting the AC switch circuits SW1 and SW2 increases, and the terminal U and the terminal X are connected. There was a risk of short-circuiting the capacitor. For this reason, when a high voltage is supplied to the power transmission electrode, there is a problem that the power transmission electrode may not be switched to an off state.

  In order to ensure the resistance to a high voltage without fail, for example, a reed switch, a relay or the like must be adopted, and there is a problem that it is difficult to reduce the size and cost of the entire apparatus.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a switch circuit using a semiconductor having a simple configuration and high resistance to a voltage, and a power transmission device including the switch circuit.

  In order to achieve the above object, a switch circuit according to the present invention includes a pair of transistors in which emitters or collectors are connected to each other between a first input / output terminal and a second input / output terminal. When the emitters of the pair of transistors are connected to each other, the polarities are in the direction of current flow between the collector and the first input / output terminal and between the collector and the second input / output terminal, respectively. A first diode having a polarity opposite to that of the first diode between the emitter and the first input / output terminal and between the emitter and the second input / output terminal. Are connected, and the collectors of the pair of transistors are connected to each other, between the emitter and the first input / output terminal and between the emitter and the second input / output terminal. A third diode having a polarity in the direction in which each current flows is between the collector and the first input / output terminal and between the collector and the second input / output terminal. The fourth diodes having opposite polarities are connected to each other, and the on / off switching of the pair of transistors is controlled by controlling the current supplied to the bases of the pair of transistors by a control circuit.

  In the above configuration, the current supplied to the bases of the pair of transistors is controlled by the control circuit, so that the pair of transistors can be turned on and off. Therefore, the on / off of the alternating current is controlled according to the current control by the control circuit. It becomes possible. In addition, since the stray capacitance can be suppressed by connecting the transistor and the diode in series, even when a high-voltage / high-frequency signal is input, the transistor can operate correctly.

  In the switch circuit according to the present invention, an on / off switch for switching on and off of the pair of transistors is connected between a base and an emitter of the pair of transistors instead of the control circuit, and the bases of the pair of transistors are connected. It is preferable that a resistance element is connected between each of the transistors and the collector.

  In the above configuration, the on / off of the alternating current can be controlled by operating the on / off switch. In addition, since the stray capacitance can be suppressed by connecting the transistor and the diode in series, even when a high-voltage / high-frequency signal is input, the transistor can operate correctly.

  Further, in the switch circuit according to the present invention, the pair of transistors are two transistor arrays each composed of a plurality of transistors connected in series with the same polarity, and when the on / off switch is connected, the transistors It is preferable that bases of adjacent transistors in the column are connected to each other via a resistance element.

  With the above configuration, stray capacitance can be greatly suppressed because a plurality of transistors are connected in series, and even when a high-voltage / high-frequency signal is input, it can operate correctly as a switch circuit. It becomes.

  Next, in order to achieve the above object, a power transmission device according to the present invention includes at least a passive voltage, a power supply circuit that generates an active voltage higher than the passive voltage, a plurality of power transmission electrodes, and a passive voltage or A switch circuit according to any one of claims 1 to 3, which switches a connection state with the power supply circuit so as to supply any one of active voltages, and a control circuit that controls switching of the switch circuit, A second input / output terminal of at least two of the switch circuits is connected to the power transmission electrode, an active voltage is supplied to a first input / output terminal of one of the switch circuits, and a first of the other switch circuit A passive voltage is supplied to the input / output terminals.

  In the above configuration, since the switch circuit that can suppress the stray capacitance by connecting the transistor and the diode in series is provided, it is not necessary to employ a reed switch, a relay, or the like, and the power transmission device is downsized as a whole. be able to.

  In the switch circuit according to the present invention, the current supplied to the bases of the pair of transistors is controlled by the control circuit, so that the pair of transistors can be turned on and off. It is possible to control on / off. In addition, since the stray capacitance can be suppressed by connecting the transistor and the diode in series, even when a high-voltage / high-frequency signal is input, the transistor can operate correctly. In addition, by providing the switch circuit according to the present invention in a power transmission device of a non-contact power transmission system, it is not necessary to employ a reed switch, a relay or the like, and the power transmission device as a whole can be downsized.

1 is a schematic circuit diagram illustrating a schematic configuration of a switch circuit according to a first embodiment of the present invention. It is a schematic circuit diagram which shows schematic structure at the time of connecting the on-off switch of the switch circuit which concerns on Embodiment 1 of this invention. It is a schematic circuit diagram which shows the other structure of the switch circuit which concerns on Embodiment 1 of this invention. It is a schematic circuit diagram which shows the other structure at the time of connecting the on-off switch of the switch circuit which concerns on Embodiment 1 of this invention. It is a schematic circuit diagram which shows schematic structure at the time of connecting two transistor rows and an on-off switch of the switch circuit which concerns on Embodiment 1 of this invention. It is a schematic circuit diagram which shows schematic structure of the switch circuit which concerns on Embodiment 2 of this invention. It is a schematic circuit diagram which shows schematic structure at the time of connecting the on-off switch of the switch circuit which concerns on Embodiment 2 of this invention. It is a schematic circuit diagram which shows the other structure at the time of connecting the on-off switch of the switch circuit which concerns on Embodiment 2 of this invention. It is a schematic circuit diagram which shows the other structure of the switch circuit which concerns on Embodiment 2 of this invention. It is a schematic circuit diagram which shows the other structure at the time of connecting the on-off switch of the switch circuit which concerns on Embodiment 2 of this invention. It is a schematic circuit diagram which shows the other structure at the time of connecting the on-off switch of the switch circuit which concerns on Embodiment 2 of this invention. It is a schematic circuit diagram which shows schematic structure at the time of connecting the power supply of the switch circuit which concerns on Embodiment 1 of this invention. It is a block diagram which shows typically the structure of the electric power transmission system using the power transmission apparatus provided with the switch circuit which concerns on Embodiment 3 of this invention. It is an equivalent circuit schematic of the electric power transmission system using the power transmission apparatus which concerns on Embodiment 3 of this invention. It is an illustration figure of the connection state of the switch circuit of the power transmission apparatus which concerns on Embodiment 3 of this invention. It is a schematic diagram which shows the structure of the conventional capacitive coupling type charger. It is an illustration figure which shows the structure of the conventional alternating current switch circuit.

  Hereinafter, a power transmission system using a switch circuit according to an embodiment of the present invention and a power transmission device including the switch circuit will be specifically described with reference to the drawings. The following embodiments do not limit the invention described in the claims, and all combinations of characteristic items described in the embodiments are essential to the solution. It goes without saying that it is not limited.

(Embodiment 1)
FIG. 1 is a schematic circuit diagram showing a schematic configuration of a switch circuit according to Embodiment 1 of the present invention. In the switch circuit according to the first embodiment, a pair of NPN transistors Tr1 and Tr2 are connected between a first input / output terminal P1 and a second input / output terminal P2.

  In the example of FIG. 1, the emitters of a pair of NPN transistors Tr1 and Tr2 are connected to each other, and the collectors are connected to a first input / output terminal P1 and a second input / output terminal P2, respectively. Connected between the collectors of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2 are first diodes D1 and D2 each having polarity in the direction of current flow. Further, between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, there are second diodes D3 and D4 having a polarity opposite to that of the first diodes D1 and D2. It is connected.

  A control circuit 102 is connected to the base terminals P3 and P4 of the transistors Tr1 and Tr2. By controlling the current supplied to the bases of the transistors Tr1 and Tr2 by the control circuit 102, the transistors Tr1 and Tr2 are turned on / off. Switch. That is, the alternating current is interrupted when the control circuit 102 supplies an off signal to the base terminals P3 and P4, and the alternating current flows when an on signal is supplied.

  Of course, an on / off switch may be connected instead of the control circuit 102. FIG. 2 is a schematic circuit diagram showing a schematic configuration of the switch circuit according to Embodiment 1 of the present invention when an on / off switch is connected.

  In the example of FIG. 2, as in FIG. 1, the emitters of a pair of NPN transistors Tr1 and Tr2 are connected to each other, and the collectors are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively. Has been. Connected between the collectors of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2 are first diodes D1 and D2 each having polarity in the direction of current flow. Further, between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, there are second diodes D3 and D4 having a polarity opposite to that of the first diodes D1 and D2. It is connected.

  The bases of the transistors Tr1 and Tr2 are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively, and to each other. Resistive elements R1 and R2 are connected between the bases and collectors of the transistors Tr1 and Tr2, respectively.

  The on / off switch S1 is connected between the bases and emitters of the transistors Tr1 and Tr2, and controls the current supplied to the bases of the transistors Tr1 and Tr2. That is, the alternating current is interrupted when the on / off switch S1 is turned on, and the alternating current flows when the on / off switch S1 is turned off.

  The transistors Tr1 and Tr2 are not limited to NPN type transistors, but may be PNP type transistors. FIG. 3 is a schematic circuit diagram showing another configuration of the switch circuit according to Embodiment 1 of the present invention. In the switch circuit shown in FIG. 3, a pair of PNP transistors Tr1 and Tr2 are connected between a first input / output terminal P1 and a second input / output terminal P2.

  In the example of FIG. 3, the emitters of a pair of PNP transistors Tr1 and Tr2 are connected to each other, and the collectors are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively. Connected between the collectors of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2 are first diodes D1 and D2 each having polarity in the direction of current flow. Further, between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, there are second diodes D3 and D4 having a polarity opposite to that of the first diodes D1 and D2. It is connected.

  A control circuit 102 is connected to the base terminals P3 and P4 of the transistors Tr1 and Tr2. By controlling the current supplied to the bases of the transistors Tr1 and Tr2 by the control circuit 102, the transistors Tr1 and Tr2 are turned on / off. Switch. That is, the alternating current is interrupted when the control circuit 102 supplies an off signal to the base terminals P3 and P4, and the alternating current flows when an on signal is supplied.

  Of course, an on / off switch may be connected instead of the control circuit 102. FIG. 4 is a schematic circuit diagram showing another configuration of the switch circuit according to Embodiment 1 of the present invention when the on / off switch is connected.

  In the example of FIG. 4, as in FIG. 3, the emitters of a pair of PNP transistors Tr1 and Tr2 are connected to each other, and the collectors are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively. Has been. Connected between the collectors of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2 are first diodes D1 and D2 each having polarity in the direction of current flow. Further, between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, there are second diodes D3 and D4 having a polarity opposite to that of the first diodes D1 and D2. It is connected.

  The bases of the transistors Tr1 and Tr2 are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively, and to each other. Resistive elements R1 and R2 are connected between the bases and collectors of the transistors Tr1 and Tr2, respectively.

  The on / off switch S1 is connected between the bases and emitters of the transistors Tr1 and Tr2, and controls the current supplied to the bases of the transistors Tr1 and Tr2. That is, the alternating current is interrupted when the on / off switch S1 is turned on, and the alternating current flows when the on / off switch S1 is turned off.

  As described above, according to the first embodiment, it is possible to switch the pair of transistors on and off by controlling the current supplied to the bases of the pair of transistors with the control circuit. In addition, since the stray capacitance can be suppressed by connecting the transistor and the diode in series, even when a high-voltage / high-frequency signal is input, the transistor can operate correctly.

  In the first embodiment, the case where a pair of transistors Tr1 and Tr2 are connected is described as an example. However, a transistor row in which a plurality of transistors are connected in series with the same polarity is used as a pair of transistors. You may connect. As shown in FIG. 1, when the control circuit 102 is connected, the bases of a plurality of transistors in each transistor row are connected to base terminals P3 and P4, respectively.

  When an on / off switch is connected instead of the control circuit 102, the bases of adjacent transistors in the transistor array are connected to each other via a resistance element. FIG. 5 is a schematic circuit diagram showing a schematic configuration when two transistor arrays and an on / off switch are connected in the switch circuit according to the first embodiment of the present invention.

  As shown in FIG. 5, as a pair of transistors, a plurality of transistors Tr3, Tr4,..., Tr1 are connected in series with the same polarity, and a plurality of transistors Tr6, Tr5,. Tr2 is connected between the first input / output terminal P1 and the second input / output terminal P2 with the transistor string connected in series with the opposite polarity to the transistor string. Note that the bases of adjacent transistors in each transistor row are connected via resistance elements R1,..., R4.

  By connecting the plurality of transistors Tr1 to Tr6 in series as described above, the internal capacitance can be greatly reduced, and the alternating current can be reliably interrupted when the on / off switch S1 is turned on.

(Embodiment 2)
FIG. 6 is a schematic circuit diagram showing a schematic configuration of the switch circuit according to Embodiment 2 of the present invention. In the switch circuit according to the second embodiment, a pair of NPN transistors Tr1 and Tr2 are connected between a first input / output terminal P1 and a second input / output terminal P2.

  In the example of FIG. 6, unlike the first embodiment, the collectors of a pair of NPN transistors Tr1 and Tr2 are connected to each other, and the emitters are the first input / output terminal P1 and the second input / output terminal P2, respectively. Connected to. Between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, third diodes D5 and D6 each having polarity in the direction of current flow are connected. Also, fourth diodes D7, D8 having a polarity opposite to that of the third diodes D5, D6 are provided between the collectors of the transistors Tr1, Tr2 and the first input / output terminal P1, the second input / output terminal P2. Is connected.

  A control circuit 102 is connected to the base terminals P3 and P4 of the transistors Tr1 and Tr2. By controlling the current supplied to the bases of the transistors Tr1 and Tr2 by the control circuit 102, the transistors Tr1 and Tr2 are turned on / off. Switch. That is, the alternating current is cut off when the control circuit 102 supplies an off signal to the base terminals P3 and P4, and the alternating current flows when an on signal is supplied.

  Of course, an on / off switch may be connected instead of the control circuit 102. FIG. 7 is a schematic circuit diagram showing a schematic configuration when an on / off switch is connected in the switch circuit according to Embodiment 2 of the present invention.

  In the example of FIG. 7, as in FIG. 6, the collectors of a pair of NPN transistors Tr1 and Tr2 are connected to each other, and the emitters are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively. Has been. Between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, third diodes D5 and D6 each having polarity in the direction of current flow are connected. Further, between the collectors of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, there are fourth diodes D7 and D8 having a polarity opposite to that of the third diodes D5 and D6. It is connected.

  The bases of the transistors Tr1 and Tr2 are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively, and to each other. Resistive elements R1 and R2 are connected between the bases and collectors of the transistors Tr1 and Tr2, respectively.

  The on / off switches S2 and S3 are connected between the bases and emitters of the transistors Tr1 and Tr2, respectively, and control the current supplied to the bases of the transistors Tr1 and Tr2. That is, the alternating current is interrupted when both of the on / off switches S2 and S3 are turned on, and the alternating current flows when both are turned off.

  Note that the on / off switches S2 and S3 and the third diodes D5 and D6 may be connected in parallel as shown in FIG. 7, or may be connected in series. FIG. 8 is a schematic circuit diagram showing another configuration of the switch circuit according to Embodiment 2 of the present invention when an on / off switch is connected.

  In the example of FIG. 8, as in FIG. 6, the collectors of a pair of NPN transistors Tr1 and Tr2 are connected to each other, and the emitters are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively. Has been. Between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, third diodes D5 and D6 each having polarity in the direction of current flow are connected. Further, between the collectors of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, there are fourth diodes D7 and D8 having a polarity opposite to that of the third diodes D5 and D6. It is connected.

  The bases of the transistors Tr1 and Tr2 are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively, and to each other. Resistive elements R1 and R2 are connected between the bases and collectors of the transistors Tr1 and Tr2, respectively.

  The on / off switches S2 and S3 are connected between the bases and emitters of the transistors Tr1 and Tr2, respectively, and control the current supplied to the bases of the transistors Tr1 and Tr2. That is, the alternating current is interrupted when both of the on / off switches S2 and S3 are turned on, and the alternating current flows when both are turned off.

  The transistors Tr1 and Tr2 are not limited to NPN transistors, and may be PNP transistors. FIG. 9 is a schematic circuit diagram showing another configuration of the switch circuit according to Embodiment 2 of the present invention. In the switch circuit shown in FIG. 9, a pair of PNP transistors Tr1 and Tr2 are connected between a first input / output terminal P1 and a second input / output terminal P2.

  In the example of FIG. 9, the collectors of a pair of PNP transistors Tr1 and Tr2 are connected to each other, and the emitters are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively. Between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, third diodes D5 and D6 each having polarity in the direction of current flow are connected. Further, between the collectors of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, there are fourth diodes D7 and D8 having a polarity opposite to that of the third diodes D5 and D6. It is connected.

  A control circuit 102 is connected to the base terminals P3 and P4 of the transistors Tr1 and Tr2. By controlling the current supplied to the bases of the transistors Tr1 and Tr2 by the control circuit 102, the transistors Tr1 and Tr2 are turned on / off. Switch. That is, the alternating current is interrupted when the control circuit 102 supplies an off signal to the base terminals P3 and P4, and the alternating current flows when an on signal is supplied.

  Of course, an on / off switch may be connected instead of the control circuit 102. FIG. 10 is a schematic circuit diagram showing another configuration of the switch circuit according to Embodiment 2 of the present invention when an on / off switch is connected.

  In the example of FIG. 10, as in FIG. 9, the collectors of a pair of PNP transistors Tr1 and Tr2 are connected to each other, and the emitters are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively. Has been. Between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, third diodes D5 and D6 each having polarity in the direction of current flow are connected. Further, between the collectors of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, there are fourth diodes D7 and D8 having a polarity opposite to that of the third diodes D5 and D6. It is connected.

  The bases of the transistors Tr1 and Tr2 are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively, and to each other. Resistive elements R1 and R2 are connected between the bases and collectors of the transistors Tr1 and Tr2, respectively.

  The on / off switches S2 and S3 are connected between the bases and emitters of the transistors Tr1 and Tr2, respectively, and control the current supplied to the bases of the transistors Tr1 and Tr2. That is, the alternating current is interrupted when both of the on / off switches S2 and S3 are turned on, and the alternating current flows when both are turned off.

  The on / off switches S2 and S3 and the third diodes D5 and D6 may be connected in parallel as shown in FIG. 10 or may be connected in series. FIG. 11 is a schematic circuit diagram showing another configuration of the switch circuit according to Embodiment 2 of the present invention when an on / off switch is connected.

  In the example of FIG. 11, as in FIG. 10, the collectors of a pair of PNP transistors Tr1 and Tr2 are connected to each other, and the emitters are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively. Has been. Between the emitters of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, third diodes D5 and D6 each having polarity in the direction of current flow are connected. Further, between the collectors of the transistors Tr1 and Tr2 and the first input / output terminal P1 and the second input / output terminal P2, there are fourth diodes D7 and D8 having a polarity opposite to that of the third diodes D5 and D6. It is connected.

  The bases of the transistors Tr1 and Tr2 are connected to the first input / output terminal P1 and the second input / output terminal P2, respectively, and to each other. Resistive elements R1 and R2 are connected between the bases and collectors of the transistors Tr1 and Tr2, respectively.

  The on / off switches S2 and S3 are connected between the bases and emitters of the transistors Tr1 and Tr2, respectively, and control the current supplied to the bases of the transistors Tr1 and Tr2. That is, the alternating current is interrupted when both of the on / off switches S2 and S3 are turned on, and the alternating current flows when both are turned off.

  As described above, according to the second embodiment, it is possible to switch the pair of transistors on and off by controlling the current supplied to the bases of the pair of transistors with the control circuit. In addition, since the stray capacitance can be suppressed by connecting the transistor and the diode in series, even when a high-voltage / high-frequency signal is input, the transistor can operate correctly.

  In the second embodiment, the case where a pair of transistors Tr1 and Tr2 are connected is described as an example. However, as in the first embodiment, a plurality of transistors are connected in series with the same polarity. The transistor rows connected to may be connected as a pair of transistors. By connecting a plurality of transistors in series, the internal capacitance can be greatly reduced, and AC can be reliably cut off when both the on / off switches S2 and S3 are turned off.

  In the first and second embodiments, the control circuit 102 may be connected to the base terminals P3 and P4 via the power supply (power supply circuit) 100. FIG. 12 is a schematic circuit diagram showing a schematic configuration when the power supply 100 is connected in the switch circuit according to the embodiment of the present invention. Although the switch circuit having the configuration shown in FIG. 1 is used in FIG. 12, the present invention is not particularly limited to this, and the switch circuit having any configuration described above may be used.

  As shown in FIG. 12, a control circuit 102 is connected to a DC power supply 110 via an NPN transistor Tr9, and a power supply 100 is configured by connecting a capacitive element C9, a diode D9, and a resistance element R9. . By controlling the current supplied to the bases of the transistors Tr1 and Tr2 by the control circuit 102, the transistors Tr1 and Tr2 are switched on and off. That is, the alternating current is interrupted when the control circuit 102 supplies an off signal to the base terminals P3 and P4, and the alternating current flows when an on signal is supplied.

(Embodiment 3)
FIG. 13 is a block diagram schematically showing a configuration of a power transmission system using a power transmission device including a switch circuit according to Embodiment 3 of the present invention. FIG. 14 is an equivalent circuit diagram of a power transmission system using the power transmission device according to the third embodiment of the present invention. As shown in FIGS. 13 and 14, the first active electrode 11 a is connected to the active terminal 91 having a relatively high potential of the power supply (power supply circuit) 100 through the switch circuit 104 of the first or second embodiment. The first passive electrode 11p is connected to the passive terminal 92 that is connected and has a relatively low potential via the switch circuit 104 of the first or second embodiment. The power supply 100 is a high-voltage high-frequency power supply (AC power supply) that generates at least a passive voltage and an active voltage higher than the passive voltage, and boosts / lowers the output voltage of the low-voltage high-frequency power supply 111 and the low-voltage high-frequency power supply. The resonance circuit 105 is configured.

  The low-voltage and high-frequency power source 111 includes a DC power source 110, an impedance switching unit 108, and a DC / AC conversion element 114. The DC power supply 110 supplies a predetermined DC voltage (for example, DC 5V). The drive control unit 103 and the DC / AC conversion element 114 generate a high frequency voltage of, for example, 100 kHz to several tens of MHz using the power supply 100 as a power supply. The step-up / resonance circuit 105 includes a step-up transformer TG and an inductor LG, and steps up a high-frequency voltage and supplies it to the first active electrode 11a. A capacitance CG indicates a coupling capacitance between the first passive electrode 11p and the first active electrode 11a. A series resonant circuit is formed by the inductor LG and the capacitor CG. The I / V detector 101 detects the DC voltage value DCV and the DC current value DCI supplied from the power supply 100 and passes them to the control unit 102. The control unit (control circuit) 102 controls the operation of the drive control unit 103 based on the outputs of the I / V detector 101 and the AC voltmeter 106 as described later.

  The control unit 102 acquires the DC voltage value DCV detected by the I / V detector 101, analyzes the frequency characteristics of the acquired DC voltage value DCV, and detects whether or not the power receiving device 2 is placed. . Specifically, the impedance switching unit 108 that switches the output impedance of the DC power supply 110 is switched to a constant current, and the power supply 100 is operated as a constant current power supply until the power receiving apparatus 2 is placed and power transmission is started. Frequency sweep at low voltage.

  When the frequency sweep is performed, no resonance frequency is generated in a state where the power receiving device 2 is not mounted, and therefore no maximum value is generated in the DC voltage value DCV. That is, there is no frequency at which the fluctuation amount of the DC voltage value DCV per unit frequency is greater than a predetermined value.

  On the other hand, when the power receiving device 2 is mounted, a unique resonance frequency is generated for each mounted power receiving device 2, so that the impedance of the power receiving device 2 as viewed from the power source 100 is maximized and is close to the resonance frequency. The DC voltage value DCV becomes a maximum value. That is, since there is a frequency at which the fluctuation amount of the DC voltage value DCV per unit frequency is larger than a predetermined value, it is possible to detect that the power receiving device 2 is mounted by detecting the frequency. When it is detected that the power receiving device 2 is mounted, the impedance switching unit 108 can switch the power source 100 to a constant voltage power source and set the detected resonance frequency as the operating frequency.

  The AC voltmeter 106 detects the AC voltage value ACV of the output voltage of the boost / resonance circuit 105 and passes it to the control unit 102. The control unit 102 acquires the AC voltage value ACV detected by the AC voltmeter 106 and monitors fluctuations in the AC voltage value ACV.

  In addition, when the acquired AC voltage value ACV is an overvoltage that exceeds a certain voltage value, the control unit 102 transmits a power transmission stop instruction to the drive control unit 103 to stop power transmission. In addition, when the direct current value DCI becomes smaller than a predetermined value, the control unit 102 determines that charging is completed and stops power transmission.

  The control unit 102 transmits an instruction to start / stop power transmission to the drive control unit 103, and the drive control unit 103 causes the DC / AC conversion element 114 to DC-AC convert the DC voltage into an AC voltage. The DC / AC conversion element 114 supplies an AC voltage to the boost / resonance circuit 105 in accordance with the output of the drive control unit 103.

  The booster / resonant circuit 105 boosts the supplied AC voltage and supplies it to the power transmission electrode 11 (first active electrode 11a, first passive electrode 11p) via the switch circuit 104. Although simplified in FIG. 13, the switch circuit 104 is provided for each power transmission electrode 11. The power transmission electrode 11 of the power transmission device 1 is capacitively coupled with the power reception electrode 21 (the second active electrode 21a and the second passive electrode 21p) of the power reception device 2 to transmit electric power. A step-down / resonance circuit 201 configured by a step-down transformer TL and an inductor LL is connected to the power reception electrode 21 of the power reception device 2. The capacitance CL indicates the capacitance between the second passive electrode 21p and the second active electrode 21a. A series resonant circuit is formed by the inductor LL and the capacitor CL. The series resonant circuit has a unique resonant frequency. A capacity CM indicates a coupling capacity with the power transmission electrode 11.

  The power receiving device 2 steps down the transmitted power with the step-down / resonance circuit 201, rectifies with the rectifier 202, and charges the load circuit (secondary battery) 203 with the rectified voltage.

  In the third embodiment, switching is performed by the switch circuit 104 so that either the active voltage or the passive voltage is supplied to each power transmission electrode 11. The power transmission electrode 11 supplied with the active voltage functions as the first active electrode 11a. The power transmission electrode 11 supplied with the passive voltage functions as the first passive electrode 11p.

  FIG. 15 is an exemplary diagram of a connection state of the switch circuit 104 of the power transmission device 1 according to the third embodiment of the present invention. As shown in FIG. 15, the plurality of power transmission electrodes 11 are arranged in an array on the surface on which the power receiving device 2 is placed. Then, the power transmission electrode 11 on which the power receiving device 2 is mounted and the power transmission electrode 11 on which the power receiving device 2 is not mounted are supplied with either an active voltage or a passive voltage by changing the connection state with the power source 100.

  In the example of FIG. 15, the power source 100 to be connected is different between the power transmission module 1 a and the power transmission module 1 b. That is, the power transmission module 1a includes a power source 100a and a control unit 102a, and the power transmission module 1b includes a power source 100b and a control unit 102b.

  Second input / output terminals P <b> 2 of at least two switch circuits 104 are connected to one power transmission electrode 11. The two switch circuits 104 switch the connection state with the power supplies 100a and 100b according to instructions from the control units 102a and 102b, respectively. The first input / output terminal P1 of one switch circuit 104 is connected to the active terminal 81 of the power supply 100a (or 100b), and the first input / output terminal P1 of the other switch circuit 104 is connected to the power supply 100a (or 100b) is connected to the passive terminal 82. That is, an active voltage is supplied to the first input / output terminal P1 of one switch circuit 104, and a passive voltage is supplied to the first input / output terminal P1 of the other switch circuit 104.

  For each power transmission electrode 11, the switch circuit 104 connected to the active terminal 81 is turned off (a state in which an alternating current flows), or the switch circuit 104 connected to the passive terminal 82 is turned off (an alternating current flows). By switching the state), it is possible to switch between supplying an active voltage or a passive voltage for each power transmission electrode 11. Note that the number of switch circuits 104 connected to one power transmission electrode 11 may be two or more.

  As described above, according to the third embodiment, switching is performed by the switch circuit according to the first or second embodiment so that the power transmission electrodes of the power transmission device function as the first active electrode and the first passive electrode, respectively. Can do. And since it has a switch circuit that can suppress stray capacitance by connecting a transistor and a diode in series, there is no need to use a reed switch, a relay, etc., and the entire power transmission device can be downsized. it can.

  In addition, the present invention is not limited to the above-described embodiments, and it goes without saying that various modifications and substitutions are possible within the scope of the gist of the present invention. For example, in Embodiments 1 to 3 described above, the switch circuit is configured using transistors, but a similar switch circuit can be configured using other semiconductor elements such as thyristors and FETs.

DESCRIPTION OF SYMBOLS 1 Power transmission apparatus 2 Power receiving apparatus 11 Power transmission electrode 11a 1st active electrode 11p 1st passive electrode 21 Power receiving electrode 21a 2nd active electrode 21p 2nd passive electrode 91 Active terminal 92 Passive terminal 100 Power supply (power supply circuit)
102, 102a Control unit (control circuit)
104 Switch circuit D1, D2 1st diode D3, D4 2nd diode D5, D6 3rd diode D7, D8 4th diode P1 1st input / output terminal P2 2nd input / output terminal P3, P4 Base terminal R1 to R5 Resistance element S1 to S3 On-off switch Tr1 to Tr6 Transistor

Claims (4)

A pair of transistors in which emitters or collectors are connected to each other are connected between the first input / output terminal and the second input / output terminal,
When the emitters of the pair of transistors are connected to each other, polarities are set in the direction of current flow between the collector and the first input / output terminal and between the collector and the second input / output terminal. A first diode having a polarity opposite to that of the first diode between the emitter and the first input / output terminal and between the emitter and the second input / output terminal; Each connected,
When the collectors of the pair of transistors are connected to each other, polarities are set in the direction of current flow between the emitter and the first input / output terminal and between the emitter and the second input / output terminal. A third diode having a polarity opposite to that of the third diode between the collector and the first input / output terminal and between the collector and the second input / output terminal. Each connected,
A switch circuit which controls on / off switching of the pair of transistors by controlling current supplied to the bases of the pair of transistors by a control circuit. Instead of the control circuit, an on / off switch for switching on / off of the pair of transistors is connected between a base and an emitter of the pair of transistors,
The switch circuit according to claim 1, wherein a resistance element is connected between a base and a collector of the pair of transistors.   The pair of transistors is two transistor arrays each composed of a plurality of transistors connected in series with the same polarity. When the on / off switch is connected, the bases of adjacent transistors in the transistor array are connected to each other. The switch circuit according to claim 1, wherein the switch circuits are connected to each other via a resistance element. A power supply circuit that generates at least a passive voltage and an active voltage higher than the passive voltage;
A plurality of power transmission electrodes;
The switch circuit according to any one of claims 1 to 3, wherein a connection state with the power supply circuit is switched so as to supply either a passive voltage or an active voltage for each power transmission electrode.
A control circuit for controlling the switching of the switch circuit,
A second input / output terminal of at least two of the switch circuits is connected to the power transmission electrode;
An active voltage is supplied to a first input / output terminal of one of the switch circuits, and a passive voltage is supplied to a first input / output terminal of the other switch circuit.

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