JP2013233019A - Power supply controller, power supply control method, and program - Google Patents

Abstract

An output voltage of a switching power supply rises quickly while preventing an overcurrent state.
When a target value of an output voltage vout output from a digital control type switching power supply is set, the power supply control device according to the embodiment converts the output voltage vout into a voltage-current, and outputs an output current imon. The voltage-current conversion unit 25 that outputs the reference voltage, the reference voltage generation unit 22 that outputs the reference voltage target of the output voltage vout changed according to the value of the output current, and the difference between the output voltage vout and the reference voltage target Accordingly, a control signal generation unit that generates the pulse signal pwm of the switching power supply so as to reduce the difference between the output voltage vout and the reference voltage target is provided.
[Selection] Figure 1

Description

  The present invention relates to a digitally controlled switching power supply control device, a power supply control method, and a program.

  In recent years, a variety of eco-friendly products have been developed. A typical product is a solar power generation system, and a microcomputer for controlling the system has been developed. In the photovoltaic power generation system, since it is necessary to perform voltage conversion on a plurality of solar battery panels, a microcomputer that performs power control of a digital control system that can easily control a plurality of channels is beginning to be put into practical use.

  In a switching power supply control device such as a DC-DC converter for performing voltage conversion after power generation, the switching element may be damaged by the charging current of the output capacitor when the power is turned on, or the rising waveform of the output voltage may overshoot. Problems may occur. In order to prevent this, in the analog control type DC-DC converter, the output capacitor capacity is adjusted to moderate the rising waveform of the output voltage.

  Similarly, some digital control type DC-DC converters include a soft start circuit that controls the duty of the drive signal of the switching element from the control circuit to moderate the rising waveform of the output voltage. . Further, the switching power supply control device is required to prevent the charging current of the output capacitor from rapidly rising when the power is turned on and to increase the rising speed of the output voltage.

  Patent Document 1 describes a power supply control device that quickly raises the output voltage of a switching power supply to a target value while suppressing overshoot and undershoot. In the power supply control device described in Patent Document 1, a reference value is calculated, and a time ratio corresponding to the difference between the reference value and the output voltage is calculated so that the difference between the reference value and the output voltage is reduced. .

  And the switching pulse which has this time ratio is produced | generated, and the input voltage of switching power supply is switched in response to this switching pulse. When the target value of the output voltage is changed, the reference value changes linearly monotonically over a plurality of times with a plurality of slopes until the changed target value, and the output voltage also changes monotonously in a polygonal line. The slope of the reference value is determined by preset slope data.

JP 2004-297993 A

  When the supply current flows to the load when the power is turned on, or when the charging current flows to the output capacitor, the load resistance characteristics such as the load resistance is non-linear. There is a case. In this case, a voltage drop occurs, and in the worst case, the supplied power supply may shut down. In Patent Document 1, even when the supply current of the power supply circuit of the load is in an overcurrent state, the output voltage is controlled according to the set slope data, so the overcurrent state cannot be prevented.

  Other problems and novel features will become apparent from the description of the specification and the accompanying drawings.

  When a target value of an output voltage output from a digital control type switching power supply is set, the power supply control device according to the embodiment converts the output voltage to current and outputs the output current. Then, a reference voltage of the output voltage changed according to the value of the output current is output, and the switching power supply is set so that the difference between the output voltage and the reference voltage becomes small according to the difference between the output voltage and the reference voltage. Control signal is generated.

  According to the embodiment, the rise of the output voltage of the switching power supply can be speeded up while preventing an overcurrent state.

1 is a diagram illustrating a configuration of a power supply control device according to a first embodiment. 3 is a diagram illustrating a configuration of a reference voltage generation unit of the power supply control device according to Embodiment 1. FIG. 3 is a timing chart illustrating an operation of the power supply control device according to the first embodiment. FIG. 3 is a diagram illustrating a configuration of a power supply control device according to a second embodiment. FIG. 10 is a diagram illustrating a configuration of a power supply control device according to a third embodiment. FIG. 10 is a diagram illustrating a configuration of a reference voltage generation unit of a power supply control device according to a third embodiment.

  Hereinafter, embodiments will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description will be omitted. In addition, the following description will be divided into a plurality of embodiments, but unless otherwise specified, they are not irrelevant to each other, and one is a modification, details, and supplements of a part or all of the other. There is a relationship such as explanation.

  The present embodiment relates to a digital control type switching power supply control device, and in particular, to a soft start technique when the switching power supply control device is turned on. An overcurrent state can be prevented by determining the reference voltage of the output current according to the value of the output current obtained by converting the output voltage output from the switching power supply into a voltage-current.

Embodiment 1 FIG.
A power supply control apparatus according to Embodiment 1 will be described with reference to FIG. FIG. 1 is a diagram illustrating a configuration of a power supply control device 10 according to the first embodiment. As shown in FIG. 1, the power supply control device 10 includes an input terminal 11, a transistor 12, a leveling circuit 13, an output terminal 14, an A / D converter 15, a digital controller 21, a voltage / current converter 25, and a selector 26. Yes. The digital controller 21 includes a reference voltage generator 22, a calculator 23, and an output controller 24.

  An input voltage is applied to the input terminal 11. The transistor 12 switches an input voltage input from the input terminal 11. The transistor 12 receives the input voltage applied from the input terminal 11 and outputs the source-drain voltage of the transistor 12 to the leveling circuit 13.

  The leveling circuit 13 levels the output of the transistor 12. In the example illustrated in FIG. 1, the leveling circuit 13 includes a diode 131, a coil 132, and a capacitor 133. The anode of the diode 131 is connected to the ground, and the cathode is connected between the output of the transistor 12 and one end of the coil 132. Further, one end of the capacitor 133 is connected between the other end of the coil 132 and the output terminal 14, and the other end of the capacitor 133 is connected to the ground.

  The leveling circuit 13 receives the source-drain voltage of the transistor 12 as input, and outputs the leveled voltage of the source-drain voltage of the transistor 12 to the output terminal 14 and the voltage / current converter 25 as the output voltage vout.

  The output voltage vout is input from the leveling circuit 13 to the voltage / current converter 25. The voltage / current converter 25 converts the output voltage vout into an output current imon, and outputs the output voltage vout and the output current imon to the selector 26, respectively.

  As the selector 26, a multiplexer (MUX) is used. The selector 26 is supplied with “mon” and the output voltage “vout”. The selector 26 alternately and exclusively selects one of the output current “mon” and the output voltage “vout”. The selected output current “imon” and output voltage “vout” are output to the A / D converter 15.

  The A / D converter 15 alternately samples the output current “mon” and the output voltage “vout” alternately input in a time division manner. The A / D converter 15 performs A / D conversion on the output current “mon” and the output voltage “vout” selected by the selector 26, and uses the converted result as an A / D converter output “ado”. Each is output to the calculator 23. In addition, the A / D converter 15 outputs a selection signal iorv indicating which of the output current “mon” and the output voltage “vout” is selected to the selector 26 and the reference voltage generator 22.

  The digital controller 21 performs control so that the A / D converter output “ado” matches the reference voltage “target”. As described above, the digital controller 21 includes the reference voltage generator 22, the calculator 23, and the output controller 24. The reference voltage generator 22 receives the A / D converter output “ado” and the selection signal iorv, and outputs the reference voltage “target”. The configuration of the reference voltage generator 22 will be described in detail later.

  The arithmetic unit 23 receives the A / D converter output “ado”, the reference voltage “target”, and the selection signal “iorv”. A control calculation is performed so that the A / D converter output “ado” obtained by sampling the output voltage “vout” matches the reference voltage “target”. The computing unit 23 outputs the computing unit output opo, which is a control signal corresponding to the difference between the A / D converter output ado and the reference voltage generation unit 22, to the output control unit 24. The computing unit 23 outputs a computing unit output opo that reduces the difference between the output voltage vout and the reference voltage target in accordance with the difference between the output voltage vout and the reference voltage target.

  The output controller 24 receives the calculator output opo and outputs a pulse signal pwm having a duty ratio corresponding to the calculator output opo to the gate of the transistor 12. That is, in the present embodiment, the calculator 23 and the output control unit 24 correspond to a control signal generation unit that generates a control signal for the switching power supply.

  Here, the reference voltage generator 22 will be described in detail with reference to FIG. FIG. 2 is a diagram illustrating a configuration of the reference voltage generation unit 22. As shown in FIG. 2, the reference voltage generation unit 22 includes a current upper limit setting register 221, a current lower limit setting register 222, a comparator 223, a count width setting register 224, a target voltage setting register 225, a regulator 226, and a counter 227. .

  A current upper limit setting value is set in the current upper limit setting register 221. A current lower limit setting value is set in the current lower limit setting register 222. The current upper limit set value is arbitrarily set so that the output current imon increases and the overcurrent state does not occur. The current lower limit set value is arbitrarily set in order to speed up the rise of the output voltage.

  Here, an example has been described in which the two set values of the current upper limit set value and the current lower limit set value are compared with the A / D converter output ado obtained by sampling the output current imon. However, the present invention is not limited to this. Absent. For example, only one set value may be set, or more than two set values may be set.

  The comparator 223 receives the current upper limit set value, the current lower limit set value, the A / D converter output ado, and the selection signal iorv. The comparator 223 compares the A / D converter output ado obtained by sampling the output current “imon” with the current upper limit set value and the current lower limit set value, and outputs the comparison result as the comparator output cpo. The comparator output cpo is output to the adjuster 226 according to the selection signal iorv.

  A count width setting value is set in the count width setting register 224. The count width setting value is a value indicating an increase / decrease width of the reference voltage target set initially. In the target voltage setting register 225, the final target value of the output voltage vout is set. The power supply control device 10 finally controls the output voltage vout to be the target value set in the target voltage setting register 225.

  The adjuster 226 receives the count width set value and the comparator output cpo. The comparator output cpo is an offset value added to the count width setting value. The adjuster 226 adds the comparator output cpo to the count width set value, and outputs it to the counter 227 as the adjuster output adj. That is, the count width of the regulator output adj increases or decreases according to the comparator output cpo.

  The counter 227 receives the target value from the target voltage setting register 225 and the adjuster output adj. The counter 227 outputs the reference voltage target that increases or decreases with an increase / decrease width corresponding to the regulator output adj until the reference voltage target becomes equal to the target value. That is, the increase / decrease width of the reference voltage target changes according to the comparison result of the regulator 226.

  Here, the operation of the power supply control apparatus 10 according to the first embodiment will be described with reference to FIG. FIG. 3 is a timing chart showing the operation of the power supply control device 10. In FIG. 3, a timing chart of each signal is shown in the upper stage, a graph showing a change in the output voltage vout is shown in the middle stage, and a graph showing a change in the output current imon is shown in the lower stage.

  In the example shown in FIG. 3, the selector 26 selects the output voltage vout when the selection signal iorv is at a high level, and selects the output current imon when it is at a low level. First, the current upper limit setting value of the output current “imon” is set in the current upper limit setting register 221, and the current lower limit setting value is set in the current lower limit setting register 222. Here, the current upper limit setting value of the current upper limit setting register 221 is 10 mA, and the current lower limit setting value of the current lower limit setting register 222 is 1 mA.

  Further, the target value of the output voltage vout is set in the target voltage setting register 225, and the initial count width setting value for determining the gradient of the output voltage vout is set in the count width setting register 224. Here, the target value of the target voltage setting register 225 is set to 0 × 20 (hexadecimal number), and the count width setting value of the count width setting register 224 is set to 0 × 4 (hexadecimal number).

  Then, when the power is turned on and the target value is set, the output of the output voltage vout is started. In the example shown in FIG. 3, first, the selector 26 selects the output current “imon” obtained by converting the output voltage “vout” into the voltage / current by the voltage / current converter 25. Then, an A / D converter output “ado” obtained by A / D converting the output current “mon” is output. Further, the A / D converter 15 outputs a selection signal iorv that becomes a high level at the timing T0 in response to the input of the output current ion.

  The selector 26 selects the output voltage vout in response to the rise of the selection signal iorv at the timing T0. Then, while the selection signal iorv is at the high level (TW0), the A / D converter output ado obtained by A / D converting the output voltage vout is output. TW0 is an operation cycle of the A / D converter 15. Further, according to the input of the output voltage vout, the A / D converter 15 outputs a selection signal iorv that becomes a low level at timing T1 after TW0 has elapsed from timing T0.

  In response to the fall of the selection signal iorv at timing T1, the selector 26 selects the output current imon. While the selection signal iorv is at the low level, the A / D converter output “ado” obtained by A / D converting the output current “mon” is output. Further, the A / D converter 15 outputs a selection signal iorv that becomes a high level at the timing T2 in response to the input of the output current ion. Thereafter, similarly, the A / D converter 15 samples the output voltage vout and the output current imon alternately in the cycle TW0. That is, the selector 26 changes the output voltage vout or the output current imon to be selected next at an arbitrary time according to the selection signal iorv from the A / D converter 15.

  Then, according to the A / D converter output “ado” of the output current “imon”, the reference voltage “target” is output with a steep slope if the output current “imon” is equal to or less than the current upper limit set value, and when the output current “mon” reaches the current upper limit set value, By gradually outputting the target gradient, the operation is performed so as to control the rising gradient of the output voltage vout.

  The reference voltage target is raised from an initial value 0 × 0 (hexadecimal number). When the output current “imon” is equal to or lower than the current upper limit setting value (TW2), the reference voltage target increases by 0 × 4 (hexadecimal) by the initial count width setting value set in the count width setting register 224. Then, a compensation calculation is performed by the calculator 23 so that the A / D converter output “ado” of the output voltage “vout” matches the reference voltage “target”.

  At timing T2 after the elapse of TW1 from timing T0, the selection signal iorv becomes high level, and the output voltage vout is sampled by the A / D converter 15. Also at this time, since the output current “mon” is equal to or lower than the current upper limit set value, the reference voltage “target” increases by the count width setting value 0x4 (hexadecimal number) set in the count width setting register 224.

  The period TW1 from the timing T0 to the timing T2 is the switching cycle of the power supply control device 10 to operate. As shown in the middle part of FIG. 3, the slope of the output voltage vout at this time is S0.

  At timing T3, when the output current imon becomes equal to or higher than the current upper limit set value, control is performed to make the rising slope of the output voltage vout gentle. The adjuster 226 outputs an adjuster output adj that decreases the increment of the count width in the counter 227 from the count width setting value of the count width setting register 224 in accordance with the comparator output cpo. In the example shown in FIG. 3, the comparator output cpo reduces the increment of the count width by 0 × 3 (hexadecimal number) from the count width setting value to 0x1 (hexadecimal number).

  At timing T4, which is a sampling timing subsequent to T3, the output voltage vout is sampled, and arithmetic processing is performed to bring the output voltage vout closer to the reference voltage target. Since the reference voltage target increases by a value (0x1 (hexadecimal number)) set at the timing T3, the rising slope of the output voltage vout can be made gentle. Therefore, as shown in the middle stage of FIG. 3, the slope of the output voltage vout is S1 smaller than S0.

  At timing T5, when the output current imon becomes equal to or lower than the current lower limit set value, control is performed to make the rising slope of the output voltage vout steep. The adjuster 226 outputs an adjuster output adj that increases the increment of the count width in the counter 227 from the count width setting value of the count width setting register 224 in accordance with the comparator output cpo. In the example shown in FIG. 3, the comparator output cpo increases the count width by 0 × 4 (hexadecimal) from the count width setting value to 0 × 8 (hexadecimal).

  At timing T6, which is a sampling timing subsequent to T5, the output voltage vout is sampled, and arithmetic processing is performed to bring the output voltage vout closer to the reference voltage target. Since the reference voltage target increases by the value (0x8 (hexadecimal number)) set at the timing T5, the rising slope of the output voltage vout can be made steep. Therefore, as shown in the middle part of FIG. 3, the slope of the output voltage vout is S1 larger than S0.

  At time T7, when the output voltage vout reaches the target value set in the target voltage setting register 225, the increase in the reference voltage target is stopped. Thereafter, the target value set in the target voltage setting register 225 is fixedly output from the reference voltage generator 22 as the reference voltage target. Thereby, the rising process of the output voltage vout is completed, and a steady output state is obtained.

  Furthermore, the control of the rising gradient of the output voltage vout by the output current imon will be described in detail. The A / D converter 15 samples the output current “mon” and the output voltage “vout” alternately in a time division manner in a time division manner.

  For this reason, the A / D converter 15 outputs the result of sampling the output current imon as the A / D converter output ado at the timing T3, and outputs the result of sampling the output voltage vout at the timing T4 of the next sampling timing. The output operation is performed as the converter output ado.

  The comparator 223 determines that the result of sampling the output current “imon” is equal to or greater than the current upper limit set value set in the current upper limit setting register 221. The comparator 223 decreases the increment of the counter 227 by 0x3 (hexadecimal number) from the set value of the count width setting register 224 in order to moderate the rising slope of the output voltage vout so as to prevent an overcurrent state. The comparator output cpo with an increment of 0 × 1 (hexadecimal number) is output.

  Thereafter, at the timing T4 at which the output voltage vout is sampled, the increment of the counter width where the reference voltage target increases by 0 × 1 (hexadecimal number) from the increment of the counter width where the reference voltage target increases by 0 × 4 (hexadecimal number). Change to As a result, the rising slope of the output voltage vout can be set to S1, which is gentler than S0, and an increase in the output current Imon can be prevented.

  Thereafter, the reference voltage target is set so that the gradient of the output voltage vout remains S1 until the output current “imon” becomes equal to or less than the current lower limit set value set in the current lower limit setting register 222 (period TW3 from timing T3). The counter width increment is retained.

  The A / D converter 15 outputs the result of sampling the output current imon as the A / D converter output ado at the timing T5 after the period TW3 has elapsed, and samples the output voltage vout at the timing T6 of the next sampling timing. The result is output as an A / D converter output ado.

  The comparator 223 determines that the result of sampling the output current “imon” is equal to or less than the current lower limit set value set in the current lower limit setting register 222. The comparator 223 increases the increment of the counter 227 by 0 × 4 (hexadecimal number) from the set value of the count width setting register 224 in order to make the rising slope steep so as to raise the output voltage vout at high speed. A comparator output cpo that outputs 0 × 8 (hexadecimal number) is output.

  Thereafter, at the timing T6 at which the output voltage vout is sampled, the increment of the counter width in which the reference voltage target increases by 0 × 8 (hexadecimal number) from the increment of the counter width in which the reference voltage target increases by 0 × 4 (hexadecimal number). Change to As a result, the rising slope of the output voltage vout can be changed from S1 to a steep S2 thereby to increase the rising speed of the output voltage vout.

  Thereafter, until the output voltage vout reaches the target value set in the target voltage setting register 225 (period TW4 from timing T5 to T7), the counter width of the reference voltage target is set so that the gradient of the output voltage vout remains S2. Increment is retained.

  Thus, in the first embodiment, when the output current “mon” becomes equal to or higher than the current upper limit set value, the gradient of the reference voltage “target” is gradually changed. As a result, the rising gradient of the output voltage vout can be moderated, and the steep rising of the output current imon can be suppressed.

  Further, when the output current “mon” becomes equal to or lower than the current lower limit set value, the steep rise of the output voltage “vout” can be realized by steeply changing the slope of the reference voltage “target”. Furthermore, by using the A / D converter 15 for sampling the output current “mon” and the output voltage “vout”, an increase in circuit area can be suppressed and realized.

  In the first embodiment, an example in which each component is realized by a digital circuit has been described. However, the present invention is not limited to this. It can also be realized by an analog circuit having a function equivalent to each component.

Embodiment 2. FIG.
A power supply control apparatus 10A according to Embodiment 2 will be described with reference to FIG. FIG. 4 is a diagram illustrating a configuration of the power supply control device 10A according to the second embodiment. 4, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.

  In the first embodiment, one A / D converter 15 is used for sampling the output current imon and the output voltage vout. However, in the second embodiment, the A / D converter 30 that samples the output voltage vout and the output current imon are used. A / D converters 31 for sampling are provided separately.

  As shown in FIG. 4, the output voltage vout is input to the A / D converter 30. The A / D converter 30 performs A / D conversion of the output voltage vout, and outputs the voltage conversion result to the reference voltage generation unit 22 and the calculator 23 as an A / D converter output ado.

  The A / D converter 31 receives the output current “mon”. The A / D converter 31 performs A / D conversion of the output current “imon”, and outputs the current conversion result to the reference voltage generation unit 22. Note that the operation of the digital controller 21 is the same as that of the first embodiment, and thus the description thereof is omitted.

  In the second embodiment, an A / D converter that samples the output voltage vout and the output current imon is provided, and time-sharing processing is not required in the A / D converter, so that high-speed operation is possible. . In addition, the signals of the output voltage vout and the output current imon do not interfere with each other, so that an overcurrent state can be prevented more reliably and the output voltage vout can be raised at a high speed.

Embodiment 3 FIG.
A power supply control device 10B according to Embodiment 3 will be described with reference to FIGS. FIG. 5 is a diagram illustrating a configuration of a power supply control device 10B according to the second embodiment. FIG. 6 is a diagram showing a configuration of the reference voltage generator 22B used in FIG. 5 and 6, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and the description thereof is omitted.

  In the third embodiment, an analog comparator 40 is provided instead of the A / D converter 31 of the second embodiment. Further, the configuration of the reference voltage generator 22B is different from the reference voltage generator 22 shown in FIG.

  The comparator 40 receives the output current “mon”. An arbitrary current setting value is set in the comparator 40. The comparator 40 compares the output current “imon”, which is an analog signal, with the current set value, and outputs a comparator output “cpob”, which is a binary comparison result, to the reference voltage generator 22B.

  As shown in FIG. 6, the reference voltage generator 22B includes a target voltage setting register 225, a count width setting register 224, an adjuster 226, and a counter 227. The current upper limit setting register 221, the current lower limit setting register 222, and the comparison The vessel 223 is not provided. In the third embodiment, the comparator 40 serves as a current upper limit setting register 221, a current lower limit setting register 222, and a comparator 223.

  The third embodiment has the following effects in addition to the effects of the first embodiment. In the third embodiment, since the current upper limit setting register 221, the current lower limit setting register 222, and the comparator 223 are the analog comparator 40, the circuit scale can be reduced and the cost can be reduced. In addition, power consumption can be reduced.

  In the above-described embodiment, the hardware configuration has been described. However, the present invention is not limited to this. Arbitrary processing can also be realized by causing a CPU (Central Processing Unit) to execute a computer program. Further, it can be realized by a field programmable gate array (FPGA) or a complex programmable logic device (CPLD).

  The program may be stored using various types of non-transitory computer readable media and supplied to a computer. Non-transitory computer readable media include various types of tangible storage media. Examples of non-transitory computer-readable media include magnetic recording media (for example, flexible disks, magnetic tapes, hard disk drives), magneto-optical recording media (for example, magneto-optical disks), CD-ROMs (Read Only Memory), CD-Rs, CD-R / W and semiconductor memory (for example, mask ROM, PROM (Programmable ROM), EPROM (Erasable PROM), flash ROM, RAM (random access memory)) are included.

  The program may also be supplied to the computer by various types of transitory computer readable media. Examples of transitory computer readable media include electrical signals, optical signals, and electromagnetic waves. The temporary computer-readable medium can supply the program to the computer via a wired communication path such as an electric wire and an optical fiber, or a wireless communication path.

  As mentioned above, although this invention was demonstrated based on embodiment, said embodiment is an illustration, and unless it deviates from the main point of this invention, you may add various change and increase / decrease. It will be understood by those skilled in the art that modifications to which these changes and increases / decreases are also within the scope of the present invention.

DESCRIPTION OF SYMBOLS 10 Power supply control apparatus 10A, 10B Power supply control apparatus 11 Input terminal 12 Transistor 13 Leveling circuit 14 Output terminal 15 A / D converter 21 Digital controller 22 Reference voltage generation part 22B Reference voltage generation part 23 Calculator 24 Output control part 25 Voltage current Conversion unit 26 Selector 30 A / D converter 31 A / D converter 40 Comparator 131 Diode 132 Coil 133 Capacitor 221 Current upper limit setting register 222 Current lower limit setting register 223 Comparator 224 Count width setting register 225 Target voltage setting register 226 Adjuster 227 Counter imon output current vout output voltage ado A / D converter output iorv selection signal target reference voltage opo arithmetic unit output pwm pulse signal cpo comparator output adj adjuster output cpob comparator output

Claims (10)

When a target value of an output voltage output from a digital control switching power supply is set, a voltage-current conversion unit that converts the output voltage into a voltage-current and outputs an output current; and
A reference voltage generator that outputs a reference voltage of the output voltage, which is changed according to the value of the output current;
A control signal generator that generates a control signal of the switching power supply so that a difference between the output voltage and the reference voltage is reduced according to a difference between the output voltage and the reference voltage;
A power supply control device comprising: The reference voltage generator is
A comparator for comparing the output current with an arbitrarily set current value;
An adjuster that changes the increase / decrease width of the reference voltage based on the comparison result of the comparator;
The power supply control device according to claim 1, comprising: A selector for exclusively selecting the output voltage and the output current;
An A / D converter that performs A / D conversion of the output voltage or the output current selected by the selection unit, and outputs a conversion result;
Further comprising
The control signal generation unit generates a control signal for the switching power supply according to a difference between the conversion result of the output voltage from the A / D converter and the reference voltage,
The power supply control device according to claim 1, wherein the reference voltage generation unit changes an increase / decrease width of the reference voltage according to a conversion result of the output current from the A / D converter.   The power supply control device according to claim 3, wherein the selection unit changes the output voltage or the output current to be selected next at an arbitrary time according to an output from the A / D converter. A first A / D converter that performs A / D conversion of the output voltage and outputs a voltage conversion result;
A second A / D converter that performs A / D conversion of the output current and outputs a current conversion result;
Further comprising
The control signal generation unit generates a control signal for the switching power supply according to a difference between the voltage conversion result from the first A / D converter and the reference voltage,
The power supply control device according to claim 1, wherein the reference voltage generation unit changes an increase / decrease width of the reference voltage according to the current conversion result from the second A / D converter. An analog comparator for comparing the output current with an arbitrarily set current value;
The power supply control device according to claim 1, wherein the reference voltage generation unit includes an adjuster that changes an increase / decrease width of the reference voltage based on a comparison result of the analog comparator. When the target value of the output voltage output from the switching power supply of the digital control system is set, the output voltage is converted to voltage-current to output the output current,
The reference voltage of the output voltage, which is changed according to the value of the output current, is output,
According to the difference between the output voltage and the reference voltage, the control signal of the switching power supply is generated so that the difference between the output voltage and the reference voltage is reduced.
Power control method. The output current is compared with an arbitrarily set current value,
Based on the comparison result, the increase / decrease width of the reference voltage is changed,
The power supply control method according to claim 7. When the target value of the output voltage output from the switching power supply of the digital control system is set, the output voltage is converted to voltage-current to output the output current,
The reference voltage of the output voltage, which is changed according to the value of the output current, is output,
According to the difference between the output voltage and the reference voltage, the control signal of the switching power supply is generated so that the difference between the output voltage and the reference voltage is reduced.
A program that causes a computer to execute processing. The output current is compared with an arbitrarily set current value,
Based on the comparison result, the increase / decrease width of the reference voltage is changed,
The program of Claim 9 for making a computer perform a process.

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