JP2013222946A - 部品内蔵配線基板、及び部品内蔵配線基板の放熱方法 - Google Patents
部品内蔵配線基板、及び部品内蔵配線基板の放熱方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims description 26
- 230000005855 radiation Effects 0.000 title 1
- 239000002184 metal Substances 0.000 claims abstract description 106
- 229910052751 metal Inorganic materials 0.000 claims abstract description 106
- 230000017525 heat dissipation Effects 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 9
- 230000006378 damage Effects 0.000 abstract description 7
- 238000009413 insulation Methods 0.000 abstract description 5
- 239000000758 substrate Substances 0.000 description 72
- 239000010410 layer Substances 0.000 description 51
- 239000011229 interlayer Substances 0.000 description 18
- 238000004519 manufacturing process Methods 0.000 description 16
- 239000000853 adhesive Substances 0.000 description 13
- 230000001070 adhesive effect Effects 0.000 description 13
- 238000005530 etching Methods 0.000 description 12
- 239000011347 resin Substances 0.000 description 7
- 229920005989 resin Polymers 0.000 description 7
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 6
- 239000004332 silver Substances 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000003566 sealing material Substances 0.000 description 3
- 239000000779 smoke Substances 0.000 description 3
- 239000003575 carbonaceous material Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- Insulated Metal Substrates For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
【解決方法】少なくとも一対の配線層と、前記一対の配線層間に配設された絶縁部材と、前記絶縁部材中に埋設された電子部品と、前記絶縁部材内に配設され、前記電子部品の非アクティブ面及び側面を収納するための凹部が形成された金属体と、を具えるようにして、部品内蔵配線基板を構成する。
【選択図】図1
Description
少なくとも一対の配線層と、
前記一対の配線層間に配設された絶縁部材と、
前記絶縁部材中に埋設された電子部品と、
前記絶縁部材内に配設され、前記電子部品の非アクティブ面及び側面を収納するための凹部が形成された金属体と、
を具えることを特徴とする、部品内蔵配線基板に関する。
少なくとも一対の配線層と、前記一対の配線層間に配設された絶縁部材と、前記絶縁部材中に埋設された電子部品とを具える部品内蔵配線基板において、
前記絶縁部材内に凹部が形成された金属体を配設し、この金属体の前記凹部内に前記電子部品の非アクティブ面及び側面を収納し、前記電子部品から発せられる熱を、前記金属体を介して放熱させることを特徴とする、部品内蔵配線基板の放熱方法に関する。
図1は、本実施形態の部品内蔵配線基板を示す断面構成図である。図1に示す部品内蔵配線基板10は、その表面及び裏面に位置し、互いに略平行な第1の配線層11及び第2の配線層12を有するとともに、その内側において、互いに略平行であるとともに、第1の配線層11及び第2の配線層12とも略平行な関係を保持する第3の配線層13及び第4の配線層14を有している。また、第3の配線層13及び第4の配線層14間には、略中央部に凹部17Oが形成されたメタルコア基板17が配設されている。
本実施形態では、第1の実施形態の部品内蔵配線基板10の製造方法について説明する。図2〜図13は、本実施形態の製造方法における工程図を示す図である。
11 第1の配線層
12 第2の配線層
13 第3の配線層
14 第4の配線層
17 メタルコア基板
17O メタルコア基板の凹部
17O−1 メタルコア基板の凹部の上壁面
17O−2 メタルコア基板の凹部の側壁面
21 第1の絶縁部材
22 第2の絶縁部材
31 第1の層間接続体
32 第2の層間接続体
33 第3の層間接続体
34 第4の層間接続体
41 電子部品
411 電子部品のアクティブ面
412 電子部品の非アクティブ面
413 電子部品の側面
41A 接続端子
51 導電性接着剤
52 アンダーフィル樹脂
Claims (8)
- 少なくとも一対の配線層と、
前記一対の配線層間に配設された絶縁部材と、
前記絶縁部材中に埋設された電子部品と、
前記絶縁部材内に配設され、前記電子部品の非アクティブ面及び側面を収納するための凹部が形成された金属体と、
を具えることを特徴とする、部品内蔵配線基板。 - 前記電子部品の側面と前記金属体の凹部の側壁面とが直接接触していることを特徴とする、請求項1に記載の部品内蔵配線基板。
- 前記金属体はメタルコア基板であることを特徴とする、請求項1又は2に記載の部品内蔵配線基板。
- 前記電子部品は半導体部品であることを特徴とする、請求項1〜3のいずれか一に記載の部品内蔵配線基板。
- 少なくとも一対の配線層と、前記一対の配線層間に配設された絶縁部材と、前記絶縁部材中に埋設された電子部品とを具える部品内蔵配線基板において、
前記絶縁部材内に凹部が形成された金属体を配設し、この金属体の前記凹部内に前記電子部品の非アクティブ面及び側面を収納し、前記電子部品から発せられる熱を、前記金属体を介して放熱させることを特徴とする、部品内蔵配線基板の放熱方法。 - 前記電子部品の側面と前記金属体の凹部の側壁面とを直接接触させることを特徴とする、請求項5に記載の部品内蔵配線基板の放熱方法。
- 前記金属体はメタルコア基板であることを特徴とする、請求項5又は6に記載の部品内蔵配線基板の放熱方法。
- 前記電子部品は半導体部品であることを特徴とする、請求項5〜7のいずれか一に記載の部品内蔵配線基板の放熱方法。
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Cited By (3)
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CN107210288A (zh) * | 2015-02-13 | 2017-09-26 | 高通股份有限公司 | 并排半导体封装 |
KR20190135172A (ko) * | 2018-05-28 | 2019-12-06 | 주식회사 심텍 | 금속 코어 기판을 이용하는 인쇄회로기판의 제조방법 및 이에 의해 제조되는 인쇄회로기판 |
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