JP2013007766A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress deterioration in yield.SOLUTION: A liquid crystal display device comprises: a first substrate including a common electrode formed in an active area displaying an image, an insulation film covering the common electrode, and a pixel formed on the insulation film, facing the common electrode, and having a slit; a second substrate disposed to face the first substrate; a liquid crystal layer held between the first substrate and the second substrate; an optical element with a first linear expansion coefficient disposed on an outer surface of the second substrate in accordance with the active area and having a conductive layer on its surface; an electrode pad formed in an extension part of the first substrate that extends outward beyond an end of the second substrate; and a connection member with a second linear expansion coefficient for electrically connecting the electrode pad and the conductive layer of the optical element and having a larger absolute value than the absolute value of the first linear expansion coefficient.

Description

  Embodiments described herein relate generally to a liquid crystal display device.

  Liquid crystal display devices are utilized in various fields as display devices for OA equipment such as personal computers and televisions, taking advantage of features such as light weight, thinness, and low power consumption. In recent years, liquid crystal display devices are also used as mobile terminal devices such as mobile phones, display devices such as car navigation devices and game machines.

  In recent years, liquid crystal display panels in a fringe field switching (FFS) mode and an in-plane switching (IPS) mode have been put into practical use. Such an FFS mode or IPS mode liquid crystal display panel has a configuration in which a liquid crystal layer is held between an array substrate including a pixel electrode and a common electrode and a counter substrate. Since the conductive film is hardly arranged on the counter substrate, a configuration for shielding an electric field from the outside has been proposed.

JP 2009-116309 A

  An object of the present embodiment is to provide a liquid crystal display device capable of suppressing a decrease in yield.

According to this embodiment,
A common electrode formed in an active area for displaying an image; an insulating film covering the common electrode; and a pixel electrode formed on the insulating film and facing the common electrode and having a slit formed therein. One substrate, a second substrate disposed opposite to the first substrate, a liquid crystal layer held between the first substrate and the second substrate, and corresponding to the active area on the outer surface of the second substrate The first linear expansion coefficient optical element having a conductive layer on the surface thereof, and an extension portion of the first substrate extending outward from the end portion of the second substrate. Electrically connecting the electrode pad, the conductive layer of the optical element and the electrode pad, and a connecting member having a second linear expansion coefficient having an absolute value larger than the absolute value of the first linear expansion coefficient; Liquid crystal display device characterized by comprising It is provided.

FIG. 1 is a diagram schematically showing a configuration and an equivalent circuit of a liquid crystal display panel constituting the liquid crystal display device of the present embodiment. FIG. 2 is a schematic plan view of the pixel structure in the array substrate shown in FIG. 1 as viewed from the counter substrate side. FIG. 3 is a cross-sectional view schematically showing a cross-sectional structure of the liquid crystal display panel shown in FIG. FIG. 4 is a plan view schematically showing the configuration of the liquid crystal display panel shown in FIG. FIG. 5 is a diagram showing a result of measuring a dimensional change when the second optical element is left in a high temperature environment. FIG. 6 is a diagram illustrating a result of calculating the first linear expansion coefficient α1 of the second optical element based on the example of the dimensional change illustrated in FIG. FIG. 7 is a diagram illustrating the second linear expansion coefficient α2 of each of the first conductive material and the second conductive material.

  Hereinafter, the present embodiment will be described in detail with reference to the drawings. In each figure, the same reference numerals are given to components that exhibit the same or similar functions, and duplicate descriptions are omitted.

  FIG. 1 is a diagram schematically showing a configuration and an equivalent circuit of a liquid crystal display panel LPN constituting the liquid crystal display device of the present embodiment.

  That is, the liquid crystal display device includes an active matrix type liquid crystal display panel LPN. The liquid crystal display panel LPN is held between an array substrate (first substrate) AR, a counter substrate (second substrate) CT arranged to face the array substrate AR, and the array substrate AR and the counter substrate CT. And a liquid crystal layer LQ. Such a liquid crystal display panel LPN includes an active area ACT for displaying an image. The active area ACT is composed of a plurality of pixels PX arranged in a matrix of m × n (where m and n are positive integers).

  In the active area ACT, the array substrate AR includes n gate wirings G (G1 to Gn) and n capacitance lines C (C1 to Cn) that extend in the first direction X in the first direction X, respectively. M source lines S (S1 to Sm) each extending along the intersecting second direction Y, and mxn switching elements electrically connected to the gate line G and the source line S in each pixel PX SW, m × n pixel electrodes PE electrically connected to the switching element SW in each pixel PX, a common electrode CE which is a part of the capacitor line C and faces the pixel electrode PE, and the like. The storage capacitor CS is formed between the capacitor line C and the pixel electrode PE.

  Each gate line G is drawn outside the active area ACT and is connected to the first drive circuit GD. Each source line S is drawn outside the active area ACT and connected to the second drive circuit SD. Each capacitance line C is drawn outside the active area ACT and connected to the third drive circuit CD. The first drive circuit GD, the second drive circuit SD, and the third drive circuit CD are formed on the array substrate AR and connected to the drive IC chip 2. In the illustrated example, the driving IC chip 2 is mounted on the array substrate AR outside the active area ACT of the liquid crystal display panel LPN as a signal source necessary for driving the liquid crystal display panel LPN.

  In the present embodiment, the driving IC chip 2 includes an image signal writing circuit 2A that performs control necessary for writing an image signal to the pixel electrode PE of each pixel PX in an image display mode in which an image is displayed in the active area ACT. ing. In addition to the image signal writing circuit 2A, the drive IC chip 2 has a capacitance (for example, a capacitance touch) of a capacitance touch sensing wiring in a touch sensing mode for detecting contact of an object on the detection surface. You may provide the detection circuit 2B which detects the change of the electrostatic capacitance between the capacitive line C and the source wiring S) as a sensing wiring.

  Further, the liquid crystal display panel LPN of the illustrated example has a configuration applicable to the FFS mode or the IPS mode, and includes a pixel electrode PE and a common electrode CE on the array substrate AR. In the liquid crystal display panel LPN of this embodiment, a liquid crystal is mainly used by utilizing a horizontal electric field (for example, an electric field substantially parallel to the main surface of the substrate in the fringe electric field) formed between the pixel electrode PE and the common electrode CE. The liquid crystal molecules constituting the layer LQ are switched.

  FIG. 2 is a schematic plan view of the structure of the pixel PX in the array substrate AR shown in FIG. 1 as viewed from the counter substrate CT side.

  The gate line G extends along the first direction X. The source line S extends along a second direction Y orthogonal to the first direction X. The switching element SW is disposed in the vicinity of the intersection of the gate line G and the source line S, and is configured by, for example, a thin film transistor (TFT). The switching element SW includes a semiconductor layer SC. The semiconductor layer SC can be formed of, for example, polysilicon or amorphous silicon, and is formed of polysilicon here.

  The gate electrode WG of the switching element SW is located immediately above the semiconductor layer SC and is electrically connected to the gate wiring G (in the illustrated example, the gate electrode WG is formed integrally with the gate wiring G. ) The source electrode WS of the switching element SW is electrically connected to the source line S (in the illustrated example, the source electrode WS is formed integrally with the source line S). The drain electrode WD of the switching element SW is electrically connected to the pixel electrode PE.

  The capacitance line C extends along the first direction X. That is, the capacitor line C is disposed in each pixel PX and extends above the source line S, and is formed in common across a plurality of pixels PX adjacent in the first direction X. The capacitor line C includes a common electrode CE formed corresponding to each pixel PX.

  The pixel electrode PE of each pixel PX is disposed above the common electrode CE. Each pixel electrode PE is formed in an island shape corresponding to the pixel shape in each pixel PX, for example, a substantially square shape. Each pixel electrode PE has a plurality of slits PSL facing the common electrode CE. In the illustrated example, each of the slits PSL extends along the second direction Y.

  FIG. 3 is a diagram schematically showing a cross-sectional structure of the liquid crystal display panel LPN shown in FIG.

  That is, the array substrate AR is formed by using a first insulating substrate 10 having light transparency such as a glass substrate. The array substrate AR includes a switching element SW, a common electrode CE, a pixel electrode PE, and the like on an inner surface (that is, a surface facing the counter substrate CT) 10A of the first insulating substrate 10.

  Here, the switching element SW is illustrated in a simplified manner. The switching element SW is covered with the first insulating film 11. The common electrode CE is formed on the first insulating film 11. The common electrode CE is covered with the second insulating film 12. The second insulating film 22 is also disposed on the first insulating film 21. The pixel electrode PE is formed on the second insulating film 22. That is, the second insulating film 12 corresponds to an interlayer insulating film interposed between the common electrode CE and the pixel electrode PE.

  The pixel electrode PE is electrically connected to the switching element SW through a contact hole that penetrates the first insulating film 21 and the second insulating film 22. Further, the slit PSL of the pixel electrode PE is formed immediately above the common electrode CE. Both the common electrode CE and the pixel electrode PE are formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The pixel electrode PE is covered with the first alignment film AL1. The first alignment film AL1 is disposed on the surface in contact with the liquid crystal layer LQ of the array substrate AR.

  On the other hand, the counter substrate CT is formed using a second insulating substrate 30 having optical transparency such as a glass substrate. The counter substrate CT has a black matrix 31, a color filter 32, an overcoat layer 33, and the like that partition each pixel PX as a dielectric thin film on the inner surface (that is, the surface facing the array substrate AR) 30 A of the second insulating substrate 30. It has.

  The black matrix 31 is formed on the inner surface 30 </ b> A of the second insulating substrate 30 so as to face the gate wiring G and the source wiring S provided on the array substrate AR, and further to the wiring section such as the switching element SW. The color filter 32 is formed on the inner surface 30A of the second insulating substrate 30 and is formed of resin materials colored in a plurality of different colors, for example, three primary colors such as red, blue, and green. The resin material colored red is arranged corresponding to the red pixel. Similarly, the resin material colored blue is arranged corresponding to the blue pixel, and the resin material colored green corresponds to the green pixel. Are arranged.

  The overcoat layer 33 covers the black matrix 31 and the color filter 32. The overcoat layer 33 flattens the unevenness of the surfaces of the black matrix 31 and the color filter 32. Such an overcoat layer 33 is covered with the second alignment film AL2. The second alignment film AL2 is disposed on the surface in contact with the liquid crystal layer LQ of the counter substrate CT.

  The array substrate AR and the counter substrate CT as described above are arranged so that the first alignment film AL1 and the second alignment film AL2 face each other. At this time, a spacer (not shown) (for example, a columnar spacer integrally formed on one substrate with a resin material) is disposed between the array substrate AR and the counter substrate CT, thereby forming a predetermined gap. Is done. The array substrate AR and the counter substrate CT are bonded together with a seal material SE in a state where a predetermined gap is formed. The liquid crystal layer LQ is composed of a liquid crystal composition including liquid crystal molecules enclosed in a gap formed between the first alignment film AL1 of the array substrate AR and the second alignment film AL2 of the counter substrate CT. .

  The first alignment film AL1 and the second alignment film AL2 are aligned in directions parallel to each other in the XY plane parallel to the main surface of the substrate (here, the first alignment film AL1 and the second alignment film) The respective orientation treatment directions of AL2 are opposite to each other). In a state where an electric field is not formed between the pixel electrode PE and the common electrode CE, the liquid crystal molecules included in the liquid crystal layer LQ are aligned in the first and second alignment films AL1 and AL2 in the XY plane. Initial orientation in an orientation parallel to the processing direction. In a state where a fringe electric field is formed between the pixel electrode PE and the common electrode CE, the liquid crystal molecules are aligned in a different direction from the initial alignment direction in the plane.

  A backlight (not shown) is arranged on the back side of the liquid crystal display panel LPN having such a configuration. On the outer surface of the array substrate AR, that is, the outer surface 10B of the first insulating substrate 10, the first optical element OD1 including the first polarizing plate PL1 is disposed. The second optical element OD2 including the second polarizing plate PL2 is disposed on the outer surface of the counter substrate CT, that is, the outer surface 30B of the second insulating substrate 30.

  The first polarizing axis (or first absorption axis) of the first polarizing plate PL1 and the second polarizing axis (or second absorption axis) of the second polarizing plate PL2 are, for example, orthogonal to each other (crossed Nicols). is there. For example, the first polarization axis is set to an orientation parallel to the alignment treatment direction of the first alignment film AL1.

  The second optical element OD2 includes a conductive layer CDF on the surface thereof. More specifically, the second optical element OD2 includes a first retardation plate R1 disposed on the outer surface 30B of the second insulating substrate 30, and a second retardation plate R2 stacked on the first retardation plate R1. A second polarizing plate PL2 stacked on the second retardation plate R2, a third retardation plate R3 stacked on the second polarizing plate PL2, a conductive layer CDF stacked on the third retardation plate R3, It has. The first retardation plate R1, the second retardation plate R2, the second polarizing plate PL2, and the third retardation plate R3 are integrated by, for example, being bonded to each other using glue. Further, the conductive layer CDF is formed by being coated on the third retardation plate R3.

  One of the first retardation plate R1 and the second retardation plate R2 has a refractive index anisotropy of nx = ny <nz and the other has a refractive index anisotropy of nx> ny> nz. Or b) one of them having a refractive index anisotropy of nx> ny> nz and the other having a refractive index anisotropy of nz> nx> ny.

  That is, the combination of the first retardation plate R1 and the second retardation plate R2 includes a retardation plate having a refractive index anisotropy of nx> ny> nz. The retardation plate having such refractive index anisotropy mainly optically compensates the viewing angle dependence of the first polarization axis of the first polarizing plate PL1 and the second polarization axis of the second polarizing plate PL2. .

  On the other hand, the combination of the first retardation plate R1 and the second retardation plate R2 includes a retardation plate having a refractive index anisotropy of nx = ny <nz or nz> nx> ny. The retardation plate having such refractive index anisotropy is mainly the retardation Δn · d of the liquid crystal layer LQ (Δn is the refractive index anisotropy, and d is the gap between the array substrate AR and the counter substrate CT. ) Is optically compensated.

  The third retardation plate R3 is a biaxial retardation plate. The conductive layer CDF is a transparent conductive layer, and functions as an antistatic layer (or shield electrode) that prevents undesired charges from entering the liquid crystal display panel LPN from the outside.

  The second optical element OD2 having such a configuration is bonded to the outer surface 30B of the second insulating substrate 30 with an adhesive AD. This adhesive AD has a refractive index substantially equal to the refractive index of the material (for example, glass) of the second insulating substrate 30. For this reason, even if a minute pit flaw is formed on the outer surface 30B of the third insulating substrate 30, the pit flaw is filled with the adhesive AD that bonds the second optical element OD2. Accordingly, it is possible to improve defects such as bright spots due to pit scratches.

  The first optical element OD1 is also bonded to the outer surface 10B of the first insulating substrate 10 with the same adhesive.

  The array substrate AR has an extending portion ARE that extends outward from the end portion CTE of the counter substrate CT. An electrode pad PD is formed in the extending part ARE. The conductive layer CDF of the second optical element OD2 is electrically connected to the electrode pad PD by the connection member PST.

  With such a configuration, undesired charges entering from the outside are diffused in-plane in the conductive layer CDF and flow into the pad PD via the connection member PST. For this reason, it is possible to suppress the intrusion of charges into the liquid crystal display panel LPN.

  FIG. 4 is a plan view schematically showing the configuration of the liquid crystal display panel LPN shown in FIG.

  In addition to the electrode pads PD, a driving IC chip 2, a flexible printed circuit (FPC) substrate 3, and the like are mounted on the extending portion ARE of the array substrate AR as a signal source. The electrode pad PD is, for example, a ground potential, and is grounded via the drive IC chip 2 or the FPC board 3 although not described in detail.

  The second optical element OD2 is disposed corresponding to the active area ACT on the outer surface of the counter substrate CT. That is, the second optical element OD2 is disposed over the entire active area ACT. In the illustrated example, the second optical element OD2 has a quadrangular outer shape corresponding to the quadrangular active area ACT in the XY plane, and is formed in a size larger than the active area ACT. Yes.

  The conductive layer CDF is formed over the entire active area ACT on the second optical element OD2. In the example illustrated, the conductive layer CDF is formed over substantially the entire surface of the second optical element OD2. For this reason, the end of the conductive layer CDF coincides with the end of the second optical element OD2. Note that the size of the conductive layer CDF in the XY plane may be smaller than the size of the second optical element OD2 in the XY plane. Such a conductive layer CDF may be formed of, for example, an oxide conductive material such as ITO or IZO, but may be formed of an organic conductive material that can be formed at a lower cost than such an oxide conductive material. .

  The surface resistance value of the second optical element OD2, that is, the surface resistance value of the conductive layer CDF is desirably 1 GΩ / □ or less.

  That is, in a configuration in which a conductive film such as an electrode is not formed on the counter substrate CT side such as the FFS mode described in this embodiment, undesired charges are likely to enter the liquid crystal display panel LPN. If an undesired voltage is applied to the liquid crystal layer LQ due to the intrusion of electric charges, there is a possibility that it will be visually recognized as display unevenness.

  According to the present embodiment, since the conductive layer CDF is formed on the surface of the second optical element OD2 disposed on the front side of the liquid crystal display panel LPN, the charges that have entered from the outside toward the liquid crystal display panel LPN Shielded to some extent by the conductive layer CDF, or even if a charge penetrates into the liquid crystal display panel LPN, it is diffused through the conductive layer CDF, so that visible display unevenness can be eliminated in a short time. It becomes. However, the higher the surface resistance value of the conductive layer CDF, the lower the shielding performance or diffusion performance against electric charges, so that the time required to eliminate display unevenness tends to increase.

  Therefore, the inventor conducted the following experiment on this point. That is, samples in which the conductive layer CDF was formed using a plurality of conductive materials having different surface resistance values were prepared, and for each sample, discharge was generated on the surface, and the time until display unevenness was eliminated was measured. It was confirmed that the sample in which the conductive layer CDF was formed using a material having a surface resistance value of 1 GΩ / □ or less can meet the specifications required that the display unevenness elimination time is within 1 second.

  From such knowledge, according to the present embodiment, the upper limit value of the surface resistance value of the conductive layer CDF is set to 1 GΩ / □ in order to ensure the shielding function against the external electric field.

  The connecting member PST is disposed outside the active area ACT and straddling the conductive layer CDF and the electrode pad PD. Such a connecting member PST is formed of a material having a second linear expansion coefficient α2 having an absolute value larger than the absolute value of the first linear expansion coefficient α1 of the second optical element OD2.

  In this embodiment, the case where the linear expansion coefficient α (/ ° C.) is positive (α> 0) corresponds to the case where the member expands as the temperature rises, and the case where the linear expansion coefficient α (/ ° C.) is negative ( α <0) corresponds to the case where the member contracts as the temperature rises.

  Since the second optical element OD2 contracts as the temperature rises, it has a negative first linear expansion coefficient α1. For the connecting member PST, a material that expands as the second optical element OD2 contracts as the temperature rises is selected, and has a positive second linear expansion coefficient α2. Since the connection member PST is in contact with the second optical element OD2 (or the conductive layer CDF), the connection member PST expands in the direction of being pulled along with the contraction of the second optical element OD2.

  Here, the case where the connecting member PST is formed by selecting a material having the second linear expansion coefficient α2 having an absolute value smaller than the absolute value of the first linear expansion coefficient α1 will be considered. As the temperature rises under the same conditions, the second optical element OD2 contracts, while the connection member PST expands. At this time, the contraction amount of the second optical element OD2 is larger than the expansion amount of the connection member PST. For this reason, stress is concentrated locally on the connection member PST that is in contact with the second optical element OD2 (particularly, the portion that is in contact with the second optical element OD2), and there is a possibility that the connection member PST may be broken. Occurrence). When the connecting member PST is broken, the conductive layer CDF of the second optical element OD2 and the electrode pad PD are electrically insulated, and the charge of the conductive layer CDF cannot be released to the electrode pad PD. End up.

  Next, the case where the connecting member PST is formed by selecting a material having the second linear expansion coefficient α2 having an absolute value larger than the absolute value of the first linear expansion coefficient α1 will be considered. The expansion amount by which the connection member PST expands as the temperature rises under the same conditions is larger than the contraction amount by which the second optical element OD2 contracts. For this reason, the connecting member PST can be deformed following the thermal deformation (contraction) of the second optical element OD2, and stress concentration can be reduced. Therefore, it is possible to prevent the connection member PST from being broken. Accordingly, it is possible to suppress a decrease in yield in the process of manufacturing the liquid crystal display device, and it is possible to provide a highly reliable liquid crystal display device.

  That is, the connection member PST is formed by selecting a material that can allow expansion larger than the contraction amount that the second optical element OD2 contracts with the temperature rise under the same conditions.

  Such a connection member PST is an elastomer containing a conductive substance such as carbon and exhibiting rubber elasticity.

  Further, the connecting member PST may be formed of a thermosetting resin. In this case, the connection member PST is formed by selecting a material having a second linear expansion coefficient α2 having an absolute value larger than the absolute value of the first linear expansion coefficient α1 under the heat treatment conditions for curing. Thereby, it is possible to prevent breakage in the process of forming the connection member PST, and it is possible to suppress a decrease in yield.

  Here, the thermal contraction of the second optical element OD2 will be examined.

  FIG. 5 is a diagram showing a result of measuring a dimensional change when the second optical element OD2 is left in a high temperature environment.

  Here, as an example, the second optical element OD2 is left in an environment of 85 ° C. The horizontal axis in the figure is the standing time (hrs) in a high temperature environment, and the vertical axis is the relative value (%) when the initial dimension of the second optical element OD2 is 100. The initial dimensions (dimensions when the standing time is zero hours) are dimensions under an environment of room temperature (25 ° C.).

  It was confirmed that the second optical element OD2 contracts rapidly until about 20 hours elapses from the start of measurement, and then the dimensional change becomes small, but it still contracts beyond 100 hours. It was also confirmed that the dimensions were hardly restored even when the second polarizing plate OD2 taken out from the high temperature environment was left at room temperature.

  When the connection member PST is formed of a thermosetting resin, it is necessary to leave it for about 30 minutes in a high-temperature environment of, for example, 80 ° C. after applying a paste-like material and performing a heat treatment for curing. According to the above experiment, it can be seen that the second optical element OD2 contracts rapidly even if the heat treatment is performed for a relatively short time.

  Next, a method for selecting a material for forming the connection member PST will be described.

  FIG. 6 is a diagram illustrating a result of calculating the first linear expansion coefficient α1 of the second optical element OD2 based on the example of the dimensional change illustrated in FIG.

  The horizontal axis in the figure is the standing time (hrs) in a high temperature environment, and the vertical axis is the absolute value (/ ° C.) of the calculated first linear expansion coefficient α1.

  Here, the first linear expansion coefficient α1 was calculated by the following equation.

ΔL = α × L × ΔT
However, L is an initial dimension (mm) of the second optical element OD2, ΔL is a dimensional change amount (mm) at each standing time, and ΔT is a temperature rise (° C.). Since the second optical element OD2 contracts as the temperature rises, the dimensional change ΔL is negative (ΔL <0). The measurement of the dimensional change is performed in a high temperature environment of 85 ° C., and the temperature increase ΔT from the initial room temperature (25 ° C.) environment is 60 ° C.

  According to such a calculation result, the plotted absolute value | α1 | of the first linear expansion coefficient is approximated by the following expression with respect to the standing time t.

| Α1 | = 2E−05Ln (t) + 3E−05
As described above, the dimensional shrinkage of the second optical element OD2 at 85 ° C. depends on the standing time. Therefore, when the first linear expansion coefficient α1 when the temperature of the second optical element OD2 is increased from 25 ° C. to 85 ° C. is defined as a value after being left for 1000 hours, which is the quality assurance condition of the second optical element OD2, The absolute value | α1 | of the first linear expansion coefficient in the second optical element OD2 applied in the embodiment is calculated to be about 2.0E-4 (/ ° C.).

  The connecting member PST applicable to the second optical element OD2 having the first linear expansion coefficient α1 is made of a material having the second linear expansion coefficient α2 having an absolute value larger than 2.0E-4 (/ ° C.). Select and form. At this time, the polarity of the second linear expansion coefficient α2 is opposite to the polarity of the first linear expansion coefficient α1. In the above example, since the first linear expansion coefficient α1 is negative, the second linear expansion coefficient α2 is positive.

  Next, two types of conductive materials having different second linear expansion coefficients α2 were prepared, and a reliability test was performed on the connection member PST formed using the respective conductive materials.

  FIG. 7 is a diagram showing the second linear expansion coefficient α2 of each of the first conductive material A and the second conductive material B.

  The horizontal axis of the figure is the temperature (° C.) of the high temperature environment where each conductive material is left, and the vertical axis is the second linear expansion coefficient α2 of each conductive material when left in a high temperature environment from a room temperature (25 ° C.) environment. (/ ° C.). The first conductive material A prepared here is a product name TB3315E manufactured by ThreeBond, and the second conductive material B is a product name 33A-797 manufactured by Henkel.

  The first conductive material A has a second linear expansion coefficient α2 at 4.5 ° C. of 4.5E-4 (/ ° C.), and the second conductive material B has a second linear expansion coefficient α2 at 85 ° C. of 1.6E−. 4 (/ ° C).

  As a material for forming the connection member PST, a conductive material having a second linear expansion coefficient α2 at 85 ° C. larger than 2.0E−4 (/ ° C.) is preferable from the above calculation result. A is a suitable material.

  Using each of the first conductive material A and the second conductive material B, as shown in FIG. 3 and the like, the connection member PST that connects the conductive layer CDF of the second optical element OD2 and the electrode pad PD was formed. . These were then introduced into the heat cycle. Here, the heat cycle is a cycle in which the sample is left for 30 minutes in a low temperature environment of −30 ° C. and then left for 30 minutes in a high temperature environment of 80 ° C. 100 times. As a result, cracks did not occur in the connection member PST formed using the first conductive material A, but cracks occurred in the connection member PST formed using the second conductive material B.

  As a result of such a reliability test, it was confirmed that the first conductive material A is suitable as a material for forming the connection member PST, and the second conductive material B is unsuitable as a material for forming the connection member PST. .

  Epoxy resins and phenol resins that are general resins have a relatively small linear expansion coefficient (<1E-4 (/ ° C.)), and when the connection member PST is formed of a conductive material using such a resin, There is an extremely high possibility that cracks will occur in the heat cycle. Compared to this, since the elastomer has a relatively large coefficient of linear expansion, when the connection member PST is formed of such a conductive material, cracks are unlikely to occur in the heat cycle, and high reliability can be obtained. It becomes.

  The materials and numerical values described here are examples. The first linear expansion coefficient α1 of the second optical element OD2 depends on the type and size thereof, but the first linear expansion coefficient α1 of the second optical element OD2 actually used and the second linear expansion coefficient α2 of the connecting member PST. Are designed to maintain the relationship described above, it is possible to prevent the connection member PST from being broken.

  As described above, according to the present embodiment, it is possible to provide a liquid crystal display device capable of suppressing a decrease in yield.

  In addition, although some embodiment of this invention was described, these embodiment is shown as an example and is not intending limiting the range of invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

LPN ... Liquid crystal display panel AR ... Array substrate CT ... Counter substrate ACT ... Active area PX ... Pixel SW ... Switching element PE ... Pixel electrode PSL ... Slit CE ... Common electrode LQ ... Liquid crystal layer OD1 ... First optical element OD2 ... Second optical Element CDF ... Conductive layer

Claims (10)

A common electrode formed in an active area for displaying an image; an insulating film covering the common electrode; and a pixel electrode formed on the insulating film and facing the common electrode and having a slit formed therein. 1 substrate,
A second substrate disposed opposite the first substrate;
A liquid crystal layer held between the first substrate and the second substrate;
An optical element having a first linear expansion coefficient disposed on the outer surface of the second substrate in correspondence with the active area and having a conductive layer on the surface;
An electrode pad formed on an extending portion of the first substrate extending outward from an end portion of the second substrate;
Electrically connecting the conductive layer of the optical element and the electrode pad, and a connecting member having a second linear expansion coefficient having an absolute value larger than the absolute value of the first linear expansion coefficient;
A liquid crystal display device comprising:   The liquid crystal display device according to claim 1, wherein the connection member is an elastomer.   The liquid crystal display device according to claim 1, wherein the connection member is made of a thermosetting resin.   4. The liquid crystal display device according to claim 1, wherein a surface resistance value of the optical element is 1 GΩ / □ or less. 5.   The said optical element was adhere | attached on the outer surface of the said 2nd board | substrate with the adhesive agent of the refractive index substantially equivalent to the refractive index of the said 2nd board | substrate. Liquid crystal display device.   The optical element includes a first retardation plate disposed on an outer surface of the second substrate, a second retardation plate laminated on the first retardation plate, and a polarization laminated on the second retardation plate. 6. The method according to claim 1, further comprising: a plate, a third retardation plate laminated on the polarizing plate, and the conductive layer laminated on the third retardation plate. A liquid crystal display device according to 1.   One of the first retardation plate and the second retardation plate has a refractive index anisotropy of nx = ny <nz, and the other has a refractive index anisotropy of nx> ny> nz. Or b) one of which has a refractive index anisotropy of nx> ny> nz and the other has a refractive index anisotropy of nz> nx> ny. The liquid crystal display device according to claim 6.   The liquid crystal display device according to claim 6, wherein the third retardation plate is a biaxial retardation plate.   The liquid crystal display device according to claim 1, wherein the first substrate further includes capacitance touch sensing wiring.   The liquid crystal display device according to claim 1, wherein the electrode pad has a ground potential.

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