JP2012124460A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2012124460A5 JP2012124460A5 JP2011209540A JP2011209540A JP2012124460A5 JP 2012124460 A5 JP2012124460 A5 JP 2012124460A5 JP 2011209540 A JP2011209540 A JP 2011209540A JP 2011209540 A JP2011209540 A JP 2011209540A JP 2012124460 A5 JP2012124460 A5 JP 2012124460A5
- Authority
- JP
- Japan
- Prior art keywords
- fiber base
- layer
- insulating substrate
- layers
- surface side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000835 fiber Substances 0.000 claims 28
- 239000000758 substrate Substances 0.000 claims 25
- 239000000463 material Substances 0.000 claims 8
- 239000011347 resin Substances 0.000 claims 8
- 229920005989 resin Polymers 0.000 claims 8
- 239000004020 conductor Substances 0.000 claims 4
- 239000004065 semiconductor Substances 0.000 claims 4
- 239000011888 foil Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
Claims (13)
前記絶縁性基板に含まれる前記繊維基材層を一面側から順にCx(xは1〜nで表される整数であり、nは繊維基材層の数である。)とし、
前記絶縁性基板の全体厚み(B3)を前記繊維基材層の数(n)で均等に分割し、分割した各領域の厚み(B4)をさらに均等に2分割する位置を繊維基材層の基準位置とし、当該各々の基準位置を一面側から順にAx(xは1〜nで表される整数であり、nは繊維基材層の数である。)としたときに、
前記繊維基材層のうち少なくとも1つが、対応する順位の基準位置よりも一面側又は他面側に偏在し、異なる方向に偏在しているものがないことを特徴とする、絶縁性基板。 An insulating substrate comprising a cured product of a laminate comprising one or more fiber base layers and two or more resin layers, wherein the outermost layers on both sides are resin layers,
The fiber base material layer contained in the insulating substrate is Cx (x is an integer represented by 1 to n, and n is the number of fiber base material layers) in order from one surface side.
The overall thickness (B3) of the insulating substrate is equally divided by the number (n) of the fiber base layers, and the thickness (B4) of each divided region is further divided into two equal parts by the fiber base layer. When the reference position is set to Ax (x is an integer represented by 1 to n and n is the number of fiber base layers) in order from one surface side to the reference position,
An insulating substrate characterized in that at least one of the fiber base layers is unevenly distributed on one side or the other side of the reference position of the corresponding order, and none is unevenly distributed in different directions.
前記偏在する繊維基材層は、
当該繊維基材層の一面側の樹脂充填領域の厚み(B5)と、
当該繊維基材層の他面側の樹脂充填領域の厚み(B6)との比(B5/B6)が、0.1<B5/B6<1.2である、請求項1に記載の絶縁性基板。 At least one of the fiber base layers is unevenly distributed on one side of the reference position of the corresponding order,
The unevenly distributed fiber base layer is
The thickness (B5) of the resin-filled region on one side of the fiber base layer;
The insulating property according to claim 1, wherein the ratio (B5 / B6) to the thickness (B6) of the resin-filled region on the other surface side of the fiber base layer is 0.1 <B5 / B6 <1.2. substrate.
前記偏在する繊維基材層は、
当該繊維基材層の一面側の界面から当該繊維基材層が属する厚みB4の領域の当該一面側の境界までの距離(B7)と、
当該繊維基材層の他面側の界面から当該繊維基材層が属する厚みB4の領域の当該他面側の境界までの距離(B8)との比(B7/B8)が、0.1<B7/B8<0.9である、請求項1乃至4のいずれか一項に記載の絶縁性基板。 At least one of the regions of the equally divided thickness B4 has one fiber base layer that is unevenly distributed on one side of the reference position of the corresponding order,
The unevenly distributed fiber base layer is
The distance (B7) from the interface on the one surface side of the fiber substrate layer to the boundary on the one surface side of the region of thickness B4 to which the fiber substrate layer belongs,
The ratio (B7 / B8) to the distance (B8) from the interface on the other surface side of the fiber substrate layer to the boundary on the other surface side of the region of thickness B4 to which the fiber substrate layer belongs is 0.1 < The insulating substrate according to any one of claims 1 to 4, wherein B7 / B8 <0.9.
縁性基板において、
繊維基材層の一面に第1樹脂層、他面に第2樹脂層が設けられ、前記第1樹脂層の厚みが前記第2樹脂層の厚みよりも小さい非対称プリプレグを少なくとも1枚含むことを特徴とする、請求項1乃至8のいずれか一項に記載の絶縁性基板。 In an insulating substrate composed of a cured product of only one prepreg or a laminate of two or more prepregs,
A first resin layer is provided on one side of the fiber substrate layer, a second resin layer is provided on the other side, and the thickness of the first resin layer includes at least one asymmetric prepreg smaller than the thickness of the second resin layer. The insulating substrate according to any one of claims 1 to 8 , wherein the insulating substrate is characterized.
前記半導体素子が、繊維基材層が偏在する方向の面とは反対側の面に設けられた導体回路層上に搭載されている、請求項11又は12に記載の半導体装置。 Of the fiber base layer that the insulating substrate included in the printed wiring board has, the fiber base layer located on the most surface side is arranged unevenly on the one surface side than the reference position of the corresponding order,
The semiconductor device according to claim 11 or 12, wherein the semiconductor element is mounted on a conductor circuit layer provided on a surface opposite to a surface in a direction in which the fiber base material layer is unevenly distributed.
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011209540A JP5115645B2 (en) | 2010-11-18 | 2011-09-26 | Insulating substrate, metal-clad laminate, printed wiring board, and semiconductor device |
TW100141393A TWI477208B (en) | 2010-11-18 | 2011-11-14 | Semiconductor device |
PCT/JP2011/076254 WO2012067094A1 (en) | 2010-11-18 | 2011-11-15 | Insulating substrate, metal-clad laminate, printed wiring board, and semiconductor device |
KR1020137013803A KR20130133199A (en) | 2010-11-18 | 2011-11-15 | Insulating substrate, metal-clad laminate, printed wiring board, and semiconductor device |
CN201180064929.5A CN103298612B (en) | 2010-11-18 | 2011-11-15 | Insulative substrate, metal-clad laminate, printed substrate and semiconductor device |
US13/885,321 US20130242520A1 (en) | 2010-11-18 | 2011-11-15 | Insulating substrate, metal-clad laminate, printed wiring board and semiconductor device |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010258172 | 2010-11-18 | ||
JP2010258172 | 2010-11-18 | ||
JP2011209540A JP5115645B2 (en) | 2010-11-18 | 2011-09-26 | Insulating substrate, metal-clad laminate, printed wiring board, and semiconductor device |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012191863A Division JP5821811B2 (en) | 2010-11-18 | 2012-08-31 | Insulating substrate, metal-clad laminate, printed wiring board, and semiconductor device |
JP2012191864A Division JP5152432B2 (en) | 2010-11-18 | 2012-08-31 | Insulating substrate, metal-clad laminate, printed wiring board, and semiconductor device |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2012124460A JP2012124460A (en) | 2012-06-28 |
JP2012124460A5 true JP2012124460A5 (en) | 2012-08-09 |
JP5115645B2 JP5115645B2 (en) | 2013-01-09 |
Family
ID=46084021
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011209540A Expired - Fee Related JP5115645B2 (en) | 2010-11-18 | 2011-09-26 | Insulating substrate, metal-clad laminate, printed wiring board, and semiconductor device |
Country Status (6)
Country | Link |
---|---|
US (1) | US20130242520A1 (en) |
JP (1) | JP5115645B2 (en) |
KR (1) | KR20130133199A (en) |
CN (1) | CN103298612B (en) |
TW (1) | TWI477208B (en) |
WO (1) | WO2012067094A1 (en) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013000995A (en) * | 2011-06-17 | 2013-01-07 | Panasonic Corp | Metal-clad laminated plate and printed wiring board |
JP2013123907A (en) * | 2011-12-16 | 2013-06-24 | Panasonic Corp | Metal-clad laminate and printed wiring board |
US9117730B2 (en) * | 2011-12-29 | 2015-08-25 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing printed wiring board |
CN104093764B (en) * | 2012-01-31 | 2018-06-08 | 三菱瓦斯化学株式会社 | Printed circuit board material resin combination and prepreg, resin sheet, clad with metal foil plywood and the printed circuit board for having used it |
JP6112452B2 (en) * | 2013-03-29 | 2017-04-12 | パナソニックIpマネジメント株式会社 | Double-sided metal-clad laminate and method for producing the same |
CN103237418B (en) * | 2013-05-15 | 2015-10-21 | 广州兴森快捷电路科技有限公司 | The determination methods of printed circuit slab warping |
US9893043B2 (en) * | 2014-06-06 | 2018-02-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of manufacturing a chip package |
KR101650938B1 (en) | 2014-09-25 | 2016-08-24 | 코닝정밀소재 주식회사 | Substrate for ic package |
US9818682B2 (en) * | 2014-12-03 | 2017-11-14 | International Business Machines Corporation | Laminate substrates having radial cut metallic planes |
WO2017057138A1 (en) * | 2015-09-30 | 2017-04-06 | 住友ベークライト株式会社 | Structure, wiring substrate, and method for producing wiring substrate |
KR102512228B1 (en) * | 2015-10-01 | 2023-03-21 | 삼성전기주식회사 | Insulating material and printed circuit board having the same |
US9640492B1 (en) * | 2015-12-17 | 2017-05-02 | International Business Machines Corporation | Laminate warpage control |
JP6661232B2 (en) * | 2016-03-01 | 2020-03-11 | 新光電気工業株式会社 | Wiring substrate, semiconductor device, method of manufacturing wiring substrate, and method of manufacturing semiconductor device |
WO2018088493A1 (en) * | 2016-11-09 | 2018-05-17 | 日立化成株式会社 | Printed wiring board and semiconductor package |
JP7135364B2 (en) * | 2018-03-23 | 2022-09-13 | 三菱マテリアル株式会社 | INSULATED CIRCUIT BOARD AND METHOD FOR MANUFACTURING INSULATED CIRCUIT BOARD |
TWI705536B (en) * | 2018-11-16 | 2020-09-21 | 欣興電子股份有限公司 | Carrier structure and manufacturing method thereof |
JP7153253B2 (en) * | 2019-03-29 | 2022-10-14 | 東レ株式会社 | fiber reinforced plastic molding |
CN111712062B (en) * | 2020-06-30 | 2021-09-28 | 生益电子股份有限公司 | Chip and PCB welding method |
EP3964824B1 (en) | 2020-09-02 | 2024-02-14 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Expansion coefficient determination with deformation measurement and simulation |
JP7566652B2 (en) | 2021-02-02 | 2024-10-15 | キオクシア株式会社 | Semiconductor device and substrate |
KR20230116461A (en) | 2022-01-28 | 2023-08-04 | 삼성전자주식회사 | Display apparatus |
US20250174533A1 (en) * | 2023-11-29 | 2025-05-29 | Mediatek Inc. | Semiconductor package structure |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002134918A (en) * | 2000-10-26 | 2002-05-10 | Matsushita Electric Works Ltd | Method for manufacturing multilayer printed wiring board |
JP3499837B2 (en) * | 2001-03-13 | 2004-02-23 | 住友ベークライト株式会社 | Manufacturing method of prepreg |
WO2007126130A1 (en) * | 2006-04-28 | 2007-11-08 | Sumitomo Bakelite Co., Ltd. | Solder resist material, wiring board using the solder resist material, and semiconductor package |
JP5234962B2 (en) * | 2006-08-07 | 2013-07-10 | 新日鉄住金化学株式会社 | Prepreg, laminated board and printed wiring board |
WO2008093579A1 (en) * | 2007-01-29 | 2008-08-07 | Sumitomo Bakelite Company Limited | Multilayer body, method for producing substrate, substrate and semiconductor device |
EP1976001A3 (en) * | 2007-03-26 | 2012-08-22 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
JP5138267B2 (en) * | 2007-04-18 | 2013-02-06 | 日立化成工業株式会社 | Prepreg, multilayer substrate and electronic component using the same |
JP2010087402A (en) * | 2008-10-02 | 2010-04-15 | Hitachi Chem Co Ltd | Method of manufacturing multilayered board for printed wiring board |
-
2011
- 2011-09-26 JP JP2011209540A patent/JP5115645B2/en not_active Expired - Fee Related
- 2011-11-14 TW TW100141393A patent/TWI477208B/en not_active IP Right Cessation
- 2011-11-15 US US13/885,321 patent/US20130242520A1/en not_active Abandoned
- 2011-11-15 KR KR1020137013803A patent/KR20130133199A/en not_active Ceased
- 2011-11-15 CN CN201180064929.5A patent/CN103298612B/en not_active Expired - Fee Related
- 2011-11-15 WO PCT/JP2011/076254 patent/WO2012067094A1/en active Application Filing
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2012124460A5 (en) | ||
CN104869748B (en) | Printed circuit board and manufacturing methods | |
JP2011249574A5 (en) | ||
JP2009141041A5 (en) | ||
JP2011176279A5 (en) | ||
JP2007176169A5 (en) | ||
JP2015502021A5 (en) | ||
WO2009037939A1 (en) | Printed wiring board and method for manufacturing the same | |
JP2009135162A5 (en) | ||
JP2013153068A5 (en) | ||
CN104039071A (en) | Wiring Board And Method For Manufacturing The Same | |
JP2014501448A5 (en) | ||
JP2015041630A5 (en) | ||
JP2011155251A5 (en) | ||
JP2013522874A5 (en) | ||
JP2007129124A5 (en) | ||
JP2014501449A5 (en) | ||
KR20150125424A (en) | Rigid flexible printed circuit board and method of manufacturing the same | |
JP2014123630A5 (en) | ||
JP5955102B2 (en) | Wiring board and manufacturing method thereof | |
JP2014501450A5 (en) | Printed circuit board | |
JP2016149517A5 (en) | ||
JP2015026654A5 (en) | Copper foil with carrier, method for producing copper-clad laminate and method for producing printed wiring board | |
JP2007330044A5 (en) | ||
KR102295104B1 (en) | Circuit board and manufacturing method thereof |